CN108987353B - 半导体封装件、半导体装置以及半导体装置的制造方法 - Google Patents

半导体封装件、半导体装置以及半导体装置的制造方法 Download PDF

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Publication number
CN108987353B
CN108987353B CN201810177954.8A CN201810177954A CN108987353B CN 108987353 B CN108987353 B CN 108987353B CN 201810177954 A CN201810177954 A CN 201810177954A CN 108987353 B CN108987353 B CN 108987353B
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CN
China
Prior art keywords
semiconductor package
protrusion
electrode
electrodes
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201810177954.8A
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English (en)
Chinese (zh)
Other versions
CN108987353A (zh
Inventor
岛藤贵行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of CN108987353A publication Critical patent/CN108987353A/zh
Application granted granted Critical
Publication of CN108987353B publication Critical patent/CN108987353B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07302—Connecting or disconnecting of die-attach connectors using an auxiliary member
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Die Bonding (AREA)
CN201810177954.8A 2017-06-05 2018-03-05 半导体封装件、半导体装置以及半导体装置的制造方法 Expired - Fee Related CN108987353B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017-111214 2017-06-05
JP2017111214A JP6984183B2 (ja) 2017-06-05 2017-06-05 半導体パッケージ、半導体装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN108987353A CN108987353A (zh) 2018-12-11
CN108987353B true CN108987353B (zh) 2023-10-24

Family

ID=64460337

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810177954.8A Expired - Fee Related CN108987353B (zh) 2017-06-05 2018-03-05 半导体封装件、半导体装置以及半导体装置的制造方法

Country Status (4)

Country Link
US (1) US10607906B2 (enExample)
JP (1) JP6984183B2 (enExample)
CN (1) CN108987353B (enExample)
TW (1) TWI745558B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7287085B2 (ja) * 2019-04-18 2023-06-06 富士電機株式会社 組立冶具セットおよび半導体モジュールの製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188127B1 (en) * 1995-02-24 2001-02-13 Nec Corporation Semiconductor packing stack module and method of producing the same
JP2007123443A (ja) * 2005-10-26 2007-05-17 Shinko Electric Ind Co Ltd 回路基板、半導体装置、及び半導体装置の製造方法
JP2007281393A (ja) * 2006-04-12 2007-10-25 Sony Corp 電子部品及びこれを用いた半導体装置並びに半導体装置の製造方法
CN101176199A (zh) * 2005-05-17 2008-05-07 松下电器产业株式会社 倒装片安装体及倒装片安装方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03147353A (ja) 1989-11-02 1991-06-24 New Japan Radio Co Ltd 表面実装型半導体パッケージ
US5220200A (en) * 1990-12-10 1993-06-15 Delco Electronics Corporation Provision of substrate pillars to maintain chip standoff
US5186383A (en) * 1991-10-02 1993-02-16 Motorola, Inc. Method for forming solder bump interconnections to a solder-plated circuit trace
US5269453A (en) * 1992-04-02 1993-12-14 Motorola, Inc. Low temperature method for forming solder bump interconnections to a plated circuit trace
JPH07249707A (ja) 1994-03-09 1995-09-26 Fujitsu Ltd 半導体パッケージ
US5796169A (en) * 1996-11-19 1998-08-18 International Business Machines Corporation Structurally reinforced ball grid array semiconductor package and systems
JP2006210956A (ja) 1997-02-27 2006-08-10 Fujitsu Ltd 半導体装置
US6118182A (en) * 1998-06-25 2000-09-12 Intel Corporation Integrated circuit package with rectangular contact pads
US6122171A (en) * 1999-07-30 2000-09-19 Micron Technology, Inc. Heat sink chip package and method of making
US6531335B1 (en) * 2000-04-28 2003-03-11 Micron Technology, Inc. Interposers including upwardly protruding dams, semiconductor device assemblies including the interposers, and methods
US7041533B1 (en) * 2000-06-08 2006-05-09 Micron Technology, Inc. Stereolithographic method for fabricating stabilizers for semiconductor devices
JP3942457B2 (ja) * 2002-02-27 2007-07-11 Ｎｅｃエレクトロニクス株式会社 電子部品の製造方法
US20060108678A1 (en) * 2002-05-07 2006-05-25 Microfabrica Inc. Probe arrays and method for making
US20090085227A1 (en) * 2005-05-17 2009-04-02 Matsushita Electric Industrial Co., Ltd. Flip-chip mounting body and flip-chip mounting method
US20090039495A1 (en) * 2005-10-05 2009-02-12 Sharp Kabushiki Kaisha Wiring substrate and display device including the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188127B1 (en) * 1995-02-24 2001-02-13 Nec Corporation Semiconductor packing stack module and method of producing the same
CN101176199A (zh) * 2005-05-17 2008-05-07 松下电器产业株式会社 倒装片安装体及倒装片安装方法
JP2007123443A (ja) * 2005-10-26 2007-05-17 Shinko Electric Ind Co Ltd 回路基板、半導体装置、及び半導体装置の製造方法
JP2007281393A (ja) * 2006-04-12 2007-10-25 Sony Corp 電子部品及びこれを用いた半導体装置並びに半導体装置の製造方法

Also Published As

Publication number Publication date
TWI745558B (zh) 2021-11-11
CN108987353A (zh) 2018-12-11
US20180350705A1 (en) 2018-12-06
JP2018206977A (ja) 2018-12-27
US10607906B2 (en) 2020-03-31
TW201903978A (zh) 2019-01-16
JP6984183B2 (ja) 2021-12-17

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Granted publication date: 20231024