CN1088256C - 产生欧姆接触及制造设有该种欧姆接触的半导体器件的方法 - Google Patents

产生欧姆接触及制造设有该种欧姆接触的半导体器件的方法 Download PDF

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CN1088256C
CN1088256C CN96191499A CN96191499A CN1088256C CN 1088256 C CN1088256 C CN 1088256C CN 96191499 A CN96191499 A CN 96191499A CN 96191499 A CN96191499 A CN 96191499A CN 1088256 C CN1088256 C CN 1088256C
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B·K·克罗恩兰德
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Telefonaktiebolaget LM Ericsson AB
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/0485—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/931—Silicon carbide semiconductor

Abstract

在一种产生半导体器件(1)中的P型α-SiC层(3b)的欧姆接触(5)的方法中，铝层、钛层和硅层被沉积在上述α-SiC层(3b)上，且上述沉积的层(5)被退火以便至少将上述沉积层(5)的一部分转变成铝钛硅化物。

Description

产生欧姆接触及制造设有该种欧姆接触的半导体器件的方法
技术领域
本发明涉及在半导体器件中产生P型α-SiC层的欧姆接触的方法以及制备配备有这种欧姆接触的半导体器件。
发明的背景
结晶的碳化硅以多种不同的化学形式存在，诸如六方晶体形式α-SiC(具体地说是6H-SiC)以及立方晶体形式β-SiC(3C-SiC)。
由于SiC的热导率比Si高330％，比GaAs高10倍，击穿电场比Si和GaAs高10倍，饱和电子漂移速度(它是材料中电子的速度极限)比Si和GaAs高40-50％，且宽的带隙使其能工作于500℃以上的温度，故人们对SiC半导体器件有很大的兴趣。
大多数半导体器件需要终端连接以便使电流进出于半导体器件内部。但通常称为欧姆接触的这种终端连接必须不损害半导体器件本身。即在涉及到的电流密度下，欧姆接触上的电压降比起半导体器件其它区域上的电压降来说应当是可忽略的。
从G.Guang-bo等人的文章“SiC异质结双极晶体管的高频特性”(IEEE Transaction on Electron Devices，Vol.41，No.7，1994年7月，pp.1092)可见，如果碳化硅器件比起Si和GaAs器件来要有前途的话，则要求P型SiC的比接触电阻小于0.0001Ωcm2。
铝曾被认为是一种有潜力的接触金属，但其低熔点(660℃)使之在大功率或高温工作中不够理想。铝的另一问题是它同氧的反应性可能导致隔离性氧化物。
在H.Daimon等人的文章“退火对Al对Al-Si与3C-SiC的接触之影响”(Japanese JAP，VOL.25，No.7，1986年7月，PP.L592-L594)中，描述了200℃-1000℃热处理之后的Al-Si接触电极。这种Al-Si接触被认为是欧姆接触，但发现得到的电极是不均匀的粒状，有潜在的可靠性问题。
在美国4,990,994和美国5,124,779中描述了在3C-SiC上获得高性能欧姆接触的另一尝试，其中用钛代替硅来与铝组合。由于上述的均匀性问题，最好避免热处理。得到了n型3C-SiC材料的线性电流电压特性。
JP 4-85972涉及到一种借助于在SiC上以任意顺序层叠一个Ni膜、一个Ti膜，其上层叠一个Al膜，然后对其进行热处理而降低P型α-SiC与电极的接触电阻并使电极中的欧姆性质均匀的方法。其比接触电阻对高性能欧姆接触来说不够低，且未指出有关高温工作中稳定性的任何结果。
本发明的概述
本发明的目的是提供一种产生P型α-SiC的高性能欧姆接触(即一种比接触电阻低的、在高温工作中热稳定的欧姆接触)的方法。
用根据本发明的方法，借助于在上述α-SiC层上沉积铝层、钛层和硅层并对上述沉积层进行退火以将上述沉积层的至少一部分转变成铝钛硅化物，达到了这一目的。
附图简述
参照附图，以下将更详细地描述本发明。在这些附图中，
图1是根据本发明的配备有欧姆接触的半导体器件实施例的剖面图；
图2是根据本发明的欧姆接触的比接触电阻与退火时间的函数关系；
图3是根据本发明经二个不同时间退火的二个欧姆接触的比接触电阻与工作温度的函数关系。
发明的详细叙述
作为其中可采用根据本发明的欧姆接触的半导体器件的一个例子，图1示出了通常示为1的半导体结型二极管的一个实施例。
二极管1包含一个单晶α-SiC衬底2，其顶侧配备有一个n型α-SiC层3a。在上述的层3a的顶部，提供了一个P型α-SiC层3b。层3b的载流子浓度为1×1018cm-3。
在P型α-SiC层3b的顶部，二极管1配备有一个根据本发明的欧姆接触5。根据本发明，欧姆接触5包含一个铝钛硅化物金属化层。借助于在P型α-SiC层3b上沉积总厚度小于300nm的各个铝层、钛层和硅层(最好按此顺序)，并退火或烧结所沉积的层以便将这些层的至少一部分转变成铝钛硅化物，从而生产这一欧姆接触5。被转变的部分示意地用5a表示，它位于与层3b的交界处。但应当指出的是，在欧姆接触5的转变部分与未转变部分之间不存在明显的边界线。
沉积层的退火即烧结在最低为900℃的温度下进行，最好为950℃，时间长度最好是200秒。
图2示出了在950℃的退火或烧结温度下，欧姆接触5的比接触电阻与退火或烧结时间的函数关系。
退火或烧结工序可在诸如快速热退火炉的标准工艺设备中进行，且金属层可用已知的方法利用带有离子枪的电子束蒸发器或溅射沉积系统来沉积。在任何现代的硅或III-V生产线中都可找到这类设备。
二极管1还包含一个衬底2底侧的欧姆接触4以及一个欧姆接触5的焊接引线6。欧姆接触4也按本发明的方法来产生。
钛的强烈的氧吸杂效应(它使少量的氧残余被捕获，在稍后的烧结接触的过程中会使铝氧化)被激发硅化物形成的硅层抵消。在三金属铝钛硅化物形成过程中，即烧结或退火过程中，任何束缚的氧都从SiC-金属界面被排出。
根据本发明的欧姆接触的低的比接触电阻被归因于上述效应以及铝在SiC中是P型掺杂剂且界面在硅化物形成过程中被移入SiC中这样的事实。得到的铝钛硅化物接触于是虽然含有铝却仍然热稳定。
图3示出了根据本发明的在950℃的同一温度下分别退火200秒和300秒的二个不同的欧姆接触在不同的工作温度下的比接触电阻的温度稳定性。
这样，用根据本发明的方法，获得了一种欧姆接触，它表现一个很低的比接触电阻，在很宽的工作温度范围内是稳定的。

Claims (7)

1.一种产生半导体器件中的P型α-SiC层的欧姆接触的方法，其特征是：
在上述α-SiC层上沉积铝层、钛层和硅层；和
对所沉积的层进行退火以便至少将上述沉积层的一部分转变成铝钛硅化物。
2.权利要求1所述的方法，其特征是首先在上述α-SiC层上沉积铝层，然后在上述铝层上沉积钛层，最后在上述钛层上沉积硅层。
3.权利要求1或2所述的方法，其特征是沉积上述各层使其组合厚度小于300nm。
4.权利要求1或2所述的方法，其特征是在最低为900℃的温度下对上述各层进行退火。
5.权利要求1或2所述的方法，其特征是在950℃的温度下对上述各层进行退火。
6.权利要求1或2所述的方法，其特征是对上述各层至少退火200秒钟。
7.一种包含一个P型α-SiC层(3b)的半导体器件(1)，其特征是在上述α-SiC层(3b)上配备有至少一个包含铝钛硅化物的欧姆接触(5)。
CN96191499A 1995-01-18 1996-01-17 产生欧姆接触及制造设有该种欧姆接触的半导体器件的方法 Expired - Lifetime CN1088256C (zh)

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SE9500152D0 (sv) 1995-01-18
US5877077A (en) 1999-03-02
DE69613674T2 (de) 2002-04-25
ES2160799T3 (es) 2001-11-16
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HK1008264A1 (en) 1999-05-07
EP0804802B1 (en) 2001-07-04
FI973555A (fi) 1997-08-29
CA2210222A1 (en) 1996-07-25
SE9500152L (sv) 1996-07-19
CN1172551A (zh) 1998-02-04
US6043513A (en) 2000-03-28
AU4499596A (en) 1996-08-07
KR100406247B1 (ko) 2004-03-18
EP0804802A1 (en) 1997-11-05
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