CN108807565B - Passivation contact electrode structure, solar cell applicable to passivation contact electrode structure and manufacturing method of passivation contact electrode structure - Google Patents
Passivation contact electrode structure, solar cell applicable to passivation contact electrode structure and manufacturing method of passivation contact electrode structure Download PDFInfo
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- 238000002161 passivation Methods 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 79
- 238000000034 method Methods 0.000 claims abstract description 55
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052802 copper Inorganic materials 0.000 claims abstract description 54
- 239000010949 copper Substances 0.000 claims abstract description 54
- 239000000758 substrate Substances 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 46
- 230000008569 process Effects 0.000 claims abstract description 26
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 15
- 229920005591 polysilicon Polymers 0.000 claims abstract description 14
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims abstract description 13
- 229910052709 silver Inorganic materials 0.000 claims abstract description 11
- 239000004332 silver Substances 0.000 claims abstract description 11
- 229910021483 silicon-carbon alloy Inorganic materials 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 232
- 239000010408 film Substances 0.000 claims description 44
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 32
- 238000009713 electroplating Methods 0.000 claims description 24
- 230000004888 barrier function Effects 0.000 claims description 18
- 229910052759 nickel Inorganic materials 0.000 claims description 16
- 230000005641 tunneling Effects 0.000 claims description 16
- 239000011241 protective layer Substances 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 10
- 239000010409 thin film Substances 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 7
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 238000000608 laser ablation Methods 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 239000002356 single layer Substances 0.000 claims description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 3
- 229910020923 Sn-O Inorganic materials 0.000 claims description 2
- 229910003437 indium oxide Inorganic materials 0.000 claims description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 2
- 239000011261 inert gas Substances 0.000 claims description 2
- 229910021484 silicon-nickel alloy Inorganic materials 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims 2
- 239000000126 substance Substances 0.000 claims 2
- 239000011787 zinc oxide Substances 0.000 claims 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 7
- 229910052751 metal Inorganic materials 0.000 abstract description 6
- 239000002184 metal Substances 0.000 abstract description 6
- 238000007772 electroless plating Methods 0.000 description 13
- 238000001465 metallisation Methods 0.000 description 11
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 9
- 230000003667 anti-reflective effect Effects 0.000 description 8
- 230000006872 improvement Effects 0.000 description 7
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 6
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 6
- 229910005883 NiSi Inorganic materials 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 230000006798 recombination Effects 0.000 description 5
- 238000005215 recombination Methods 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 239000002131 composite material Substances 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 2
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000011712 cell development Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical group [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022433—Particular geometry of the grid contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Computer Hardware Design (AREA)
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- Photovoltaic Devices (AREA)
Abstract
The invention discloses a passivation contact electrode structure, a solar cell and a manufacturing method thereof, wherein the electrode structure comprises a doped semiconductor layer deposited on a crystalline silicon substrate and a copper electrode on the doped semiconductor layer; the doped semiconductor layer is any one of polysilicon, microcrystalline silicon or microcrystalline silicon-carbon alloy, and the thickness is 5-100nm. In the implementation process, the applicable solar cell comprises the passivation contact electrode structure on the back surface or both surfaces of the crystalline silicon substrate. The invention also provides a manufacturing method for manufacturing the solar cell with the passivation contact electrode structure. This patent has reduced the surperficial complex efficiency of photogenerated carrier through the contact that has passivated all metal electrodes, has realized more thorough passivation effect, simultaneously, compares in current technological method, and this patent scheme not only can be put into practice volume production, and uses electroplated copper as the conducting layer and replace silver, has reduced battery manufacturing cost.
Description
Technical Field
The invention belongs to the field of solar cells, and particularly relates to a passivation contact electrode structure, a solar cell suitable for the passivation contact electrode structure and a manufacturing method of the passivation contact electrode structure.
Background
The working principle of a solar cell is simply to extract photo-generated electron-hole pairs and generate current before they recombine. How to reduce recombination losses has been one of the core points in solar cell development. In the course of technological development of silicon-based batteries for twenty years, at any time, the reduction of recombination loss and the improvement of photo-generated electron/hole collection efficiency are put into heavy consideration, and a series of technologies including aluminum back surface field passivation, front and back surface passivation using dielectric films, local or whole-surface formation of high and low junction electric fields, heterojunction passivation and the like are proposed. The full-surface passivation contact is performed by using the film tunneling layer, so that the contact of all metal electrodes can be passivated, the increase of the series resistance and the composite effect caused by the transverse transportation of carriers due to local contact are avoided, and compared with the heterojunction passivation metal, the process can bear the subsequent high-temperature manufacturing and can be better compatible with the existing PERC battery technology, and the production line upgrading is easier to realize.
How to realize metallization is one of the key issues in commercialization of surface passivation contact processes. However, the currently used laboratory metallization processes such as physical vapor deposition and vapor deposition on the surface passivation contact structure are difficult to be applied to mass production, and the screen printing and burn-through (firing through) metallization process requires a heavily doped semiconductor layer with a thickness of more than 100nm and even 300nm, which can bring about larger irradiation loss, especially obvious on a double-sided battery, and increase auger recombination loss of carriers.
Disclosure of Invention
In view of the above, the present invention provides a passivation contact electrode structure, a solar cell and a manufacturing method thereof.
The technical aim is achieved, and the technical effects are achieved by the following technical scheme:
a passivation contact electrode structure applied to a solar cell comprises a doped semiconductor layer deposited on a crystalline silicon substrate, and a copper electrode on the doped semiconductor layer; the doped semiconductor layer is any one of polysilicon, microcrystalline silicon or microcrystalline silicon-carbon alloy, and the thickness is 5-100nm. The doped semiconductor layer is formed by growing a semiconductor layer on the surface of the crystalline silicon substrate by adopting a Low Pressure Chemical Vapor Deposition (LPCVD) method, a plasma vapor deposition (PECVD) method, a hot wire assisted chemical vapor deposition (HWCVD) method and the like, and then doping the semiconductor layer.
Compared with the existing metallization process for manufacturing a silver electrode by screen printing and burning through the silver electrode to a doped semiconductor layer, the invention adopts the electroplated copper electrode with low price and strong conductivity, and can be manufactured on the doped semiconductor layer with the thickness of only 5-100nm without burning through, and the metal electrode is manufactured on the crystalline silicon substrate in a passivation contact mode based on the structure.
As a further improvement of the invention, the semiconductor device can also comprise a thin film tunneling layer with the thickness of 0.5-10n, which is arranged between the crystalline silicon substrate and the doped semiconductor layerm; the thin film tunneling layer is silicon oxide (SiO) 2 ) Silicon nitride (SiN) x ) Silicon oxynitride (SiO) x N y ) Alumina (Al) 2 O 3 ) And titanium oxide (TiO) 2 ) Any of which may be used.
The double-sided solar cell comprises the passivation contact electrode structure, wherein the passivation contact electrode structure is manufactured on the back surface or two sides of the crystalline silicon substrate. The front surface refers to the surface of the formed solar cell facing sunlight when in operation, and the back surface refers to the surface of the formed solar cell facing away from sunlight.
In one embodiment of the invention, the passivation contact electrode structure is manufactured on the back surface of the crystalline silicon substrate, and the doped crystalline silicon layer and the copper electrode are manufactured on the front surface of the crystalline silicon substrate. The doped crystal silicon layer is formed by doping directly on the surface of the crystal silicon substrate. The polarity of the doped crystalline silicon layer positioned on the front surface is different from that of the doped semiconductor layer positioned on the back surface in the passivation contact electrode structure, and the doping polarity of any layer of the doped crystalline silicon layer and the doped semiconductor layer is the same as that of the crystalline silicon substrate and the doping concentration of any layer of the doped crystalline silicon layer and the doped semiconductor layer is larger than that of the crystalline silicon substrate.
In a second embodiment of the present invention, the passivation contact electrode structures are formed on the front surface and the back surface of the crystalline silicon substrate, the doped semiconductor layer on the front surface and the doped semiconductor layer on the back surface have different polarities, and the doped semiconductor layer on any side has the same doping polarity as the crystalline silicon substrate and has a doping concentration greater than that of the crystalline silicon substrate.
As a further improvement of the invention, it comprises depositing a transparent anti-reflection layer on the front or both sides of the cell, said transparent anti-reflection layer being interposed between the doped crystalline silicon layer and the copper electrode; the transparent antireflection films on the front and the back of the battery are the same or different; the transparent anti-reflection layer comprises any one or two of a dielectric film or a transparent conductive film (TCO), wherein the dielectric film is SiO 2 、SiN x 、Al 2 O 3 、SiO x N y Or TiO 2 Either or both of the TCOs are Indium Tin Oxide (ITO), tungsten doped indium oxide (IWO), aluminum doped zinc oxide (ZnO) z Al), doped withGallium zinc oxide (ZnO) z GA) and Zn-in-Sn-O (ZITO).
As a further improvement of the invention, the solar cell fabricated comprises a double sided no-main-grid cell structure. The passivation contact electrode structure of the solar cell is applied to the manufacturing process of the cell structure without the main grid.
As a further improvement of the invention, the solar cell also comprises a selective emitter which is arranged on the doped crystal silicon layer on the front surface of the cell and is in contact with the local heavily doped layer of the copper electrode, and the polarity of the selective emitter is opposite to that of the crystal silicon substrate
The manufacturing method of the bifacial solar cell with the passivated contact electrode structure comprises the following steps:
step one: cleaning and texturing the crystalline silicon substrate;
step two: thin film tunneling layers may or may not be fabricated on the back side or both sides of the cell as desired. Then making a doped crystal silicon layer or a doped semiconductor layer with the same polarity or opposite polarity with the crystal silicon substrate on the front surface of the battery; specifically, if the passivation contact electrode structure is manufactured on the front surface of the battery, a doped semiconductor layer is deposited on the front surface; if the electrode fabricated on the front side of the cell does not have a passivation contact structure, a doped crystalline silicon layer is deposited. Then, the back of the battery is provided with a doped crystalline silicon layer or a doped semiconductor layer with different polarity from the doped crystalline silicon layer or the doped semiconductor layer on the front of the crystalline silicon substrate;
step three: a single or double layer transparent antireflective layer comprising either or both of a dielectric film or TCO is fabricated on the front side or both sides of the cell. Comprising the following points: 1. the transparent antireflection layer is manufactured on the front side of the battery, and the transparent antireflection layer can be manufactured on the back side of the battery, or the battery antireflection layer can be not manufactured. 2. The transparent antireflection layer comprises two materials: the dielectric film and the TCO, the transparent anti-reflection layer on the same side can comprise a single-layer film deposited by any one material, and can also comprise a double-layer film deposited by one or two materials. 3. Meanwhile, transparent antireflection layers are manufactured on two sides, a single-layer film can be deposited on one side of the transparent antireflection layer, a double-layer film can be deposited on the other side of the transparent antireflection layer, or the transparent antireflection layer and the double-layer film are respectively formed on two sides of the transparent antireflection layer, and materials for manufacturing the antireflection layers on two sides of the transparent antireflection layer can be the same or different.
Step four: copper electrodes are manufactured on the front side and the back side of the battery: the method comprises the steps of firstly manufacturing a patterned mask or slotting a dielectric film on the front surface and the back surface of the battery according to a grid line pattern, and then manufacturing a copper electrode at the opening of the patterned mask or the slotting position of the dielectric film. If the back copper electrode is manufactured by adopting a patterned mask method, the mask after the electrode manufacturing is completed can be removed or can be reserved.
In the fourth step, a local heavily doped layer with the polarity opposite to that of the crystalline silicon substrate is manufactured in the area, corresponding to the slotting, of the front face of the battery, and the local heavily doped layer is contacted with a copper electrode manufactured later to form a selective emitter.
Further, in one embodiment of the present invention, the method of grooving the dielectric film on the front and back sides of the cell in step four includes patterning mask-chemical etching, laser ablation, laser doping.
As a further improvement of the present invention, the process of preparing the copper electrode on the dielectric film is to sequentially prepare a nickel barrier layer using electroless plating or electroplating, prepare a copper conductive layer using electroplating, and prepare a tin or silver protective layer using electroless plating or electroplating. In the manufacturing process, the battery piece after the nickel barrier layer or the protective layer is manufactured is also required to be sintered in nitrogen or inert gas environment to form nickel-silicon alloy (NiSi X ) The sintering temperature is about 300-500 ℃ and the sintering time is about 0.5-2min.
As a further improvement of the present invention, in step four, the copper electrode deposited on the TCO on the front or back of the cell may include either or both of the seed layer or the protective layer, in addition to the copper conductive layer.
The invention has the beneficial effects that: this patent provides a passivation contact electrode structure that adopts electroplated copper process metallization, compares in the electrode structure of current PERC battery, and this patent passivation contact electrode structure carries out single face or the full surface passivation of two sides to solar cell and makes passivation effect more thoroughly, has passivated the contact of all metal electrodes, has reduced the surface recombination efficiency of photogenerated carrier. Meanwhile, TCO can be used on a passivation contact electrode structure, and the increase of series resistance and the composite effect caused by transverse transportation of an emitter carrier are avoided.
Meanwhile, the patent provides a metallization solution applied to the passivation contact electrode structure, compared with the existing laboratory metallization process which cannot be produced in mass, the metallization solution is feasible in mass production, and the electroplated copper is used as a conductive layer to replace silver, so that the production cost of the battery is reduced. In addition, compared with the screen printing and burning-through technology, the scheme has no requirement on the thickness of the heavily doped semiconductor layer in the passivation contact electrode structure, the thickness of the heavily doped semiconductor layer can be smaller than 20nm by being matched with the TCO film, the passivation effect is not weakened due to the burning-through high-temperature process, the double-sided rate is greatly improved, and the radiation loss and the composite loss in the heavily doped layer are reduced.
Drawings
Fig. 1 is a schematic structural diagram of a solar cell fabricated by a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a solar cell fabricated by a second embodiment of the present invention;
fig. 3 is a schematic structural view of a solar cell fabricated by a third embodiment of the present invention;
fig. 4 is a schematic structural diagram of a solar cell fabricated by a fourth embodiment of the present invention;
fig. 5 is a schematic structural diagram of a solar cell fabricated by a fifth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The principle of application of the invention is described in detail below with reference to the accompanying drawings. The copper electrode refers to the main part of the electrode, namely the metallized electrode with a conductive layer of copper. Since the "transparent anti-reflective layer" described above is formed of a dielectric film, a transparent conductive film (TCO), or a combination of dielectric film and TCO, in the embodiments described below, the "transparent anti-reflective layer" is formed with a transparent layer that is one or both of passivation, conductive, or anti-reflective due to the different materials used. For clarity and conciseness of illustration, it is therefore referred to as a functional antireflective layer in the various embodiments that follow. For example, an antireflection layer having a conductive effect is referred to as a transparent conductive antireflection layer.
Example 1
Fig. 1 illustrates an exemplary diagram of fabricating a solar cell according to an embodiment of the present invention.
The crystalline silicon substrate 110 may be an n-type or p-type crystalline silicon wafer having a thickness of 70 to 250 μm. In this embodiment, the crystalline silicon substrate 110 is preferably a p-type crystalline silicon wafer, which may be monocrystalline or polycrystalline. The p-type crystalline silicon substrate 110 is subjected to a cleaning texturing process. And performing phosphorus diffusion on the front surface of the p-type crystalline silicon substrate after texturing to form an emitter of the n-type doped crystalline silicon layer 120.
And manufacturing a passivation contact electrode structure on the back of the battery. The passivation contact electrode structure includes a doped semiconductor layer 140 deposited on the crystalline silicon substrate 110, which is one of doped polysilicon, microcrystalline silicon or microcrystalline silicon-carbon alloy, having a thickness of about 5-100nm, and a copper electrode 172 formed on the doped semiconductor layer 140 using an electroplating method. In some embodiments, the doped semiconductor layer 140 may be uniformly doped or non-uniformly doped with a concentration gradient.
In this embodiment, the doped semiconductor layer 140 is formed by depositing a polysilicon layer 140 by LPCVD or PECVD, preferably 5-50nm thick, and then p-type heavily doping the polysilicon layer 140 by diffusion or ion implantation.
In this embodiment, the passivation contact electrode structure further comprises a layer of SiO formed by thermal oxidation, ozone oxidation, nitric acid oxidation or chemical vapor deposition 2 Tunneling thin film layer 130 preferably has a thickness of 1-5nm. The tunneling film layer 130 is located between the doped semiconductor layer 140 and the crystalline silicon substrate 110.
In this embodiment, a SiNx transparent film is formed on the n-type crystalline silicon layer 120 on the front surface of the cell by PECVD method as the passivation and antireflection layer 150, and the thickness is preferably 60-150nm. And TCO160 is deposited on the cell back side polysilicon film layer 140 surface to form a transparent conductive antireflective layer. In this embodiment, the TCO160 may be an ITO layer deposited using magnetron sputtering, preferably 80-150nm thick.
The steps of patterning the front and back surfaces of the battery and manufacturing the copper electrode may be sequentially performed on both surfaces, or one or more steps may be simultaneously performed on both surfaces.
In this embodiment, a patterned mask layer is first formed on the passivation anti-reflection layer 150 on the front surface of the battery, and in this embodiment, a mask layer containing a polymer material is first formed on the surface by spin coating, and the mask layer has a photosensitive component. The masking layer is selectively UV exposed using a local shadow mask and developed. The passivation anti-reflection layer 150 is notched at the mask layer opening using a chemical etching method. A nickel barrier layer is formed at the grooves of the passivation anti-reflection layer 150 by electroless plating or electroplating to a thickness of about 0.1-2 μm. In order to reduce carrier recombination due to metal-semiconductor contact characteristics and reduce contact resistance, it is necessary to place the cell in a nitrogen atmosphere after the fabrication of a nickel barrier layer or after the fabrication of a barrier layer/conductive layer/protective layer stack and to perform a sintering process at a temperature of about 300-500 ℃ for a period of about 0.5-2min to form NiSi at the contact of the barrier layer with the n-type crystalline silicon layer X The alloy improves the contact performance of the copper electrode. A copper conductive layer having a thickness of about 3-20 μm is then formed on the nickel barrier layer using a photoinduced plating method, and a tin or silver protective layer having a thickness of about 0.1-2 μm is formed using an electroless plating or electroplating method to form the front copper electrode 171.
A patterned masking layer is formed on the surface of the TCO160 on the back side of the cell using a similar photolithographic process to the front side and a copper electrode is formed at the opening of the masking layer, including a direct electroplating process to form a copper conductive layer having a thickness of about 3-20 μm on the surface of the TCO160 and a silver protective layer having a thickness of about 0.1-2 μm on the copper conductive layer using electroless plating to form the back side copper electrode 172.
The mask is removed simultaneously from both sides.
Example 2
Fig. 2 illustrates an example diagram of manufacturing a solar cell according to a second embodiment of the present invention.
In this embodiment, the crystalline silicon substrate 210 is an n-type crystalline silicon wafer, which may be monocrystalline or polycrystalline. The n-type crystalline silicon substrate 210 is subjected to a cleaning texturing process. And performing boron diffusion on the front surface of the n-type crystalline silicon substrate 210 after texturing to form a p-type crystalline silicon layer 220 emitter.
A polysilicon layer 230 is deposited on the back surface of the crystalline silicon substrate 210 using an LPCVD method or a PECVD method, preferably to a thickness of 5-50nm, and then the polysilicon layer 230 is heavily doped n-type using an ion implantation method.
Al having a thickness of about 2-20nm is formed on the cell front side p-type crystalline silicon layer 220 using PECVD or Atomic Layer Deposition (ALD) processes 2 O 3 Layer 251 and deposition of 40-100nm SiN thereon by PECVD x Layer 252, which are stacked as passivation anti-reflection layers.
TCO240 is deposited on the cell backside polysilicon film layer 230 surface to form a transparent conductive anti-reflective layer. In this embodiment, TCO240 may be formed by reactive plasma deposition (LPCVD) to a thickness of preferably 80-150nm.
Passivation anti-reflection layers 251 and 252 are grooved according to the front side metallization pattern on the front side of the cell using laser ablation. A localized p-type heavily doped layer 280 is fabricated at the trenches using ion implantation to form the select emitter.
A nickel barrier layer having a thickness of about 0.1-2 μm is formed at the local p-type heavily doped layer 280 using an electroless plating or electroplating method, a copper conductive layer having a thickness of about 3-20 μm is formed on the nickel barrier layer using a photoinduced electroplating method, and a tin or silver protective layer having a thickness of about 0.1-2 μm is formed using an electroless plating or electroplating method. Placing the cell in nitrogen environment, and sintering at 300-500deg.C for 0.5-2min to form NiSi at the contact point of barrier layer and n-type crystal silicon layer X And (3) alloy. Then forming the front copper electrode 2 of the battery71。
A patterned mask layer 290 was formed on the surface of the cell back TCO260 using a similar photolithography process as in example 1, and a copper electrode was formed at the opening of the mask layer 290, including a nickel seed layer having a thickness of about 0.1-2 μm formed on the surface of the TCO260 by electroless plating, a copper conductive layer having a thickness of about 3-20 μm by electroplating, and a silver protective layer having a thickness of about 0.1-2 μm formed by electroplating, to form the cell back electrode 272. The back side does not require removal of mask 290.
Example 3
Fig. 3 illustrates another exemplary diagram of fabricating a solar cell according to an embodiment of the present invention.
In this embodiment, the crystalline silicon substrate 310 is an n-type crystalline silicon wafer, which may be monocrystalline or polycrystalline silicon wafer. The n-type crystalline silicon substrate 310 is subjected to a cleaning texturing process. And performing phosphorus diffusion on the front surface of the n-type crystalline silicon substrate 310 after texturing to form an n-type heavily doped crystalline silicon layer 320.
Forming SiN on cell backside using PECVD x Tunneling thin film layer 330 preferably has a thickness of 1-5nm.
In SiO 2 Microcrystalline silicon layer 340 is deposited on tunneling film layer 330 using a PECVD or HWCVD process, preferably 5-50nm thick, and then p-type doping is performed on microcrystalline silicon layer 340 using an ion implantation process.
Deposition of 80-150nm SiN on cell front side n-type heavily doped crystalline silicon layer 320 using PECVD x The layer acts as a passivation anti-reflection layer 350.
A patterned mask layer was formed on the surface of the back side microcrystalline silicon layer 340 using a similar photolithography method as in example 1, and a copper electrode was formed at the opening of the mask layer, including forming a copper conductive layer having a thickness of about 3-20 μm on the surface of the microcrystalline silicon layer 340 by an electroplating method, to form a back side copper electrode 372 of the cell. The back mask is then removed.
The passivation anti-reflection layer 350 is grooved according to the front side metallization pattern on the front side of the cell using laser ablation. The nickel barrier layer with thickness of about 0.1-2 μm is prepared at the grooving position by electroless plating or electroplating, the cell is placed in nitrogen environment and sintered at about 300-500 ℃ for about 0.5-2min to form a barrier layer and n-type layerFormation of NiSi at contact of crystalline silicon layer X The alloy is used to make a copper conductive layer with a thickness of about 3-20 μm on the nickel barrier layer by photoinduced electroplating, and a tin or silver protective layer with a thickness of about 0.1-2 μm is made by electroless plating or electroplating. A front side copper electrode 371 is then formed.
The formed battery is a battery without a main grid, and is characterized in that each secondary grid line on the front side and the back side has a width of about 12-45 mu m and a height of about 2-15 mu m. The spacing between adjacent sub-grid lines of the front copper electrode 371 is 1.10-1.55mm, and the spacing between adjacent grid lines of the back copper electrode 372 is 0.85-1.30mm. The solar cell structure without the main grid can realize cell piece interconnection by using a lamination interconnection technology or an intelligent network interconnection technology without the main grid.
Example 4
Fig. 4 illustrates an exemplary diagram of fabricating a solar cell according to an embodiment of the present invention.
In this embodiment, the crystalline silicon substrate 410 is an n-type crystalline silicon wafer, which may be monocrystalline or polycrystalline. The n-type crystalline silicon substrate 410 is subjected to a cleaning texturing process.
Forming a layer of SiO on the front and back of the cell by ozone oxidation deposition 2 Tunneling film layers 421 and 422 are preferably 1-5nm thick.
On both sides SiO 2 Each of tunneling film layers 421 and 422 is deposited with a microcrystalline silicon-carbon alloy layer 430 and 440 formed of hydrogenated amorphous silicon and elemental carbon, preferably 5-50nm thick, using a PECVD process. Compared with an amorphous silicon layer, the microcrystalline silicon-carbon layer is not easy to bubble and has better stability. The front side microcrystalline silicon carbon layer 430 is then p-doped and the back side microcrystalline silicon carbon layer 440 is heavily n-doped using diffusion. In some embodiments, an amorphous intrinsic layer is further provided as a buffer layer between the microcrystalline silicon carbon layer 430 and/or 440 and the tunneling film layer 421 and/or 422 on the same side thereof.
TCO450 is deposited on the surface of the cell front side p-type microcrystalline silicon carbon layer 430 to form a transparent conductive anti-reflection layer. In this embodiment, the TCO450 may be an ITO layer deposited using magnetron sputtering, preferably 80-150nm thick.
A SiNx transparent film is formed as a passivation anti-reflection layer 460 on the back side of the cell on the heavily n-type heavily doped microcrystalline silicon carbon layer 440 by PECVD, preferably 60-150nm in thickness.
Laser grooving is performed on the cell backside passivation anti-reflection layer 460. Electroplating to form nickel barrier layer with thickness of about 0.1-2 μm at the notch of passivation anti-reflection layer 460, placing the cell in nitrogen environment, and sintering at about 300-500deg.C for about 0.5-2min to form NiSi at the contact of barrier layer and n-type crystalline silicon layer X The alloy improves the contact performance of the metal electrode. A copper conductive layer having a thickness of about 3-20 μm is then formed on the nickel barrier layer using a photoinduced plating method, and a tin protective layer having a thickness of about 0.1-2 μm is formed using an electroless plating or electroplating method to form the back electrode 472 of the battery.
A patterned mask layer is formed on the surface of the front TCO450 of the cell using photolithographic methods and copper electrodes are formed at the openings in the mask layer, including electroplating a nickel seed layer having a thickness of about 0.1-2 μm on the surface of the TCO450, electroplating a copper conductive layer having a thickness of about 3-20 μm and electroless plating a tin protective layer having a thickness of about 0.1-2 μm to form the front electrode 471 of the cell. And finally removing the mask.
Example 5
Fig. 5 illustrates an exemplary diagram of fabricating a solar cell according to an embodiment of the present invention.
In this embodiment, the crystalline silicon substrate 510 is a p-type crystalline silicon wafer, which may be monocrystalline or polycrystalline. The p-type crystalline silicon substrate 510 is subjected to a cleaning texturing process.
Forming a layer of SiO on the front and back of the cell by thermal oxidation deposition 2 Tunneling film layers 521 and 522 are preferably 1-5nm thick.
On both sides SiO 2 Each of tunnel film layers 521 and 522 is deposited with a polysilicon layer 530 and 540, preferably 5-50nm thick, using LPCVD, and then front side polysilicon layer 530 is n-doped and back side polysilicon layer 540 is heavily p-doped using diffusion.
TCOs 551 and 552, preferably 80-150nm thick, are deposited on the surface of the n-type and p-type polysilicon thin film layers 530 and 540 on the front and back sides of the cell to form transparent conductive anti-reflective layers.
A patterned mask layer is fabricated using photolithography on both the front and back TCOs 551 and 552 of the cell in accordance with the gate line pattern of the respective surface metallization electrodes.
Nickel seed layers having a thickness of about 0.1-2 μm are formed on the cell front and back TCOs 551 and 552 using an electroplating process, which produces a copper conductive layer having a thickness of about 3-20 μm and a tin protective layer having a thickness of about 0.1-2 μm is formed by an electroless plating process to form cell front electrode 571 and back electrode 572. Finally, the mask is removed from both sides.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. The passivation contact electrode structure applied to the solar cell is characterized in that: comprising a doped semiconductor layer deposited on a crystalline silicon substrate, and a copper electrode on the doped semiconductor layer; the doped semiconductor layer is any one of polysilicon, microcrystalline silicon or microcrystalline silicon-carbon alloy, and the thickness is 5-100nm;
the passivation contact electrode structure is manufactured on the back surface or two surfaces of the crystalline silicon substrate;
depositing a transparent anti-reflection layer on the front surface or both surfaces of the battery, wherein the transparent anti-reflection layer is arranged between the doped crystal silicon layer and the copper electrode; the transparent antireflection films on the front and the back of the battery are the same or different; the transparent anti-reflection layer comprises any one or two of a dielectric film or a transparent conductive film, wherein the dielectric film is any one or two of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or titanium oxide, and the transparent conductive film is any one or two of indium tin oxide, tungsten doped indium oxide, aluminum doped zinc oxide, gallium doped zinc oxide and Zn-in-Sn-O;
the selective emitter is arranged on the doped crystalline silicon layer on the front side of the battery and is in contact with the local heavily doped layer of the copper electrode, and the polarity of the selective emitter is opposite to that of the crystalline silicon substrate.
2. The passivated contact electrode structure of claim 1, characterized in that: the semiconductor device further comprises a thin film tunneling layer arranged between the crystalline silicon substrate and the doped semiconductor layer, and the thickness of the thin film tunneling layer is 0.5-10nm; the thin film tunneling layer is any one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and titanium oxide.
3. The passivated contact electrode structure of claim 1, characterized in that: and manufacturing the passivation contact electrode structure on the back surface of the crystalline silicon substrate, manufacturing a doped crystalline silicon layer and a copper electrode on the front surface of the crystalline silicon substrate, wherein the polarity of the doped crystalline silicon layer positioned on the front surface is different from that of the doped semiconductor layer positioned in the passivation contact electrode structure on the back surface, and the doping polarity of any layer of the doped crystalline silicon layer and the doped semiconductor layer positioned on the back surface is the same as that of the crystalline silicon substrate and the doping concentration of any layer of the doped crystalline silicon layer and the doped semiconductor layer is larger than that of the crystalline silicon substrate.
4. The passivated contact electrode structure of claim 1, characterized in that: the passivation contact electrode structures are manufactured on the front side and the back side of the crystalline silicon substrate, the doped semiconductor layer on the front side and the doped semiconductor layer on the back side are different in polarity, and the doped semiconductor layer on any side is the same in doping polarity with the crystalline silicon substrate and is larger in doping concentration than the crystalline silicon substrate.
5. A passivated contact electrode structure according to claim 3 or 4, characterized in that: the manufactured solar cell comprises a double-sided non-main grid cell structure.
6. A method of making a bifacial solar cell having a passivated contact electrode structure as defined in claim 1, 3 or 4 comprising the steps of:
step one: cleaning and texturing the crystalline silicon substrate;
step two: the method comprises the steps of manufacturing a thin film tunneling layer on the back surface or both surfaces of a battery, manufacturing a doped crystalline silicon layer or a doped semiconductor layer with the same or opposite polarity as the crystalline silicon substrate on the front surface of the battery, and manufacturing a doped semiconductor layer with the different polarity from the doped crystalline silicon layer or the doped semiconductor layer on the front surface of the crystalline silicon substrate on the back surface of the battery;
step three: manufacturing a single-layer or double-layer transparent antireflection layer comprising any one or two of a dielectric film and a transparent conductive film on the front surface or both surfaces of the battery;
step four: copper electrodes are manufactured on the front side and the back side of the battery: firstly, manufacturing a patterned mask or slotting a dielectric film on the front and back of a battery according to a grid line pattern, and then manufacturing a copper electrode at an opening of the patterned mask or at a slotting position of the dielectric film;
the process of preparing copper electrode on the dielectric film is to use chemical plating or electroplating method to make nickel barrier layer, use electroplating method to make copper conductive layer, use chemical plating or electroplating method to make tin or silver protective layer; and sintering the battery piece manufactured on the nickel barrier layer or the protective layer in a nitrogen or inert gas environment to form the nickel-silicon alloy, wherein the sintering temperature is 300-500 ℃ and the sintering time is 0.5-2min.
7. The method of manufacturing a solar cell according to claim 6, wherein: and step four, manufacturing a local heavily doped layer with polarity opposite to that of the crystalline silicon substrate in a region corresponding to the slotting on the front surface of the battery, wherein the local heavily doped layer is contacted with a copper electrode manufactured later to form a selective emitter.
8. The method of manufacturing a solar cell according to claim 7, wherein: and in the fourth step, the method for grooving the dielectric films on the front and back of the battery comprises a patterning mask-chemical etching method, laser ablation and laser doping.
9. The method of manufacturing a solar cell according to claim 6, wherein: in the fourth step, the copper electrode deposited on the transparent conductive film on the front or back of the battery comprises a copper conductive layer, and further comprises or does not comprise any one layer or two layers of a seed layer or a protective layer.
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