CN115050843A - Tunneling oxide layer passivation contact battery back structure and preparation method and application thereof - Google Patents
Tunneling oxide layer passivation contact battery back structure and preparation method and application thereof Download PDFInfo
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- H01L31/02—Details
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- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
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- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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Abstract
The invention provides a tunneling oxide layer passivation contact battery back structure and a preparation method and application thereof. According to the back structure of the battery, a phosphorus-doped silicon thin film layer is deposited on boron-doped polycrystalline silicon, a nickel alloy layer which can block aluminum and provides good contact is deposited on the surface of the phosphorus-doped silicon thin film layer, the diffusion and deposition rate of nickel in the crystalline silicon body is low, most of nickel can form large particles to be deposited on the surface of the phosphorus-doped silicon thin film layer, the performance of the battery cannot be affected, the nickel alloy layer is very compact, the penetration of aluminum can be effectively blocked, and therefore the battery is guaranteed to have good passivation performance.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a tunneling oxide layer passivation contact cell back structure and a preparation method and application thereof.
Background
Polysilicon (poly-Si) and ultra-thin silicon oxide (SiOx) passivation contact technologies, abbreviated as TOPCon, have been of interest since 2013. The top efficiencies of the N-type and P-type solar cells of TOPCon technology are raised to 25.8% and 26.1%, respectively, under the efforts of various photovoltaic agencies around the world. The structure can avoid direct contact between the metal electrode and the silicon wafer, and remarkably improve the quality of surface passivation, thereby greatly improving the performance of the solar cell, and the open-circuit voltage (Voc) and the Filling Factor (FF) are higher than those of the traditional Passivated Emitter and Rear Contact (PERC) solar cell. And the compatibility between TOPCon and PERC is more than 70% in process and equipment, so that the TOPCon and PERC are considered as the most promising technology for upgrading the back surface of the PERC battery.
The electrode plays a role in collecting and leading out current in the solar cell. The back electrode of the P-type TOPCon cell usually adopts aluminum paste, on one hand, in order to form ohmic contact with P-type polysilicon; on the other hand, aluminum is much cheaper than silver, and the cost of the slurry can be obviously reduced; however, aluminum forms an alloy phase with silicon at a sintering temperature and rapidly diffuses in the silicon to a diffusion depth of tens of microns, so that the recombination of an aluminum contact area is very remarkable, and the battery efficiency is seriously influenced. If the polysilicon is made thick to block the penetration of aluminum, it will cause a large optical loss.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to solve the technical problem of how to inhibit the diffusion of aluminum to a silicon substrate so as to improve the efficiency of a battery.
In order to solve the above problems, a first aspect of the present invention provides a tunneling oxide layer passivation contact battery back structure, including a tunneling layer, a silicon oxide layer, a boron-doped polysilicon layer, a phosphorus-doped silicon thin film layer, and a passivation layer sequentially stacked on a crystalline silicon substrate, where the passivation layer has an opening exposing the phosphorus-doped silicon thin film layer, a nickel alloy layer is disposed at the opening of the passivation layer, and an aluminum electrode layer is disposed on the surface of the nickel alloy layer.
Further, the main component of the nickel alloy layer is selected from one or more of nickel, nickel-phosphorus alloy and nickel-boron alloy.
Furthermore, the nickel alloy layer is doped with one or more trace elements of chromium, copper, tin, silver and sulfur, and the doping amount is 0.01-1%.
Further, the thickness of the silicon oxide layer is 1-2 nm, the thickness of the boron-doped polycrystalline silicon layer is 20-200 nm, the thickness of the phosphorus-doped silicon thin film layer is 20-500 nm, the thickness of the nickel alloy layer is 20-10000 nm, preferably 100-200 nm, and the thickness of the aluminum electrode layer is 100-20000 nm.
Further, the phosphorus-doped silicon thin film layer is selected from phosphorus-doped polycrystalline silicon, phosphorus-doped amorphous silicon and phosphorus-doped microcrystalline silicon.
Further, the passivation layer is a laminated layer composed of aluminum oxide and silicon nitride.
Compared with the prior art, the tunneling oxide layer passivation contact battery back structure has the following beneficial effects: the back structure of the battery can give consideration to both low contact resistivity and passivation effect; depositing a phosphorus-doped silicon thin film layer on the boron-doped polysilicon layer, and depositing a nickel alloy layer which can block aluminum and provide good contact on the surface of the phosphorus-doped silicon thin film layer; the deposition rate of nickel and the diffusion rate in the crystalline silicon body are both low, and most of nickel can form large particles to be deposited on the surface of the phosphorus-doped silicon film, so that the performance of the battery cannot be influenced; the nickel alloy layer is very compact and can effectively prevent aluminum from penetrating, so that the battery is ensured to have good passivation performance; the nickel alloy layer material has low cost and is easy to realize mass production; the back electrode adopts nickel and aluminum metal, and has good chemical stability.
The second aspect of the present invention provides a method for preparing the above tunnel oxide layer passivation contact cell back structure, including the following steps:
s1, preparing a silicon oxide layer on the back of the crystalline silicon substrate;
s2, preparing a layer of boron-doped amorphous silicon on the silicon oxide layer;
s3, carrying out high-temperature annealing to form a tunneling layer and a boron-doped polycrystalline silicon layer;
s4, preparing a phosphorus-doped silicon thin film layer on the boron-doped polycrystalline silicon layer;
s5, preparing a passivation layer on the phosphorus-doped silicon thin film layer;
s6, opening holes of the passivation layer to perform hole opening treatment, and exposing the phosphorus-doped silicon thin film layer;
s7, preparing a nickel alloy layer on the phosphorus-doped silicon thin film layer corresponding to the opening part of the passivation layer by using a chemical plating method;
and S8, preparing an aluminum electrode layer on the nickel alloy layer by using a screen printing method, and sintering to obtain the back electrode.
Further, the electroless plating method in S7 is to deposit a nickel alloy layer on the phosphorus-doped amorphous silicon under the induction of optical field, electric field or sensitizer.
Further, the method for preparing boron-doped amorphous silicon in step S2 is PECVD, LPCVD, Sputtering, MWCVD, etc., and the method for preparing phosphorus-doped silicon thin film in step S4 by using tubular PECVD is PECVD, LPCVD, Sputtering, MWCVD, etc.
Further, the preparation method of the silicon oxide in the step S1 is selected from any one of the following technologies: any one of a wet chemical oxidation method, a high temperature oxidation method, a plasma-assisted oxidation method, an ozone gas oxidation method, and a plasma-assisted atomic layer deposition method.
Further, the passivation layer opening method in step S6 is laser opening or etching opening.
Compared with the prior art, the preparation method of the tunneling oxide layer passivation contact battery back structure has the following beneficial effects: the hole concentration in the boron-doped polycrystalline silicon is far higher than the electron concentration, the chemical nickel plating cannot be directly carried out, and the nickel plating process can be realized only by using electricity assistance and the like; plating a nickel alloy layer on the phosphorus-doped silicon thin film layer by a chemical plating technology, wherein the nickel alloy layer has good adhesion with the phosphorus-doped silicon thin film, and can form good ohmic contact by adjusting the components of the nickel alloy layer and annealing treatment to obtain low contact resistivity; the chemical nickel plating has the self-alignment characteristic, and only deposits on the phosphorus doped silicon film layer, thereby being beneficial to simplifying the process complexity; the nickel alloy layer is provided with the screen printing aluminum paste, so that compared with an electroplating method, the production capacity is higher, and the cost is lower; the preparation method is simple, low in cost and suitable for industrial mass production.
The third aspect of the invention provides an application of the tunnel oxide layer passivation contact battery back structure, and the tunnel oxide layer passivation contact battery back structure is applied to an N-type or P-type tunnel oxide layer passivation contact solar battery.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for fabricating a back structure of a contact cell with passivation of a tunnel oxide layer in an embodiment;
fig. 2 is a schematic structural diagram of a contact cell passivated by a tunnel oxide layer in embodiment 4.
Description of reference numerals:
the solar cell comprises a 1-crystalline silicon substrate, a 2-tunneling layer, a 3-silicon oxide layer, a 4-boron doped polycrystalline silicon layer, a 5-phosphorus doped silicon thin film layer, a 6-passivation layer, a 7-nickel alloy layer, an 8-aluminum electrode layer, a 9-boron emitter and a 10-silver electrode.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It should be noted that the following examples are only used to illustrate the implementation method and typical parameters of the present invention, and are not used to limit the scope of the parameters of the present invention, so that reasonable variations can be made and still fall within the protection scope of the claims of the present invention.
It is noted that the endpoints of the ranges and any values disclosed herein are not limited to the precise range or value, and that such ranges or values are understood to encompass values close to those ranges or values. For ranges of values, between the endpoints of each of the ranges and the individual points, and between the individual points may be combined with each other to give one or more new ranges of values, and these ranges of values should be considered as specifically disclosed herein.
The embodiment of the invention provides a tunneling oxide layer passivation contact battery back structure which comprises a tunneling layer 2, a silicon oxide layer 3, a boron-doped polycrystalline silicon layer 4, a phosphorus-doped silicon thin film layer 5 and a passivation layer 6 which are sequentially overlapped on a crystalline silicon substrate 1, wherein the passivation layer 6 is provided with an opening for exposing the phosphorus-doped silicon thin film layer 5, a nickel alloy layer 7 is arranged at the opening part of the passivation layer 6, and an aluminum electrode layer 8 is arranged on the surface of the nickel alloy layer 7. The back structure of the tunneling oxide layer passivation contact battery forms good ohmic contact through the nickel alloy layer 7 to obtain low contact resistivity, the nickel alloy layer 7 can inhibit aluminum from diffusing to a silicon substrate, and therefore the battery is guaranteed to have good passivation performance, and the structure can be applied to an N-type or P-type tunneling oxide layer passivation contact solar battery, and therefore the battery efficiency is improved.
With reference to fig. 1, the method for preparing the back structure of the tunnel oxide layer passivation contact battery includes the following steps:
s0, performing RCA standard cleaning on the crystalline silicon substrate 1
S1, preparing a silicon oxide layer 3 on the back of the crystalline silicon substrate 1, wherein the silicon oxide is prepared by any one of a wet chemical oxidation method, a high-temperature oxidation method, a plasma-assisted oxidation method, an ozone gas oxidation method and a plasma-assisted atomic layer deposition method, and the thickness of the silicon oxide layer 3 is 1-2 nm;
s2, preparing a layer of boron-doped amorphous silicon on the silicon oxide layer 3, and preparing the boron-doped amorphous silicon by adopting PECVD (plasma enhanced chemical vapor deposition), LPCVD (low pressure chemical vapor deposition), spraying, MWCVD (metal wrap through chemical vapor deposition) and other methods, wherein the thickness of the boron-doped amorphous silicon is 20-200 nm;
s3, annealing the sample deposited with the boron-doped amorphous silicon layer at 800-950 ℃ in a diffusion annealing furnace to form a tunneling layer 2 and a boron-doped polycrystalline silicon layer 4;
s4, preparing a phosphorus-doped silicon thin film layer 5 on the boron-doped polycrystalline silicon layer 4, wherein the phosphorus-doped silicon thin film is phosphorus-doped polycrystalline silicon, phosphorus-doped amorphous silicon or phosphorus-doped microcrystalline silicon, the phosphorus-doped silicon thin film is prepared by adopting PECVD (plasma enhanced chemical vapor deposition), LPCVD (low pressure chemical vapor deposition), Sputtering, MWCVD (metal wrap around chemical vapor deposition) and other methods, and the thickness of the phosphorus-doped silicon thin film layer 5 is 20-500 nm; the phosphorus-doped silicon thin film layer 5 provides electrons for a subsequent chemical nickel plating process, so that a complex electric auxiliary nickel plating process is avoided;
s5, preparing a passivation layer 6 on the phosphorus-doped silicon thin film layer 5, wherein the passivation layer 6 is a laminated layer formed by aluminum oxide and a silicon nitride layer, the aluminum oxide is prepared by an ALD method, and the silicon nitride is prepared by a tubular PECVD method;
s6, opening holes in the passivation layer 6 to perform opening processing to expose the phosphorus-doped silicon thin film layer 5, wherein the opening method can be laser opening, or patterning can be formed by methods such as photoetching, spraying and printing, and then the opening is formed by an etching method;
s7, preparing a nickel alloy layer 7 on the phosphorus-doped silicon thin film layer 5 corresponding to the opening part of the passivation layer 6 by using a chemical plating method, wherein the main component of the nickel alloy layer 7 is selected from one or more of nickel, nickel-phosphorus alloy and nickel-boron alloy, and can be doped with one or more trace elements of chromium, copper, tin, silver and sulfur, the doping amount is 0.01-1%, the thickness of the nickel alloy layer 7 is 20-10000 nm, and the preferable thickness is 100-200 nm; the nickel alloy layer 7 has good adhesion with the phosphorus-doped silicon film, and can form good ohmic contact through component adjustment and annealing treatment to obtain low contact resistivity;
s8, preparing an aluminum electrode layer 8 on the nickel alloy layer 7 by a screen printing method, wherein the thickness of the aluminum electrode layer 8 is 100-20000 nm; the aluminum paste is printed by a screen printing method, the nickel alloy layer 7 is very compact and can effectively prevent the aluminum paste from penetrating, so that the battery has good passivation performance, the battery is sintered by a chain furnace, the aluminum paste and the alloy nickel layer form good ohmic contact, the sintering temperature is 400-600 ℃, and the back electrode is prepared.
If a layer of nickel alloy is deposited on the surface of the polysilicon by photo-induced electroless plating, which can block aluminum and provide good contact, it is generally desirable that the surface of the polysilicon be capable of providing electrons. However, for the P-type TOPCon battery, the surface of the P-type TOPCon battery is made of boron-doped polysilicon, electrons cannot be provided, and if nickel plating is to be realized, an electrically-assisted chemical plating method is adopted, so that the process is very complicated. According to the method, the phosphorus-doped silicon film is deposited on the boron-doped polycrystalline silicon, so that electrons are provided for a subsequent chemical nickel plating process, the complex electrically-assisted nickel plating process is avoided, the preparation method is simple, the cost is low, and the method is suitable for industrial mass production.
The present invention will be described in detail below by way of specific examples, which provide solar cells that are P-type tunnel oxide passivated contact cells.
Example 1
Carrying out double-sided alkali polishing and cleaning on an N-type crystalline silicon substrate; preparing ultrathin silicon oxide layers on the front and back surfaces of a silicon wafer by a nitric acid oxidation method; depositing 30nm boron-doped amorphous silicon on two sides by adopting a PECVD method; annealing at 850-950 ℃ to form a tunneling layer and a boron-doped polysilicon layer; after removing the oxide layer by HF treatment, depositing a 30nm phosphorus-doped amorphous silicon layer on two sides by PECVD, and performing rapid thermal annealing at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer; covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to prepare a passivation layer; then carrying out laser opening on the passivation layer; preparing a 20nm nickel alloy layer at the opening part of the passivation layer by adopting a chemical plating method, and annealing at the temperature of 150-; then, printing a 100nm aluminum electrode layer on the nickel alloy layer by a screen printing method; and then, carrying out belt furnace sintering treatment to obtain the tunneling oxide layer passivated contact battery.
Example 2
Carrying out double-sided alkali polishing and cleaning on an N-type crystalline silicon substrate; preparing ultrathin silicon oxide layers on the front and back surfaces of a silicon wafer by a nitric acid oxidation method; depositing 30nm boron-doped amorphous silicon on two sides by adopting a PECVD method; annealing at 850-950 ℃ to form a tunneling layer and a boron-doped polysilicon layer; after removing the oxide layer by HF treatment, depositing a 30nm phosphorus-doped amorphous silicon layer on two sides by PECVD, and performing rapid thermal annealing at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer; covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to prepare a passivation layer; then carrying out laser opening on the passivation layer; preparing a 200nm nickel alloy layer at the opening part of the passivation layer by adopting a chemical plating method, and annealing at the temperature of 150-; then, printing a 100nm aluminum electrode layer on the nickel alloy layer by a screen printing method; and then, carrying out belt furnace sintering treatment to obtain the tunneling oxide layer passivation contact battery.
Example 3
Carrying out double-sided alkali polishing and cleaning on an N-type crystalline silicon substrate; preparing ultrathin silicon oxide layers on the front and back surfaces of a silicon wafer by a nitric acid oxidation method; depositing 30nm boron-doped amorphous silicon on two sides by adopting a PECVD method; annealing at 850-950 ℃ to form a tunneling layer and a boron-doped polysilicon layer; after removing the oxide layer by HF treatment, depositing a 30nm phosphorus-doped amorphous silicon layer on two sides by PECVD, and performing rapid thermal annealing at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer; covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to prepare a passivation layer; then carrying out laser opening on the passivation layer; preparing a 2000nm nickel alloy layer at the opening part of the passivation layer by adopting a chemical plating method, and annealing at the temperature of 150-; then, printing a 100nm aluminum electrode layer on the nickel alloy layer by a screen printing method; and then, carrying out belt furnace sintering treatment to obtain the tunneling oxide layer passivated contact battery.
Comparative example 1
Carrying out double-sided alkali polishing and cleaning on an N-type crystalline silicon substrate; preparing ultrathin silicon oxide layers on the front and back surfaces of a silicon wafer by a nitric acid oxidation method; depositing 30nm boron-doped amorphous silicon on two sides by adopting a PECVD method; annealing at 850-950 ℃ to form a tunneling layer and a boron-doped polysilicon layer; after removing the oxide layer by HF treatment, depositing a 30nm phosphorus-doped amorphous silicon layer on two sides by PECVD, and performing rapid thermal annealing at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer; covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to prepare a passivation layer; then carrying out laser opening on the passivation layer; printing a 100nm aluminum electrode layer on the phosphorus-doped amorphous silicon layer by a screen printing method; and then, carrying out belt furnace sintering treatment to obtain the tunneling oxide layer passivated contact battery.
The tunnel oxide layer-passivated contact cells prepared in examples 1-3 and comparative example 1 were tested for key parameters and the results are shown in table 1 below.
TABLE 1 comparison of key parameters of TOPCon cells of examples and comparative examples
According to the detection results, the service life, the dark saturation current density, the hidden open-circuit voltage, the contact resistance and other key parameters of the tunneling oxide layer passivated contact battery prepared in the embodiments 1-3 are superior to those of the comparative embodiment 1, wherein the performance of the embodiment 2 is optimal, and the fact that the tunneling oxide layer passivated contact battery back surface structure has low contact resistivity and a good passivation effect is shown, so that the battery performance can be greatly improved.
Example 4
Cleaning an N-type crystalline silicon substrate 1, texturing on two sides, and expanding boron on one side (front surface) to form a boron emitter 9; performing acid etching treatment on the non-expanded boron surface to remove the boron-plated layer and the suede; preparing ultrathin silicon oxide on the back by a nitric acid oxidation method to form a silicon oxide layer 3; then preparing 30nm boron-doped amorphous silicon on the back silicon oxide by PECVD; annealing at 850-950 ℃ for different times to form a tunneling layer 2 and a boron-doped polysilicon layer 4 to obtain a TOPCon structure; after the oxide layer is removed by HF treatment, a 30nm phosphorus-doped amorphous silicon layer is deposited on the back surface of the substrate by PECVD, and the substrate is rapidly thermally annealed at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer 5; then, covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to form a passivation layer 6; subsequently, laser drilling is performed on the back passivation layer 6; plating nickel with the thickness of 200nm on the phosphorus-doped polysilicon layer 5 by adopting a chemical plating method, and annealing at the temperature of 150-600 ℃ to form a nickel alloy layer 7; printing 100nm aluminum paste on the nickel alloy layer 7 by a screen printing method, and then performing belt furnace sintering treatment to form an aluminum electrode layer 8; preparing a silver electrode 10 on the front surface by adopting a screen printing method; a tunnel oxide passivated contact solar cell as shown in figure 2 is produced. The average efficiency of the cell was tested to be greater than 23.5%.
Comparative example 2
Cleaning an N-type crystalline silicon substrate, texturing on two sides, and expanding boron on one side (front surface) to form a boron emitter; performing acid etching treatment on the non-boron-expanding surface to remove the boron-around-plating layer and the suede; preparing ultrathin silicon oxide on the back by a nitric acid oxidation method to form a silicon oxide layer; then preparing 30nm boron-doped amorphous silicon on the back silicon oxide by PECVD; annealing at 850-950 ℃ for different times to form a tunneling layer 2 and a boron-doped polysilicon layer to obtain a TOPCon structure; after removing the oxide layer by HF treatment, depositing a 30nm phosphorus-doped amorphous silicon layer on the back surface by PECVD, and performing rapid thermal annealing at the temperature of 500-800 ℃ to crystallize the amorphous silicon layer to form a phosphorus-doped polycrystalline silicon layer; then, covering and depositing the front and rear surfaces by adopting aluminum oxide and silicon nitride to form a passivation layer; then, laser opening is carried out on the back passivation layer; printing a 100nm aluminum electrode layer on the phosphorus-doped polycrystalline silicon by using a screen printing method, and then performing belt furnace sintering treatment; preparing a silver electrode on the front surface by adopting a screen printing method; and preparing the tunneling oxide layer passivation contact solar cell. The average efficiency of the cell was tested to be greater than 18.6%.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. The utility model provides a tunneling oxide layer passivation contact battery back structure which characterized in that, includes tunnel layer, silicon oxide layer, boron doping polycrystalline silicon layer, phosphorus doping silicon thin film layer and the passivation layer of superpose setting on the crystalline silicon substrate in proper order, the passivation layer has the trompil that exposes phosphorus doping silicon thin film layer, the trompil position of passivation layer is equipped with the nickel alloy layer, the surface of nickel alloy layer is equipped with the aluminium electrode layer.
2. The tunnel oxide layer passivated contact cell backside structure of claim 1 wherein the nickel alloy layer has a major component selected from one or more combinations of nickel, nickel-phosphorous alloy, and nickel-boron alloy.
3. The back structure of a contact cell passivated by a tunnel oxide layer according to claim 2 wherein the nickel alloy layer is doped with one or more trace elements selected from chromium, copper, tin, silver and sulfur in an amount of 0.01-1%.
4. The back structure of a tunneling oxide layer passivated contact battery according to claim 1, wherein the thickness of the silicon oxide layer is 1-2 nm, the thickness of the boron doped polysilicon layer is 20-200 nm, the thickness of the phosphorus doped silicon thin film layer is 20-500 nm, the thickness of the nickel alloy layer is 20-10000 nm, and the thickness of the aluminum electrode layer is 100-20000 nm.
5. The tunnel oxide layer passivated contact cell backside structure of claim 1 wherein the phosphorus doped silicon thin film layer is selected from phosphorus doped polysilicon, phosphorus doped amorphous silicon, and phosphorus doped microcrystalline silicon.
6. The tunnel oxide passivation contact cell backside structure of claim 1 wherein the passivation layer is a stack of aluminum oxide and silicon nitride.
7. A method for preparing a contact cell back structure passivated by a tunnel oxide layer according to any one of claims 1 to 6, comprising the steps of:
s1, preparing a silicon oxide layer on the back of the crystalline silicon substrate;
s2, preparing a layer of boron-doped amorphous silicon on the silicon oxide layer;
s3, carrying out high-temperature annealing to form a tunneling layer and a boron-doped polycrystalline silicon layer;
s4, preparing a phosphorus-doped silicon thin film layer on the boron-doped polycrystalline silicon layer;
s5, preparing a passivation layer on the phosphorus-doped silicon thin film layer;
s6, opening holes of the passivation layer to perform hole opening treatment, and exposing the phosphorus-doped silicon thin film layer;
s7, preparing a nickel alloy layer on the phosphorus-doped silicon thin film layer corresponding to the opening part of the passivation layer by using a chemical plating method;
and S8, preparing an aluminum electrode layer on the nickel alloy layer by using a screen printing method, and sintering to obtain the back electrode.
8. The method of claim 5, wherein the electroless plating process in S7 is to deposit a nickel alloy layer on the P-doped amorphous silicon under the induction of optical field, electric field or sensitizer.
9. The method for preparing the structure on the back side of the tunneling oxide layer passivated contact cell according to claim 5, wherein the preparation method of the silicon oxide in the S1 is selected from any one of the following technologies: wet chemical oxidation, high temperature oxidation, plasma assisted oxidation, ozone gas oxidation, plasma assisted atomic layer deposition.
10. The use of the tunnel oxide passivation contact cell back side structure of any of claims 1-4, wherein the tunnel oxide passivation contact cell back side structure is used in an N-type or P-type tunnel oxide passivation contact solar cell.
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| PCT/CN2022/113241 WO2023213025A1 (en) | 2022-05-06 | 2022-08-18 | Tunneling oxide layer passivation contact battery back structure, and preparation method therefor and use thereof |
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| WO2024066884A1 (en) * | 2022-09-29 | 2024-04-04 | 通威太阳能(眉山)有限公司 | Solar cell and manufacturing method therefor |
| WO2024109293A1 (en) * | 2022-11-22 | 2024-05-30 | 金阳(泉州)新能源科技有限公司 | Double-sided tunneling silicon oxide passivated back-contact solar cell and manufacturing method therefor |
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| CN117525179B (en) * | 2024-01-05 | 2024-04-02 | 通威太阳能(眉山)有限公司 | Solar cell, preparation method thereof and photovoltaic module |
| CN117525180B (en) * | 2024-01-05 | 2024-03-12 | 通威太阳能(眉山)有限公司 | Solar cell, preparation method thereof and photovoltaic module |
| CN117976744A (en) * | 2024-03-21 | 2024-05-03 | 金阳(泉州)新能源科技有限公司 | Back contact battery without monocrystalline silicon substrate, preparation method thereof and flexible battery assembly |
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