CN111697110A - Heterojunction solar cell and manufacturing method thereof - Google Patents
Heterojunction solar cell and manufacturing method thereof Download PDFInfo
- Publication number
- CN111697110A CN111697110A CN202010533230.XA CN202010533230A CN111697110A CN 111697110 A CN111697110 A CN 111697110A CN 202010533230 A CN202010533230 A CN 202010533230A CN 111697110 A CN111697110 A CN 111697110A
- Authority
- CN
- China
- Prior art keywords
- amorphous silicon
- silicon layer
- intrinsic amorphous
- layer
- flow rate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 158
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 66
- 238000006243 chemical reaction Methods 0.000 claims abstract description 62
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 62
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 48
- 239000010703 silicon Substances 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims description 46
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 34
- 238000000151 deposition Methods 0.000 claims description 34
- 229910052739 hydrogen Inorganic materials 0.000 claims description 34
- 239000001257 hydrogen Substances 0.000 claims description 34
- 229910000077 silane Inorganic materials 0.000 claims description 34
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 28
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 19
- 239000012495 reaction gas Substances 0.000 claims description 18
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 17
- UORVGPXVDQYIDP-UHFFFAOYSA-N borane Chemical compound B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 claims description 12
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 10
- 230000008021 deposition Effects 0.000 claims description 10
- 235000013842 nitrous oxide Nutrition 0.000 claims description 7
- 229910000085 borane Inorganic materials 0.000 claims description 6
- 150000002431 hydrogen Chemical class 0.000 claims description 6
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 5
- 239000005922 Phosphane Substances 0.000 claims description 2
- 229910000064 phosphane Inorganic materials 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 238000002161 passivation Methods 0.000 abstract description 7
- 230000000694 effects Effects 0.000 abstract description 6
- 235000012431 wafers Nutrition 0.000 description 42
- 239000010408 film Substances 0.000 description 37
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 6
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910020489 SiO3 Inorganic materials 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- WXRGABKACDFXMG-UHFFFAOYSA-N trimethylborane Chemical compound CB(C)C WXRGABKACDFXMG-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Life Sciences & Earth Sciences (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Sustainable Development (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention provides a heterojunction solar cell and a manufacturing method thereof. The heterojunction solar cell comprises an N-type silicon wafer with a first surface and a second surface, and further comprises a first intrinsic amorphous silicon layer, an N-type amorphous silicon layer, a first transparent conductive film and a first electrode which are sequentially stacked on the first surface, and a second intrinsic amorphous silicon layer, a P-type amorphous silicon layer, a second transparent conductive film and a second electrode which are sequentially stacked on the second surface, wherein a first silicon oxide layer is arranged between any one of the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer and the silicon wafer. The invention can effectively improve the passivation effect of the surface of the silicon chip, reduce leakage current and improve the open-circuit voltage and the photoelectric conversion efficiency of the battery.
Description
Technical Field
The invention relates to the field of solar cell manufacturing, in particular to a heterojunction solar cell and a manufacturing method thereof.
Background
The thin film/crystalline silicon heterojunction solar cell (hereinafter referred to as heterojunction solar cell, also called HIT or HJT or SHJ solar cell) belongs to the third generation high-efficiency solar cell technology, combines the advantages of crystalline silicon and a silicon thin film, has the characteristics of high conversion efficiency, low temperature coefficient and the like, and is one of the important development directions of high-efficiency crystalline silicon solar cells. Particularly, the conversion efficiency of the double-sided heterojunction solar cell can reach more than 26%, and the double-sided heterojunction solar cell has wide market prospect.
High quality passivation of the silicon wafer surface is one of the key technologies for HIT cells. The prior art typically forms an intrinsic amorphous silicon layer and an N-type amorphous silicon layer on a first side of a silicon wafer, and forms an intrinsic amorphous silicon layer and a P-type amorphous silicon layer on a second side opposite to the first side. In the prior art, the surfaces of the silicon wafers are passivated only by the intrinsic amorphous silicon layers on the two surfaces, and the passivation effect is not ideal.
Therefore, how to provide a heterojunction solar cell and a manufacturing method thereof to improve passivation effect, solar cell open-circuit voltage and conversion efficiency, and reduce leakage current has become a technical problem to be solved urgently in the industry.
Disclosure of Invention
In view of the above problems of the prior art, the present invention provides a method for manufacturing a heterojunction solar cell, the method comprising the steps of: (a) providing a textured N-type silicon wafer for a heterojunction solar cell, the silicon wafer having opposing first and second surfaces; (b) sequentially depositing a first intrinsic amorphous silicon layer and an N-type amorphous silicon layer on the first surface by a plasma enhanced chemical vapor deposition process; (c) depositing a second intrinsic amorphous silicon layer and a P-type amorphous silicon layer on the second surface in sequence by a plasma enhanced chemical vapor deposition process; (d) forming a first transparent conductive film and a second transparent conductive film on the N-type amorphous silicon layer and the P-type amorphous silicon layer, respectively; forming a first electrode and a second electrode on the first transparent conductive film and the second transparent conductive film, respectively; wherein said step (b) further forms a silicon oxide layer on the first surface and/or the second surface of the silicon wafer, respectively, before depositing the first intrinsic amorphous silicon layer and/or said step (c) before depositing the second intrinsic amorphous silicon layer.
In one embodiment, the reaction gas for forming the silicon oxide layer in step (b) and/or step (c) is laughing gas (N)20) Or ozone (O)3) The reaction pressure is 0.2-5 millibar (mbar), the reaction temperature is 160-300 ℃ and the thickness of the formed silicon oxide layer is 0.2-2 nanometers (nm).
In one embodiment, the reaction gas used in the deposition of the first intrinsic amorphous silicon layer in the step (b) and the reaction gas used in the deposition of the second intrinsic amorphous silicon layer in the step (c) are both silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-20), the reaction pressure is 0.3-5 mbar, the reaction temperature is 150-250 ℃, and the thicknesses of the deposited first intrinsic amorphous silicon layer and the deposited second intrinsic amorphous silicon layer are both 4-10 nm.
In one embodiment, the flow rate of silane for depositing the first intrinsic amorphous silicon layer in the step (b) and the second intrinsic amorphous silicon layer in the step (c) is 300 to 1000 normal liters per hour, the flow rate of hydrogen is 0 to 2000 normal liters per hour, the reaction pressure is 0.7 to 1.5 millibars, and the reaction temperature is 180 to 200 ℃.
In one embodiment, the flow rate of silane is 100 standard liters per hour, the flow rate of hydrogen is 1000 standard liters per hour, the flow rate of phosphine is 0.5 to 10 standard liters per hour, the reaction pressure is 0.8 mbar, the reaction temperature is 180 to 240 ℃, and the thickness of the deposited N-type amorphous silicon layer is 4 to 10 nanometers.
In one embodiment, the flow rate of silane is 100 standard liters per hour, the flow rate of hydrogen is 500 standard liters per hour, the flow rate of borane is 0.25 to 10 standard liters per hour, the reaction pressure is 0.3 mbar, the reaction temperature is 190 to 210 ℃, and the thickness of the P-type amorphous silicon layer deposited in step (c) is 4 to 10 nanometers.
In an embodiment, the step (b) or the step (c) further forms a first silicon oxide layer on either one of the first and second surfaces before depositing either one of the first and second intrinsic amorphous silicon layers, respectively, the other one of the first and second intrinsic amorphous silicon layers being deposited directly on the other one of the first and second surfaces having no first silicon oxide layer.
In one embodiment, the step (b) further forms a first silicon oxide layer and a second silicon oxide layer on the first surface and the second surface, respectively, before depositing the first intrinsic amorphous silicon layer and the step (c) before depositing the second intrinsic amorphous silicon layer, the first intrinsic amorphous silicon layer formed in the step (b) being deposited on the first silicon oxide layer, and the second intrinsic amorphous silicon layer formed in the step (c) being deposited on the second silicon oxide layer.
The invention also provides a heterojunction solar cell manufactured by the manufacturing method of any one of the embodiments, which comprises an N-type silicon wafer with a first surface and a second surface, the heterojunction solar cell further comprises a first intrinsic amorphous silicon layer, an N-type amorphous silicon layer, a first transparent conductive film and a first electrode which are sequentially stacked on the first surface, and a second intrinsic amorphous silicon layer, a P-type amorphous silicon layer, a second transparent conductive film and a second electrode which are sequentially stacked on the second surface, and a first silicon oxide layer is arranged between the silicon wafer and any one of the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer.
In an embodiment, a second silicon oxide layer is further disposed between the silicon wafer and the other of the first and second intrinsic amorphous silicon layers.
Compared with the prior art that no silicon oxide layer is arranged on the intrinsic amorphous silicon layer and the N-type silicon wafer, the invention has the following beneficial effects:
first, the silicon oxide layer is formed between the first intrinsic amorphous silicon layer or the second intrinsic amorphous silicon layer and the N-type silicon wafer, so that the passivation effect of the surface of the silicon wafer can be effectively improved, the leakage current can be reduced, and the open-circuit voltage and the photoelectric conversion efficiency of the battery can be improved.
Secondly, a first silicon oxide layer and a second silicon oxide layer are formed on two sides of the N-type silicon wafer, and a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer are respectively deposited on the first silicon oxide layer and the second silicon oxide layer, so that the passivation effect of the surface of the silicon wafer can be enhanced, the leakage current can be reduced, and the open-circuit voltage and the photoelectric conversion efficiency of a battery can be improved.
Drawings
The above features and advantages of the present disclosure will be better understood upon reading the detailed description of embodiments of the disclosure in conjunction with the following drawings. In the drawings, components are not necessarily drawn to scale, and components having similar relative characteristics or features may have the same or similar reference numerals.
FIG. 1 is a schematic diagram of a first embodiment of a heterojunction solar cell of the invention;
FIG. 2 is a schematic structural diagram of a heterojunction solar cell according to a second embodiment of the invention;
FIG. 3 is a schematic structural diagram of a heterojunction solar cell according to a third embodiment of the invention;
FIG. 4 is a flow chart of a first embodiment of a method of fabricating a heterojunction solar cell of the invention; and
fig. 5 is a flow chart of a method for manufacturing a heterojunction solar cell according to a second embodiment of the invention.
Detailed description of the preferred embodiments
The invention will be described in detail below with reference to the accompanying drawings and specific embodiments so that the objects, features and advantages of the invention can be more clearly understood. It should be understood that the aspects described below in connection with the figures and the specific embodiments are exemplary only, and should not be construed as limiting the scope of the invention in any way. The singular forms "a", "an" and "the" include plural referents unless the context clearly dictates otherwise.
Referring to fig. 1, there is shown a schematic structural diagram of a first embodiment of the heterojunction solar cell of the invention. As shown in fig. 1, the heterojunction solar cell 1 includes an N-type silicon wafer 10, a silicon oxide layer 11, a first intrinsic amorphous silicon layer 12, an N-type amorphous silicon layer 13, a second intrinsic amorphous silicon layer 14, a P-type amorphous silicon layer 15, a first transparent conductive film 16, a second transparent conductive film 17, a first electrode 18, and a second electrode 19.
The N-type silicon wafer 10 has a first face S1 and a second face S2, and the N-type silicon wafer 10 may be, for example, a 125mm × 125mm, 156mm × 156mm, 166mm × 166mm, 210mm × 210mm, or other currently used or future-used size N-type single crystal silicon wafer.
The silicon oxide layer 11, the first intrinsic amorphous silicon layer 12, the N-type amorphous silicon layer 13, the first transparent conductive film 16, and the first electrode 18 are sequentially stacked on the first surface S1, and the second intrinsic amorphous silicon layer 14, the P-type amorphous silicon layer 15, the second transparent conductive film 17, and the second electrode 19 are sequentially stacked on the second surface S2. The first surface S1 of the heterojunction solar cell 1 is a light-receiving surface that receives direct sunlight when in use.
The thickness of the silicon oxide layer 11 is 0.2-2 nm, and the reaction gas for forming the silicon oxide layer 11 can be laughing gas N20 or ozone O3。
The thicknesses of the first intrinsic amorphous silicon layer 12 and the second intrinsic amorphous silicon layer 14 are both 4-10 nanometers, and the reaction gases for forming the first intrinsic amorphous silicon layer 12 and the second intrinsic amorphous silicon layer 14 through the PECVD process are both silane and hydrogen. The thicknesses of the N-type amorphous silicon layer 13 and the P-type amorphous silicon layer 15 are both 4-10 nanometers, the reaction gas for forming the N-type amorphous silicon layer 13 through PECVD is silane, hydrogen and borane or trimethyl boron or other gases suitable for P-type doping, and the reaction gas for forming the P-type amorphous silicon layer 15 through PECVD is silane, hydrogen and phosphane or other gases suitable for N-type doping.
The first transparent conductive film 16 and the second transparent conductive film 17 can be indium tin oxide ITO or ZnO-based TCO or IWO or ITIO transparent conductive films, which can be formed on the N-type amorphous silicon layer 13 and the P-type amorphous silicon layer 15 respectively by sputtering.
The first electrode 18 and the second electrode 19 may be formed by screen printing and sintering of silver paste commonly used in the art. The specific thicknesses and properties of the other components of the heterojunction solar cell 1 are known to those skilled in the art and will not be described in detail here.
Referring to fig. 2, a schematic structural diagram of a second embodiment of the heterojunction solar cell of the invention is shown. As shown in fig. 2, the heterojunction solar cell 1 "includes an N-type silicon wafer 10", a silicon oxide layer 11 ", a first intrinsic amorphous silicon layer 12", an N-type amorphous silicon layer 13 ", a second intrinsic amorphous silicon layer 14", a P-type amorphous silicon layer 15 ", a first transparent conductive film 16", a second transparent conductive film 17 ", a first electrode 18", and a second electrode 19 ".
The N-type silicon wafer 10 "has a first surface S1 and a second surface S2 opposed to each other, and the first intrinsic amorphous silicon layer 12", the N-type amorphous silicon layer 13 ", the first transparent conductive film 16", and the first electrode 18 "are laminated in this order on the first surface S1; a silicon oxide layer 11 ", a second intrinsic amorphous silicon layer 14", a P-type amorphous silicon layer 15 ", a second transparent conductive film 17", and a second electrode 19 "are sequentially laminated on the second surface S2. The first surface S1 is a light-receiving surface that receives direct sunlight.
Referring to fig. 3, a schematic structural diagram of a third embodiment of the heterojunction solar cell of the invention is shown. As shown in fig. 3, the heterojunction solar cell 2 includes an N-type silicon wafer 20, a first silicon oxide layer 21, a first intrinsic amorphous silicon layer 22, an N-type amorphous silicon layer 23, a second silicon oxide layer 24, a second intrinsic amorphous silicon layer 25, a P-type amorphous silicon layer 26, a first transparent conductive film 27, a second transparent conductive film 28, a first electrode 29, and a second electrode 30.
The first silicon oxide layer 21, the first intrinsic amorphous silicon layer 22, the N-type amorphous silicon layer 23, the first transparent conductive film 27, and the first electrode 29 are sequentially stacked on the first surface S1, and the second silicon oxide layer 24, the second intrinsic amorphous silicon layer 25, the P-type amorphous silicon layer 26, the second transparent conductive film 28, and the second electrode 30 are sequentially stacked on the second surface S2.
The third embodiment of the heterojunction solar cell shown in fig. 3 is different from the first embodiment of fig. 1 and the second embodiment of fig. 2 in that the heterojunction solar cell in fig. 1 and 2 only includes a single silicon oxide layer, and the heterojunction solar cell 2 of the third embodiment of fig. 3 includes a first silicon oxide layer 21 and a second silicon oxide layer 24 on the first surface S1 and the second surface S2 of the N-type silicon wafer 20, respectively, except that the positions, thicknesses and structures of other components of the third embodiment of the heterojunction solar cell are the same as those of the first embodiment and the second embodiment. Further components of the heterojunction solar cell 2 will not be described in detail here.
Referring to fig. 4, with combined reference to fig. 1, fig. 4 shows a first embodiment of the method of fabricating a heterojunction solar cell of the invention, the heterojunction solar cell fabricated by the method of fabrication shown in fig. 4 being as shown in fig. 1. The method 40 shown in fig. 4 first proceeds to step S400, where an N-type silicon wafer 10 for a heterojunction solar cell is provided. The N-type silicon wafer 10 may be, for example, an N-type single crystal silicon wafer of a size commonly used at present or in the future, such as 125mm × 125mm, 156mm × 156mm, 166mm × 166mm, or 210mm × 210 mm.
The method 40 then proceeds to step S420, where a silicon oxide layer 11 is formed on the first side S1 of the silicon wafer 10.
The reaction gas for forming the silicon oxide layer 11 in step S420 may be laughing gas N20 or ozone O3The reaction pressure is 0.2-5 mbar, the reaction temperature is 160-300 ℃, and the thickness of the formed silicon oxide layer 11 is 0.2-2 nm. In the present embodiment, the reaction gas for forming the silicon oxide layer 14 in step S420 is laughing gas N20。
The method 40 then proceeds to step S430, where a first intrinsic amorphous silicon layer 12 and an N-type amorphous silicon layer 13 are sequentially deposited on the silicon oxide layer 11 by a PECVD process. The reaction gas for depositing the first intrinsic amorphous silicon layer 12 in the step S430 is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-20), the reaction pressure is 0.3-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the deposited first intrinsic amorphous silicon layer 12 is 4-10 nm.
In the present embodiment, the silane flow rate for depositing the first intrinsic amorphous silicon layer 12 in the step S430 is 300 to 1000 normal liters per hour, the hydrogen flow rate is 0 to 2000 normal liters per hour, the reaction pressure is 0.7 to 1.5 mbar, and the reaction temperature is 180 to 200 degrees celsius, wherein the silane flow rate is approximately inversely proportional to the hydrogen flow rate.
In this embodiment, the flow rate of silane is 100 normal liters/hour, the flow rate of hydrogen is 1000 normal liters/hour, the flow rate of phosphine is 3 normal liters/hour, the reaction pressure is 0.8 mbar, the reaction temperature is 200 degrees celsius, and the thickness of the deposited N-type amorphous silicon layer 13 is 4 to 10 nanometers in step S430. In other embodiments, the flow rate of the phosphine during deposition of the N-type amorphous silicon layer 13 may be 0.5 to 10 standard liters per hour, and the reaction temperature may be 180 to 240 ℃.
The method 40 then proceeds to step S440, where a second intrinsic amorphous silicon layer 14 and a P-type amorphous silicon layer 15 are sequentially deposited on the second surface S2 of the silicon wafer 10 by a PECVD process.
In the step S440, the reaction gas for depositing the second intrinsic amorphous silicon layer 14 is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-20), the reaction pressure is 0.3-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the formed second intrinsic amorphous silicon layer 14 is 4-10 nm.
In this embodiment, the silane flow rate during the deposition of the second intrinsic amorphous silicon layer 14 in step S440 is 300 to 1000 normal liters per hour, the hydrogen flow rate is 0 to 2000 normal liters per hour, the reaction pressure is 0.7 to 1.5 mbar, and the reaction temperature is 180 to 200 degrees celsius, wherein the silane flow rate is approximately inversely proportional to the hydrogen flow rate.
In the present embodiment, the flow rate of silane when depositing the second intrinsic amorphous silicon layer 14 is 1000 normal liter/hr, the flow rate of hydrogen is 0 normal liter/hr, the reaction pressure is 1.5 mbar, and the reaction temperature is 180 degrees celsius.
In other embodiments of the present invention, the silane flow rate is 300 normal liters/hour, the hydrogen flow rate is 2000 normal liters/hour, the reaction pressure is 0.7 mbar, and the reaction temperature is 200 degrees celsius when depositing the second intrinsic amorphous silicon layer 14.
In this embodiment, the flow rate of silane is 100 normal liters/hour, the flow rate of hydrogen is 500 normal liters/hour, the flow rate of borane is 8 normal liters/hour, the reaction pressure is 0.3 mbar, the reaction temperature is 210 ℃, and the thickness of the P-type amorphous silicon layer 15 deposited in step S440 is 4 to 10 nanometers. In other embodiments of the present invention, the flow rate of the borane during the deposition of the P-type amorphous silicon layer 15 is 0.25 to 10 standard liters per hour, and the reaction temperature is 190 to 210 ℃.
The Radio Frequency (RF) frequency of the PECVD process in steps S420 to S440 may be 13.56MHz or 40MHz, the formation of the silicon oxide layer 11 in step S420 and the deposition of the first intrinsic amorphous silicon layer 12 and the N-type amorphous silicon layer 13 in step S430 may be performed in the same PECVD apparatus, and the deposition of the second intrinsic amorphous silicon layer 14 and the P-type amorphous silicon layer 15 in step S440 may be performed in another PECVD apparatus, so that the apparatus and process can be simplified.
The method 40 then proceeds to step S450, where a first transparent conductive film 16 and a second transparent conductive film 17 are formed on the N-type amorphous silicon layer 13 and the P-type amorphous silicon layer 15, respectively. The first transparent conductive film 16 and the second transparent conductive film 17 may be ITO or ZnO based or IWO or ITIO transparent conductive films, which may be deposited on the N-type amorphous silicon layer 13 and the P-type amorphous silicon layer 15 by sputtering.
The method 40 then proceeds to step S460, where the first electrode 18 and the second electrode 19 are formed on the first transparent conductive film 16 and the second transparent conductive film 17, respectively. The first electrode 18 and the second electrode 19 may be formed by screen printing and sintering silver paste commonly used in the art.
Referring to fig. 5 in conjunction with fig. 3, fig. 5 shows a second embodiment of the method of fabricating a heterojunction solar cell of the invention, the heterojunction solar cell formed by the method shown in fig. 5 being as shown in fig. 3. The method 50 shown in fig. 5 first proceeds to step S500, where an N-type silicon wafer 20 for a heterojunction solar cell is provided. The N-type silicon wafer 20 can be, for example, an N-type single crystal silicon wafer of a size commonly used at present or in the future, such as 125mm × 125mm, 156mm × 156mm, 166mm × 166mm, or 210mm × 210 mm.
The method 50 then proceeds to step S510, where the silicon wafer 20 is subjected to texturing. In this embodiment, the solution (e.g., sodium hydroxide solution, isopropyl alcohol, and Na) may be etched by alkali in step S5102SiO3Mixed solution of (a) to remove a damage layer and form a pyramid-like textured surface on the single crystal silicon wafer.
The method 50 then proceeds to step S520, where a first silicon oxide layer 21 is formed on the first surface S1 of the silicon wafer 20. The reaction gas for forming the first silicon oxide layer 21 in step S520 may be laughing gas N20 or ozone O3The reaction pressure is 0.2-5 mbar, the reaction temperature is 160-300 ℃, and the thickness of the first silicon oxide layer 21 is 0.2-2 nm. In the present embodiment, the reaction gas for forming the first silicon oxide layer 21 in step S520 is laughing gas N20。
The method 50 then proceeds to step S530, where a first intrinsic amorphous silicon layer 22 and an N-type amorphous silicon layer 23 are sequentially deposited on the first silicon oxide layer 21 by a PECVD process. In the step S530, the reaction gas for depositing the first intrinsic amorphous silicon layer 22 is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-20), the reaction pressure is 0.3-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the deposited first intrinsic amorphous silicon layer 22 is 4-10 nm.
The flow rate of silane for depositing the first intrinsic amorphous silicon layer 22 in step S530 is 300 to 1000 normal liters/hour, the flow rate of hydrogen is 0 to 2000 normal liters/hour, the reaction pressure is 0.7 to 1.5 mbar, and the reaction temperature is 180 to 200 ℃.
In the step S530, the flow rate of silane is 100 normal liters/hour, the flow rate of hydrogen is 1000 normal liters/hour, the flow rate of phosphine is 6 normal liters/hour, the reaction pressure is 0.8 mbar, the reaction temperature is 200 ℃, and the thickness of the deposited N-type amorphous silicon layer 23 is 4 to 10 nanometers.
The method 50 then proceeds to step S540, where a second silicon dioxide layer 24 is formed on the second side S2 of the silicon wafer 20. The formation of the second silicon oxide layer 24 in step S540 is substantially the same as the reaction gas and parameters used in the formation of the first silicon oxide layer 21 in step S520, and the second silicon oxide layer 24 is formed as described above with reference to step S520.
The method 50 then proceeds to step S550, where a second intrinsic amorphous silicon layer 25 and a P-type amorphous silicon layer 26 are sequentially deposited on the second silicon oxide layer 24 by a PECVD process.
In the step S550, the reaction gas for depositing the second intrinsic amorphous silicon layer 25 is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-7), the reaction pressure is 0.7-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the formed second intrinsic amorphous silicon layer 25 is 4-10 nm.
In the present embodiment, the flow rate of silane is 300 to 1000 normal liters per hour, the flow rate of hydrogen is 0 to 2000 normal liters per hour, the reaction pressure is 0.7 to 1.5 mbar, and the reaction temperature is 180 to 200 ℃ when the second intrinsic amorphous silicon layer 25 is deposited in step S550, wherein the flow rate of silane is approximately inversely proportional to the flow rate of hydrogen.
In this embodiment, the flow rate of silane is 100 normal liters/hour, the flow rate of hydrogen is 500 normal liters/hour, the flow rate of borane is 5 normal liters/hour, the reaction pressure is 0.3 mbar, the reaction temperature is 210 ℃, and the thickness of the P-type amorphous silicon layer 26 deposited in step S550 is 4 to 10 nanometers.
The Radio Frequency (RF) frequency of the PECVD process in steps S530 and S550 may be 13.56MHz or 40MHz, the formation of the first silicon oxide layer 21 in step S520 and the deposition of the first intrinsic amorphous silicon layer 22 and the N-type amorphous silicon layer 23 in step S530 may be performed in the same PECVD apparatus, and the formation of the second silicon oxide layer 24 in step S540 and the deposition of the second intrinsic amorphous silicon layer 25 and the P-type amorphous silicon layer 26 in step S550 may be performed in another PECVD apparatus, which can simplify the apparatus and process.
The method 50 then proceeds to step S560 to form a first transparent conductive film 27 and a second transparent conductive film 28 on the N-type amorphous silicon layer 23 and the P-type amorphous silicon layer 26, respectively. The first transparent conductive film 27 and the second transparent conductive film 28 may also be indium tin oxide ITO or ZnO based or IWO or ITiO transparent conductive films, which may be deposited on the N-type amorphous silicon layer 23 and the P-type amorphous silicon layer 26 by means of sputtering.
Method 50 then proceeds to step S570, where first electrode 29 and second electrode 30 are formed on first transparent conductive film 27 and second transparent conductive film 28, respectively. The first electrode 29 and the second electrode 30 may be formed by screen printing and sintering of silver paste commonly used in the art.
The method of fabricating a heterojunction solar cell of the present invention may further comprise a third embodiment similar to the first embodiment of the method, the method of the third embodiment forming a heterojunction solar cell as shown in fig. 2. For simplicity of illustration, the third embodiment of the method, which is not further illustrated herein, is different from the method 40 shown in fig. 4 in that the silicon oxide layer in the third embodiment of the method is formed on the second side S2 of the silicon wafer opposite to the first side S1, and the silicon oxide layer 11 in the method 40 is formed on the first side S1 of the silicon wafer 10. After the formation of the silicon oxide layer on one surface of the silicon wafer is completed in the first embodiment and the third embodiment of the method, other process steps performed on the first surface and the second surface of the silicon wafer are the same, and are not described herein again.
The heterojunction solar cell comprises an N-type silicon wafer with a first surface and a second surface, and further comprises a first intrinsic amorphous silicon layer, an N-type amorphous silicon layer, a first transparent conductive film and a first electrode which are sequentially stacked on the first surface, and a second intrinsic amorphous silicon layer, a P-type amorphous silicon layer, a second transparent conductive film and a second electrode which are sequentially stacked on the second surface, wherein a first silicon oxide layer is arranged between the silicon wafer and any one of the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer. The invention can effectively improve the passivation effect of the surface of the silicon chip, reduce leakage current and improve the open-circuit voltage and the photoelectric conversion efficiency of the battery.
The embodiments described above are provided to enable persons skilled in the art to make or use the invention and that modifications or variations can be made to the embodiments described above by persons skilled in the art without departing from the inventive concept of the present invention, so that the scope of protection of the present invention is not limited by the embodiments described above but should be accorded the widest scope consistent with the innovative features set forth in the claims.
Claims (10)
1. A method of fabricating a heterojunction solar cell, the method comprising the steps of:
(a) providing a textured N-type silicon wafer for a heterojunction solar cell, the silicon wafer having opposing first and second surfaces;
(b) sequentially depositing a first intrinsic amorphous silicon layer and an N-type amorphous silicon layer on the first surface by a plasma enhanced chemical vapor deposition process;
(c) depositing a second intrinsic amorphous silicon layer and a P-type amorphous silicon layer on the second surface in sequence by a plasma enhanced chemical vapor deposition process;
(d) forming a first transparent conductive film and a second transparent conductive film on the N-type amorphous silicon layer and the P-type amorphous silicon layer, respectively; and
(e) forming a first electrode and a second electrode on the first transparent conductive film and the second transparent conductive film, respectively;
the step (b) further forms a silicon oxide layer on the first surface and/or the second surface of the silicon wafer before depositing the first intrinsic amorphous silicon layer and/or the step (c) before depositing the second intrinsic amorphous silicon layer.
2. The method according to claim 1, wherein a reaction gas used in forming the silicon oxide layer in the step (b) and/or the step (c) is laughing gas or ozone, a reaction pressure is 0.2 to 5 mbar, a reaction temperature is 160 to 300 degrees centigrade, and a thickness of the formed silicon oxide layer is 0.2 to 2 nm.
3. The method according to claim 1, wherein the reaction gas used in depositing the first intrinsic amorphous silicon layer in the step (b) and the reaction gas used in depositing the second intrinsic amorphous silicon layer in the step (c) are both silane and hydrogen, the volume ratio of silane to hydrogen is 1 (0-20), the reaction pressure is 0.3-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the deposited first intrinsic amorphous silicon layer and the thickness of the deposited second intrinsic amorphous silicon layer are both 4-10 nm.
4. The method of claim 3, wherein the silane flow rate is 300 to 1000 normal liters/hour, the hydrogen flow rate is 0 to 2000 normal liters/hour, the reaction pressure is 0.7 to 1.5 mbar, and the reaction temperature is 180 to 200 ℃ when the first intrinsic amorphous silicon layer is deposited in the step (b) and the second intrinsic amorphous silicon layer is deposited in the step (c).
5. The method of claim 1, wherein the flow rate of silane is 100 standard liters per hour, the flow rate of hydrogen is 1000 standard liters per hour, the flow rate of phosphane is 0.5 to 10 standard liters per hour, the reaction pressure is 0.8 mbar, the reaction temperature is 180 to 240 degrees centigrade, and the thickness of the deposited N-type amorphous silicon layer is 4 to 10 nm.
6. The method of claim 1, wherein the P-type amorphous silicon layer is deposited in step (c) at a silane flow rate of 100 standard liters/hour, a hydrogen flow rate of 500 standard liters/hour, a borane flow rate of 0.25 to 10 standard liters/hour, a reaction pressure of 0.3 mbar, a reaction temperature of 190 to 210 degrees centigrade, and a thickness of the deposited P-type amorphous silicon layer of 4 to 10 nm.
7. The method of manufacturing according to claim 1, wherein step (b) or step (c) further forms a first silicon oxide layer on either one of the first and second surfaces before the corresponding deposition of either one of the first and second intrinsic amorphous silicon layers, respectively, the other one of the first and second intrinsic amorphous silicon layers being deposited directly on the other one of the first and second surfaces having no first silicon oxide layer.
8. The method of manufacturing according to claim 1, wherein the step (b) further forms a first silicon oxide layer and a second silicon oxide layer on the first surface and the second surface, respectively, before the step (c) of depositing the first intrinsic amorphous silicon layer and the step (c) of depositing the second intrinsic amorphous silicon layer, the first intrinsic amorphous silicon layer formed in the step (b) being deposited on the first silicon oxide layer, and the second intrinsic amorphous silicon layer formed in the step (c) being deposited on the second silicon oxide layer.
9. A heterojunction solar cell made by the manufacturing method of any one of claims 1 to 8, comprising an N-type silicon wafer having a first surface and a second surface, the heterojunction solar cell further comprising a first intrinsic amorphous silicon layer, an N-type amorphous silicon layer, a first transparent conductive film and a first electrode sequentially stacked on the first surface, and a second intrinsic amorphous silicon layer, a P-type amorphous silicon layer, a second transparent conductive film and a second electrode sequentially stacked on the second surface, with a first silicon oxide layer disposed between the silicon wafer and any one of the first and second intrinsic amorphous silicon layers.
10. The heterojunction solar cell of claim 9, wherein a second silicon dioxide layer is further disposed between the other of the first and second intrinsic amorphous silicon layers and the silicon wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010533230.XA CN111697110A (en) | 2020-06-12 | 2020-06-12 | Heterojunction solar cell and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010533230.XA CN111697110A (en) | 2020-06-12 | 2020-06-12 | Heterojunction solar cell and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111697110A true CN111697110A (en) | 2020-09-22 |
Family
ID=72480615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010533230.XA Pending CN111697110A (en) | 2020-06-12 | 2020-06-12 | Heterojunction solar cell and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111697110A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4071830A4 (en) * | 2021-02-09 | 2024-02-28 | Tongwei Solar Jintang Co Ltd | High-efficiency silicon heterojunction solar cell and preparation method therefor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103296143A (en) * | 2013-06-18 | 2013-09-11 | 常州时创能源科技有限公司 | Crystalline silicon solar cell surface passivation process |
| CN104538486A (en) * | 2014-11-19 | 2015-04-22 | 横店集团东磁股份有限公司 | A manufacturing process for directly growing silicon oxide film of crystal silicon cell via laughing gas |
| CN106252424A (en) * | 2016-08-24 | 2016-12-21 | 常州天合光能有限公司 | Thermal oxide improves the hetero-junction solar cell at passivation layer interface and preparation method thereof |
| CN106601855A (en) * | 2015-10-14 | 2017-04-26 | 钧石(中国)能源有限公司 | Preparation method of double-side power generation heterojunction solar cell |
| CN108807565A (en) * | 2018-07-13 | 2018-11-13 | 苏州太阳井新能源有限公司 | A kind of passivation contact electrode structure, applicable solar cell and production method |
-
2020
- 2020-06-12 CN CN202010533230.XA patent/CN111697110A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103296143A (en) * | 2013-06-18 | 2013-09-11 | 常州时创能源科技有限公司 | Crystalline silicon solar cell surface passivation process |
| CN104538486A (en) * | 2014-11-19 | 2015-04-22 | 横店集团东磁股份有限公司 | A manufacturing process for directly growing silicon oxide film of crystal silicon cell via laughing gas |
| CN106601855A (en) * | 2015-10-14 | 2017-04-26 | 钧石(中国)能源有限公司 | Preparation method of double-side power generation heterojunction solar cell |
| CN106252424A (en) * | 2016-08-24 | 2016-12-21 | 常州天合光能有限公司 | Thermal oxide improves the hetero-junction solar cell at passivation layer interface and preparation method thereof |
| CN108807565A (en) * | 2018-07-13 | 2018-11-13 | 苏州太阳井新能源有限公司 | A kind of passivation contact electrode structure, applicable solar cell and production method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4071830A4 (en) * | 2021-02-09 | 2024-02-28 | Tongwei Solar Jintang Co Ltd | High-efficiency silicon heterojunction solar cell and preparation method therefor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6980079B2 (en) | Solar cell | |
| WO2023050824A1 (en) | Back contact cell and manufacturing method therefor | |
| JP6788144B1 (en) | Solar cell module, solar cell and its manufacturing method | |
| TWI463682B (en) | Heterojunction solar cell having intrinsic amorphous silicon film | |
| TWI718703B (en) | Solar cell and manufacturing method thereof | |
| CN111628052B (en) | Preparation method of passivated contact battery | |
| CN210926046U (en) | Solar cell | |
| KR20080002657A (en) | Photovoltaic device which includes all-back-contact configuration and related processes | |
| US8283559B2 (en) | Silicon-based dielectric stack passivation of Si-epitaxial thin-film solar cells | |
| CN115621333A (en) | Back contact solar cell passivated by double-sided tunneling silicon oxide and preparation method thereof | |
| US20130157404A1 (en) | Double-sided heterojunction solar cell based on thin epitaxial silicon | |
| CN112820793A (en) | Solar cell and preparation method thereof | |
| CN112951927A (en) | Preparation method of solar cell | |
| CN114497290A (en) | Manufacturing method of back contact heterojunction solar cell | |
| CN114038921A (en) | Solar cell and photovoltaic module | |
| CN113363356A (en) | Heterojunction solar cell and manufacturing method thereof | |
| CN112864280A (en) | High-reliability double-sided battery and preparation method thereof | |
| CN116230798A (en) | High-efficiency heterojunction solar cell and manufacturing method thereof | |
| CN114823935A (en) | Heterojunction battery and preparation method thereof | |
| CN112447867A (en) | Solar cell structure and manufacturing method thereof | |
| CN114765235A (en) | Heterojunction solar cell and manufacturing method thereof | |
| CN111697110A (en) | Heterojunction solar cell and manufacturing method thereof | |
| JP2002277605A (en) | Method for depositing antireflection film | |
| EP4220742A1 (en) | Heterojunction solar cell and preparation method therefor, and power generation apparatus | |
| CN113594295B (en) | Preparation method of solar cell with double-sided passivation structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 201620 Plant 3, Lane 2699, Jiangshan Road, Lingang New Area, China (Shanghai) Free Trade Pilot Zone, Pudong New Area, Shanghai Applicant after: Ideal Wanlihui Semiconductor Equipment (Shanghai) Co.,Ltd. Address before: Room 403, Building 3, No. 3255 Sixian Road, Songjiang District, Pudong New Area, Shanghai, 201620 Applicant before: SHANGHAI LIXIANG WANLIHUI FILM EQUIPMENT Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200922 |
|
| RJ01 | Rejection of invention patent application after publication |