CN108736740B - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN108736740B
CN108736740B CN201810373782.1A CN201810373782A CN108736740B CN 108736740 B CN108736740 B CN 108736740B CN 201810373782 A CN201810373782 A CN 201810373782A CN 108736740 B CN108736740 B CN 108736740B
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output electrode
semiconductor device
terminal
transistor
sensing
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CN108736740A (zh
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白石卓也
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Mitsubishi Electric Corp
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Abstract

得到能够改善短路电流检测的精度的半导体装置。晶体管(2)具有主端子(8)和感测端子(9)。N相输出电极(4)通过第1导线(10)、(11)与主端子(8)连接。感测输出电极(6)通过第2导线(12)与感测端子(9)连接。封装件(1)对N相输出电极(4)的一部分、感测输出电极(6)的一部分、晶体管(2)、第1及第2导线(10)、(11)、(12)进行封装。从主端子(8)至N相输出电极(4)为止的配线电感比从感测端子(9)至感测输出电极(6)为止的配线电感大。

Description

半导体装置
技术领域
本发明涉及具备晶体管的半导体装置,该晶体管具有主端子和感测端子。
背景技术
为了传递塑模型逆变器模块等IPM的短路保护,使用了发射极电流检测方式。在该方式中,将外部分流电阻与N侧IGBT的发射极部连接,在产生了短路电流的情况下对分流电阻间电压进行检测,反馈至控制IC,进行电路切断。
另外,在对IPM的大容量品种使用发射极电流检测方式的情况下,需要将外部分流电阻的容许电力增大。因此,使用电流感测电流检测方式,即,使用片上电流感测内置IGBT对从主电流分流出的微小电流进行检测而对短路电流进行检测。
此外,提出如下方案(例如,参照专利文献1),即,为了降低彼此并联连接的多个开关元件间的电流不平衡,对Al导线根数进行调整以使得各元件的电感相同。
专利文献1:日本特开2013-106384号公报
在电流感测电流检测方式中,将短路电流检测用电阻连接于感测端子。因此,主部的发射极的电感变得比感测部小。因此,IGBT的主部和感测部产生IGBT栅极电压差,流过各个IGBT的电流比有偏差。因此,存在短路电流检测的精度变低的问题。
发明内容
本发明就是为了解决上述课题而提出的,其目的在于得到能够改善短路电流检测的精度的半导体装置。
本发明涉及的半导体装置的特征在于,具备:晶体管,其具有主端子和感测端子;主输出电极,其通过第1导线与所述主端子连接;感测输出电极,其通过第2导线与所述感测端子连接;以及封装件,其对所述主输出电极的一部分、所述感测输出电极的一部分、所述晶体管、所述第1及第2导线进行封装,从所述主端子至所述主输出电极为止的配线电感比从所述感测端子至所述感测输出电极为止的配线电感大。
发明的效果
在本发明中,从晶体管的主端子至主输出电极为止的配线电感比从感测端子至感测输出电极为止的配线电感大。由此,在将短路电流检测用电阻与感测端子连接的电流感测电流检测方式中,由于晶体管的主部和感测部的栅极电压差变小,因此两者的电流比变小。其结果,能够改善短路电流检测的精度。
附图说明
图1是表示本发明的实施方式1涉及的半导体装置的图。
图2是表示本发明的实施方式1涉及的半导体装置的封装件内部的图。
图3是表示本发明的实施方式2涉及的半导体装置的封装件内部的图。
图4是表示本发明的实施方式3涉及的半导体装置的封装件内部的图。
图5是表示本发明的实施方式4涉及的半导体装置的封装件内部的图。
图6是表示本发明的实施方式5涉及的半导体装置的图。
标号的说明
1封装件,2 IGBT(晶体管),3控制IC,4 N相输出电极,6感测输出电极,7中继电极,8发射极端子(主端子),9感测端子,10、11、12、13 Al导线,14 SiCMOS晶体管(晶体管),R电阻
具体实施方式
参照附图,对本发明的实施方式涉及的半导体装置进行说明。对相同或对应的结构要素标注相同标号,有时省略重复说明。
实施方式1.
图1是表示本发明的实施方式1涉及的半导体装置的图。在封装件1的内部设置有IGBT 2、对该IGBT 2进行控制的控制IC 3、以及与IGBT 2的发射极端子连接的电感L。该半导体封装件为智能功率模块(Intelligent Power Module、IPM)。电感L经由N相输出电极4与封装件1的外部连接。
在封装件1的外部设置的电阻R与IGBT 2的感测端子连接。根据在该电阻R施加的电压对短路电流进行检测,反馈至控制IC 3。控制IC 3在检测出短路电流的情况下进行IGBT 2的电路切断。
图2是表示本发明的实施方式1涉及的半导体装置的封装件内部的图。引线框具有N相输出电极4、焊盘5、感测输出电极6、以及中继电极7。在焊盘5之上设置有IGBT 2。IGBT 2具有发射极端子8和感测端子9。
发射极端子8通过Al导线10与中继电极7连接,中继端子7通过Al导线11与感测输出电极6连接。感测端子9通过Al导线12与中继电极7连接。此外,在现有技术中,感测端子9并未经由中继电极7及导线11,仅通过Al导线10与感测输出电极6连接。在本实施方式中追加的Al导线11相当于图1的电感L。
封装件1对N相输出电极4的一部分、感测输出电极6的一部分、IGBT 2、Al导线10、11、12、焊盘5以及中继电极7进行封装。此外,在图2中,控制IC 3省略图示。
Al导线10、11的合计的长度比Al导线12的长度长。因此,从IGBT 2的发射极端子8至N相输出电极4为止的配线电感比从感测端子9至感测输出电极6为止的配线电感大。由此,在将短路电流检测用电阻R与感测端子9连接的电流感测电流检测方式中,由于IGBT 2的主部和感测部的IGBT栅极电压差变小,因此两者的电流比变小。其结果,能够改善短路电流检测的精度。
实施方式2.
图3是表示本发明的实施方式2涉及的半导体装置的封装件内部的图。与实施方式1相比没有中继端子7和Al导线11。取而代之,将感测端子9和感测输出电极6连接的Al导线12的根数比将发射极端子8和N相输出电极4连接的Al导线10的根数多。因此,从发射极端子8至N相输出电极4为止的配线电感比从感测端子9至感测输出电极6为止的配线电感大。因此,能够得到与实施方式1相同的效果。
实施方式3.
图4是表示本发明的实施方式3涉及的半导体装置的封装件内部的图。IGBT 2、N相输出电极4、中继电极7、Al导线10、11、12分别被分为多个相。此处,被分为UN相、VN相、WN相这三相。在各个相之间,根据IGBT 2和中继电极7的位置关系,Al导线10的长度不同。因此,在各相中,Al导线10越长,使Al导线11的根数越多,使感测部的Al导线12越短。由此,相间的配线电感的差变小,能够将相间偏差缩小。
但是,在各相中,使从IGBT 2的发射极端子8至N相输出电极4为止的配线电感比从感测端子9至感测输出电极6为止的配线电感大。由此,能够得到与实施方式1相同的效果。
实施方式4.
图5是表示本发明的实施方式4涉及的半导体装置的封装件内部的图。感测输出电极6被分割为多个框,彼此经由导线13连接。各相的IGBT 2的感测端子9与分割后的框各自连接。
在实施方式3中,对感测部的Al导线12的长度按相分别进行了调整,但在本实施方式中,对将分割后的感测输出电极6的框间连接的Al导线13的长度按相分别进行调整。由此,能够得到与实施方式3相同的效果。
实施方式5.
图6是表示本发明的实施方式5涉及的半导体装置的图。替代实施方式1的IGBT 2而使用SiCMOS晶体管14。SiCMOS晶体管14与IGBT 2相比使用温度范围大,由温度特性导致的分流比偏差大。因此,通过将本发明应用于SiC搭载模块,能够得到更加显著的效果。

Claims (8)

1.一种半导体装置,其特征在于,
具备:
晶体管,其具有主端子和感测端子;
主输出电极,其通过第1导线与所述主端子连接;
感测输出电极,其通过第2导线与所述感测端子连接;以及
封装件,其对所述主输出电极的一部分、所述感测输出电极的一部分、所述晶体管、所述第1及第2导线进行封装,
从所述主端子至所述主输出电极为止的配线电感比从所述感测端子至所述感测输出电极为止的配线电感大。
2.根据权利要求1所述的半导体装置,其特征在于,
还具备:
控制IC,其设置于所述封装件的内部,对所述晶体管进行控制;以及
电阻,其设置于所述封装件的外部,与所述感测输出电极连接,
所述控制IC在根据施加于所述电阻的电压而检测出短路电流的情况下,进行所述晶体管的电路切断。
3.根据权利要求1或2所述的半导体装置,其特征在于,
所述第1导线的长度比所述第2导线的长度长。
4.根据权利要求1或2所述的半导体装置,其特征在于,
所述第2导线的根数比所述第1导线的根数多。
5.根据权利要求3所述的半导体装置,其特征在于,
还具备中继电极,该中继电极设置于所述封装件的内部,
所述第1导线具有:第3导线,其将所述主端子和所述中继电极连接;以及第4导线,其将所述中继电极和所述主输出电极连接。
6.根据权利要求5所述的半导体装置,其特征在于,
所述晶体管、所述主输出电极、所述中继电极、所述第2、第3及第4导线分别被分为多个相,
在各相中,所述第3导线越长,所述第4导线的根数越多。
7.根据权利要求6所述的半导体装置,其特征在于,
所述感测输出电极被分割为多个框,彼此经由第5导线连接,多个相的所述晶体管的所述感测端子分别与这些框连接。
8.根据权利要求1或2所述的半导体装置,其特征在于,
所述晶体管为SiCMOS晶体管。
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