CN108694974B - 半导体装置和时序校准方法 - Google Patents
半导体装置和时序校准方法 Download PDFInfo
- Publication number
- CN108694974B CN108694974B CN201810288453.7A CN201810288453A CN108694974B CN 108694974 B CN108694974 B CN 108694974B CN 201810288453 A CN201810288453 A CN 201810288453A CN 108694974 B CN108694974 B CN 108694974B
- Authority
- CN
- China
- Prior art keywords
- delay amount
- delay
- storage unit
- write data
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/023—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Memory System (AREA)
- Pulse Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017071079A JP6832777B2 (ja) | 2017-03-31 | 2017-03-31 | 半導体装置 |
| JP2017-071079 | 2017-03-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108694974A CN108694974A (zh) | 2018-10-23 |
| CN108694974B true CN108694974B (zh) | 2023-11-10 |
Family
ID=61952534
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810288453.7A Active CN108694974B (zh) | 2017-03-31 | 2018-03-30 | 半导体装置和时序校准方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10504570B2 (https=) |
| EP (1) | EP3382713B1 (https=) |
| JP (1) | JP6832777B2 (https=) |
| CN (1) | CN108694974B (https=) |
| TW (1) | TWI765987B (https=) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10923166B2 (en) | 2018-02-27 | 2021-02-16 | SK Hynix Inc. | Semiconductor devices performing a write leveling training operation and semiconductor systems including the semiconductor devices |
| US11232820B2 (en) * | 2018-02-27 | 2022-01-25 | SK Hynix Inc. | Semiconductor devices performing a write leveling training operation and semiconductor systems including the semiconductor devices |
| KR102679157B1 (ko) * | 2018-10-30 | 2024-06-27 | 삼성전자주식회사 | 모드 레지스터 쓰기 명령을 이용하여 쓰기 클럭의 듀티 사이클의 트레이닝을 수행하는 시스템 온 칩, 시스템 온 칩의 동작 방법, 및 시스템 온 칩을 포함하는 전자 장치 |
| KR102693546B1 (ko) * | 2018-11-07 | 2024-08-08 | 삼성전자주식회사 | 스토리지 장치 |
| KR102691395B1 (ko) * | 2018-12-20 | 2024-08-05 | 에스케이하이닉스 주식회사 | 메모리 시스템, 메모리 시스템의 동작 방법 및 메모리 콘트롤러 |
| JP7081477B2 (ja) * | 2018-12-26 | 2022-06-07 | コニカミノルタ株式会社 | 画像処理装置、画像処理装置の制御方法、およびプログラム |
| JP7332406B2 (ja) * | 2019-09-13 | 2023-08-23 | キオクシア株式会社 | メモリシステム |
| KR102771802B1 (ko) * | 2019-09-26 | 2025-02-20 | 삼성전자주식회사 | 스토리지 장치 |
| CN111009271B (zh) * | 2019-11-18 | 2020-09-29 | 广东高云半导体科技股份有限公司 | 基于fpga的psram存储器初始化方法、装置、设备及介质 |
| JP2021149659A (ja) * | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体集積回路、メモリコントローラ、およびメモリシステム |
| KR102866520B1 (ko) | 2020-05-06 | 2025-10-01 | 삼성전자주식회사 | 저장 장치 및 그것의 리트레이닝 방법 |
| KR102815323B1 (ko) * | 2020-06-23 | 2025-06-02 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이의 동작 방법 |
| US11726721B2 (en) | 2020-09-09 | 2023-08-15 | Samsung Electronics Co., Ltd. | Memory device for adjusting delay on data clock path, memory system including the memory device, and operating method of the memory system |
| US11677537B2 (en) * | 2021-03-17 | 2023-06-13 | Micron Technology, Inc. | Signal delay control and related apparatuses, systems, and methods |
| KR20230165586A (ko) | 2022-05-27 | 2023-12-05 | 삼성전자주식회사 | 데이터 입출력 전압을 찾는 메모리 컨트롤러, 메모리 시스템 및 그것의 동작 방법 |
| CN115344215B (zh) * | 2022-08-29 | 2025-03-18 | 深圳市紫光同创电子股份有限公司 | 存储器训练方法及系统 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009082502A1 (en) * | 2007-12-21 | 2009-07-02 | Rambus Inc. | Method and apparatus for calibrating write timing in a memory system |
| JP5268392B2 (ja) * | 2008-03-07 | 2013-08-21 | パナソニック株式会社 | メモリデバイス及びメモリシステム並びにメモリシステムにおけるアクセスタイミング調整方法 |
| JPWO2010137330A1 (ja) * | 2009-05-27 | 2012-11-12 | パナソニック株式会社 | 遅延調整装置、遅延調整方法 |
| JP2011003088A (ja) * | 2009-06-19 | 2011-01-06 | Panasonic Corp | データラッチ調整装置およびそれを用いたメモリアクセスシステム |
| JP5653177B2 (ja) * | 2010-11-04 | 2015-01-14 | ルネサスエレクトロニクス株式会社 | メモリインターフェース回路及び半導体装置 |
| JP6179206B2 (ja) * | 2013-06-11 | 2017-08-16 | 株式会社リコー | メモリ制御装置 |
| US9524799B2 (en) * | 2014-12-30 | 2016-12-20 | Sandisk Technologies Llc | Method and apparatus to tune a toggle mode interface |
-
2017
- 2017-03-31 JP JP2017071079A patent/JP6832777B2/ja active Active
-
2018
- 2018-02-06 US US15/889,928 patent/US10504570B2/en active Active
- 2018-03-16 TW TW107108941A patent/TWI765987B/zh active
- 2018-03-29 EP EP18165131.6A patent/EP3382713B1/en active Active
- 2018-03-30 CN CN201810288453.7A patent/CN108694974B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| TW201843678A (zh) | 2018-12-16 |
| TWI765987B (zh) | 2022-06-01 |
| US20180286471A1 (en) | 2018-10-04 |
| JP2018173782A (ja) | 2018-11-08 |
| CN108694974A (zh) | 2018-10-23 |
| EP3382713A1 (en) | 2018-10-03 |
| EP3382713B1 (en) | 2023-07-19 |
| US10504570B2 (en) | 2019-12-10 |
| JP6832777B2 (ja) | 2021-02-24 |
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