CN108598149A - 一种GaN基HEMT器件 - Google Patents

一种GaN基HEMT器件 Download PDF

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CN108598149A
CN108598149A CN201810360107.5A CN201810360107A CN108598149A CN 108598149 A CN108598149 A CN 108598149A CN 201810360107 A CN201810360107 A CN 201810360107A CN 108598149 A CN108598149 A CN 108598149A
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刘洪刚
常虎东
孙兵
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Suzhou Euleus Intelligent Technology Co Ltd
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Priority to PCT/CN2019/077476 priority patent/WO2019201032A1/zh
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Abstract

本发明公开了一种GaN基HEMT器件，不影响器件可靠性的前提下，降低源漏寄生电阻，并减小GaN基HEMT器件的导通电阻，使GaN基HEMT器件低电压工作。一种GaN基HEMT器件，包括栅电极、源电极、漏电极以及自下至上依次层叠的衬底、缓冲层、GaN沟道层、第一势垒层、第二势垒层、介质钝化层；所述GaN沟道层和所述第一势垒层中形成有N型离子注入区，所述源电极和所述漏电极形成在所述N型离子注入区上表面；所述栅电极形成在所述第一势垒层上表面并位于所述源电极和所述漏电极之间；所述介质钝化层环绕所述栅电极设置以将所述栅电极与所述N型离子注入区隔离。

Description

一种GaN基HEMT器件
技术领域
本发明属于半导体器件领域，具体涉及一种GaN基HEMT器件。
背景技术
宽禁带半导体氮化镓材料以禁带宽度大、临界击穿电场高、电子饱和速度高等特点，成为新一代半导体功率器件的理想材料。近年来，以Al(ln, Ga, Sc)N/GaN为代表的GaN基HEMT器件结构，通过自发极化和压电极化产生高的二维电子气，成为主流的GaN基HEMT器件材料结构。
目前氮化镓器件的主要应用领域是高频、高压和大功率集成电路，主要通过GaN材料的高禁带宽度和高二维电子气浓度来提高器件性能，如何将GaN器件应用到手机芯片中，成为一个重要的研究方向。
为使得氮化镓器件成功进入手机电压范围工作，氮化镓HEMT器件的源漏间距需要进一步缩小，器件的导通电阻也需要进一步缩小。为了实现器件的导通电阻的减小，通常的技术手段是减小源漏间距。但是对于氮化镓器件而言，简单的减小源漏间距与器件的高温合金工艺会产生冲突，合金温度太高会使得合金结中金属扩散形貌不整齐光滑，源漏间距太小，容易导致源漏穿通现象，引起氮化镓器件的失效。
发明内容
本发明的目的是解决上述现有技术中存在的不足和问题，提出了一种GaN基HEMT器件，不影响器件可靠性的前提下，降低源漏寄生电阻，并减小GaN基HEMT器件的导通电阻，使GaN基HEMT器件低电压工作。
为达到上述目的，本发明采用的技术方案如下：
一种GaN基HEMT器件，包括栅电极、源电极、漏电极以及自下至上依次层叠的衬底、缓冲层、GaN沟道层、第一势垒层、第二势垒层、介质钝化层；
所述GaN沟道层和所述第一势垒层中形成有N型离子注入区，所述源电极和所述漏电极形成在所述N型离子注入区上表面；
所述栅电极形成在所述第一势垒层上表面并位于所述源电极和所述漏电极之间；
所述介质钝化层环绕所述栅电极设置以将所述栅电极与所述N型离子注入区隔离。
在一实施例中，所述第一势垒层的材料为AlN或Al、N与选自In、Ga和Sc中的一种或两种的组合；所述第二势垒层为AlN势垒层。
在一实施例中，所述第一势垒层为AlGaN、AlInN、AlScN、AlN、AlInGaN、AlInScN或AlGaScN势垒层。
在一实施例中，所述N型离子注入区自所述第一势垒层的上表面竖直向下延伸至所述GaN沟道层中，所述N型离子注入区延伸至所述GaN沟道层中的深度小于所述GaN沟道层的厚度。
在一实施例中，所述N型离子注入区延伸至所述GaN沟道层中的深度为10-300nm。
在一实施例中，所述N型离子注入区的靠近所述栅电极一侧的边沿与所述介质钝化层的外沿对齐。
在一实施例中，所述N型离子注入区通过一次或多次离子注入形成。
在一实施例中，所述介质钝化层为单层结构，所述N型离子注入区通过在所述介质钝化层形成后向所述GaN沟道层和所述第一势垒层中注入N型离子形成；
所述介质钝化层包括第一介质层和第二介质层，所述N型离子注入区通过在所述第一介质层形成后、所述第二介质层形成后分别向所述所述GaN沟道层和所述第一势垒层中注入N型离子形成，所述N型离子注入区的靠近所述栅电极一侧的部分边沿与所述第一介质层的外沿对齐而另一部分外延与所述第二介质层的外沿对齐。
在一实施例中，所述衬底为单晶衬底，选自单晶硅、氮化镓、蓝宝石、碳化硅中的一种；
和/或，所述缓冲层为选自AlN、GaN、ALGaN中的至少两种构成的多层结构。
在一实施例中，所述第一势垒层的厚度为1-50nm；所述第二势垒层的厚度为1-10nm；所述介质钝化层的厚度为10-300nm，宽度为10-1000nm。
本发明采用以上方案，相比现有技术具有如下优点：
在源漏区域形成了N型离子注入区，形成重掺杂N型GaN沟道层和势垒层，将源漏电极制造在重掺杂的N型GaN沟道层和势垒层上，首先通过离子注入区降低栅源和栅漏电阻，其次通过重掺杂的GaN和势垒层与源漏欧姆接触，降低金属扩散对栅和沟道层的影响。不影响器件可靠性的前提下，降低源漏寄生电阻，并减小GaN基HEMT器件的导通电阻，使GaN基HEMT器件低电压工作。
附图说明
为了更清楚地说明本发明的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为根据本发明实施例1的GaN基HEMT器件的剖面示意图；
图2为根据本发明实施例2的GaN基HEMT器件的剖面示意图；
图3为根据本发明实施例3的GaN基HEMT器件的剖面示意图；。
其中：101、衬底；102、缓冲层；103、GaN沟道层；104、第一势垒层；105、第二势垒层；106、SiN介质层；106a、外沿；107、SiO2介质层；107a、外沿；108、栅电极；109、漏电极；110、源电极；111、N型离子注入区；111a、边沿；111b、边沿。
具体实施方式
下面结合附图对本发明的较佳实施例进行详细阐述，以使本发明的优点和特征能更易于被本领域的技术人员理解。本发明对方位的定义是根据本领域人员的惯常观察视角和为了叙述方便而定义的，不限定具体的方向。本发明中述及的上、下等方位词是根据本领域技术人员对HEMT器件的惯常观察视角及为了方便叙述而定义的，不限定具体的方向，以图1为例，上、下分别对应于图1中纸面的上侧、下侧。
实施例1
图1示出了本实施例提供的一种GaN基HEMT器件的剖面示意图。参照图1所示，该GaN基HEMT器件，包括自下至上依次层叠的衬底101、缓冲层102、GaN沟道层103、第一势垒层104、第二势垒层105、介质钝化层，还包括栅电极108、漏电极109、源电极110。其中，所述介质钝化层由一层形成在第二势垒层105上且等宽的SiN介质层106组成，第二势垒层105和SiN介质层106中形成有延伸至第一势垒层104上表面的窗口，在该窗口内沉积栅金属从而形成栅电极108，栅电极108形成在第一势垒层104上表面且其上部部分覆盖SiN介质层106的上表面，而第二势垒层105和SiN介质层106则环绕栅电极108设置。本实施例中栅电极108的截面大体呈Y形，还可以为T形或蘑菇形。
GaN沟道层103和第一势垒层104中形成有N型离子注入区111，注入离子为Si。源电极110和漏电极109分别形成在N型离子注入区111上表面，而所述的SiN介质层106作为侧墙结构将位于源电极110和漏电极109之间的栅电极108分别与所述的N型离子注入区111及其上的源电极110、漏电极109相隔离。源电极110、漏电极109与SiN介质层106之间具有一定间隙。
所述衬底101为单晶衬底101，具体为选自单晶衬底，选自单晶硅、氮化镓、蓝宝石、碳化硅中的一种。
所述缓冲层102为AlN/GaN缓冲层102，其为选自AlN、GaN、ALGaN中的至少两种构成的多层结构。
所述第一势垒层104为Al(ln, Ga, Sc)N势垒层，其材料为AlN或Al、N与选自In、Ga和Sc中的一种或两种的组合，如AlGaN、AlInN、AlScN、AlN、AlInGaN、AlInScN或AlGaScN势垒层。厚度为1-50nm。
所述第二势垒层105为AlN势垒层，厚度为1-10nm。第二势垒层105与形成于其上的SiN介质层106的宽度一致。
本实施例中，SiN介质层106的厚度为10-300nm，宽度为10-1000nm。介质钝化层还可以为多层结构，如SiNx/SiO2、SiNx/SiO2/SiONx；还可以是复合多层结构，如靠近源漏电极109是SiO2材料或者SiON材料，靠近栅电极108的是SiNx/SiO2或者SiN/SiON双层材料的复合结构。
N型离子注入区111自第一势垒层104的上表面竖直向下延伸至GaN沟道层103中，N型离子注入区111延伸至GaN沟道层103中的深度小于GaN沟道层103的厚度。本实施例中，N型离子注入区111的上表面与第一势垒层104的上表面平齐，N型离子注入区111延伸至GaN沟道层103中的深度为10-300nm。N型离子注入区111通过一次或多次离子注入形成，即N型离子注入区111通过在介质钝化层完全形成后向GaN沟道层103和第一势垒层104中注入一次N型离子形成。
N型离子注入区111的靠近栅电极108一侧的边沿111a与介质钝化层（具体为SiN介质层106）的外沿106a对齐，二者均沿同一竖直方向延伸，N型离子注入区111的所述边沿111a位于SiN介质层106的所述外延的正下方，至少不深入到侧墙结构以内，侧墙结构将N型离子区与栅电极108隔离开来。
实施例2
图2示出了本实施例提供的另一种GaN基HEMT器件的剖面示意图。参照图2所示，本实施例与实施例1的区别在于：
介质钝化层为由形成在第二势垒层105上的第一介质层、形成在第一介质层上的第二介质层构成的两层结构。第一介质层为SiN介质层106，第二介质层为SiO2介质层107。第二势垒层105、SiN介质层106、SiO2介质层107宽度相等，栅电极108形成在第二势垒层105、SiN介质层106、SiO2介质层107中且其上部部分覆盖SiO2介质层107的上表面。N型离子注入区111的靠近栅电极108一侧的边沿111a与SiN介质层106、SiO2介质层107的外沿106a、107a均对齐。
此外，本实施例中，栅电极108的截面大体呈T形。
实施例3
图3示出了本实施例提供的又一种GaN基HEMT器件的剖面示意图。参照图3所示，本实施例与实施例1的区别在于：
介质钝化层为由第一介质层、第二介质层构成的两层结构。第一介质层为SiN介质层106，第二介质层为SiO2介质层107。SiN介质层106形成在第二势垒层105的上表面，第二势垒层105、SiN介质层106的宽度相等；SiO2介质层107包覆形成在SiN介质层106的上表面及SiN介质层106、第二势垒层105的侧表面，SiO2介质层107的宽度大于SiN介质层106、第二势垒层105的宽度。栅电极108形成在第二势垒层105、SiN介质层106、SiO2介质层107中且其上部部分覆盖SiO2介质层107的上表面。
还需要说明的是：本实施例中，N型离子注入通过二次离子注入形成，N型离子注入区111通过在SiN介质层106形成后、SiO2介质层107形成后分别向GaN沟道层103和第一势垒层104中注入N型离子形成。具体为，在SiN介质层106形成后、SiO2介质层107形成前，向第一势垒层104和GaN沟道层103中进行一次N型离子注入；在SiO2介质层107形成后相第一势垒层104和GaN沟道层103进行二次N型离子注入。N型离子注入区111上部的靠近栅电极108一侧的边沿111a与SiN介质层106的外沿106a对齐；N型离子注入区111下部的靠近栅电极108一侧的边沿111b与第SiO2介质层107的外沿107a对齐。
此外，本实施例中，栅电极108的截面大体呈T形。
本发明提供的GaN基HEMT器件，在源漏区域形成了N型离子注入区111，形成重掺杂N型GaN沟道层103和势垒层；将源漏金属电极制造在重掺杂的N型GaN沟道层103和势垒层上，这样就可以达到两个效果：首先通过离子注入区降低栅源和栅漏电阻，其次通过重掺杂的GaN沟道层103和势垒层与源漏欧姆接触，提高源漏电极109，降低金属扩散对栅和沟道层的影响。
上述实施例只为说明本发明的技术构思及特点，是一种优选的实施例，其目的在于熟悉此项技术的人士能够了解本发明的内容并据以实施，并不能以此限定本发明的保护范围。凡根据本发所作的等效变换或修饰，都应涵盖在本发明的保护范围之内。

Claims (10)

1.一种GaN基HEMT器件，包括栅电极、源电极、漏电极以及自下至上依次层叠的衬底、缓冲层、GaN沟道层、第一势垒层、第二势垒层、介质钝化层；其特征在于：
所述GaN沟道层和所述第一势垒层中形成有N型离子注入区，所述源电极和所述漏电极形成在所述N型离子注入区上表面；
所述栅电极形成在所述第一势垒层上表面并位于所述源电极和所述漏电极之间；
所述介质钝化层环绕所述栅电极设置以将所述栅电极与所述N型离子注入区隔离。
2.根据权利要求1所述的GaN基HEMT器件，其特征在于：所述第一势垒层的材料为AlN或Al、N与选自In、Ga和Sc中的一种或两种的组合；所述第二势垒层为AlN势垒层。
3.根据权利要求2所述的GaN基HEMT器件，其特征在于：所述第一势垒层为AlGaN、AlInN、AlScN、AlN、AlInGaN、AlInScN或AlGaScN势垒层。
4.根据权利要求1或2所述的GaN基HEMT器件，其特征在于：所述N型离子注入区自所述第一势垒层的上表面竖直向下延伸至所述GaN沟道层中，所述N型离子注入区延伸至所述GaN沟道层中的深度小于所述GaN沟道层的厚度。
5.根据权利要求4所述的GaN基HEMT器件，其特征在于：所述N型离子注入区延伸至所述GaN沟道层中的深度为10-300nm。
6.根据权利要求1所述的GaN基HEMT器件，其特征在于：所述N型离子注入区的靠近所述栅电极一侧的边沿与所述介质钝化层的外沿对齐。
7.根据权利要求6所述的GaN基HEMT器件，其特征在于：所述N型离子注入区通过一次或多次离子注入形成。
8.根据权利要求7所述的GaN基HEMT器件，其特征在于：所述介质钝化层为单层结构，所述N型离子注入区通过在所述介质钝化层形成后向所述GaN沟道层和所述第一势垒层中注入N型离子形成；
所述介质钝化层包括第一介质层和第二介质层，所述N型离子注入区通过在所述第一介质层形成后、所述第二介质层形成后分别向所述所述GaN沟道层和所述第一势垒层中注入N型离子形成，所述N型离子注入区的靠近所述栅电极一侧的部分边沿与所述第一介质层的外沿对齐而另一部分外延与所述第二介质层的外沿对齐。
9.根据权利要求1所述的GaN基HEMT器件，其特征在于：所述衬底为单晶衬底，选自单晶硅、氮化镓、蓝宝石、碳化硅中的一种；
和/或，所述缓冲层为选自AlN、GaN、ALGaN中的至少两种构成的多层结构。
10.根据权利要求1所述的GaN基HEMT器件，其特征在于：所述第一势垒层的厚度为1-50nm；所述第二势垒层的厚度为1-10nm；所述介质钝化层的厚度为10-300nm，宽度为10-1000nm。
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