CN108511336A - 一种改善igbt芯片栅极塌陷的新工艺 - Google Patents
一种改善igbt芯片栅极塌陷的新工艺 Download PDFInfo
- Publication number
- CN108511336A CN108511336A CN201810190366.8A CN201810190366A CN108511336A CN 108511336 A CN108511336 A CN 108511336A CN 201810190366 A CN201810190366 A CN 201810190366A CN 108511336 A CN108511336 A CN 108511336A
- Authority
- CN
- China
- Prior art keywords
- grid
- igbt
- igbt chip
- collapsing
- technique
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 16
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052796 boron Inorganic materials 0.000 claims abstract description 8
- WSGCGMGMFSSTNK-UHFFFAOYSA-M 1-methyl-4-phenyl-1-propan-2-ylpiperidin-1-ium;iodide Chemical compound [I-].C1C[N+](C(C)C)(C)CCC1C1=CC=CC=C1 WSGCGMGMFSSTNK-UHFFFAOYSA-M 0.000 claims abstract description 4
- 229910052785 arsenic Inorganic materials 0.000 claims abstract description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims abstract description 4
- 150000002500 ions Chemical class 0.000 claims abstract description 4
- 238000012360 testing method Methods 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 4
- 230000005669 field effect Effects 0.000 claims description 3
- 230000003068 static effect Effects 0.000 claims description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
本发明提供一种改善IGBT芯片栅极塌陷的工艺,其中所述的将GOX栅极氧化层,由原来的1000Å调至1200Å,将P‑BODY IMPP型砷阱的离子注入由BORON 80Kev8E13调至BORON 80Kev9E13;优点为:有效改善IGBT芯片栅极塌陷,提高栅极塌陷的值,有充裕的范围让IGBT开通或关断,可降低误开通或误关断现象的出现。
Description
技术领域
本发明涉及工控领域IGBT芯片,尤其涉及一种改善IGBT芯片栅极塌陷的新工艺。
背景技术
目前市场上工控领域用IGBT芯片的栅极塌陷值较低,终端客户使用时易造成IGBT开关过程中的误开通或误关断现象,引起变频器的炸机现象。
本工艺有效改善IGBT芯片栅极塌陷,提高栅极塌陷的值,有充裕的范围让IGBT开通或关断,可降低误开通或误关断现象的出现。
发明内容
本发明为了解决现有技术的不足,而提供一种改善IGBT芯片栅极塌陷的新工艺。
本发明的新的技术方案是:一种改善IGBT芯片栅极塌陷的工艺,IGBT为绝缘栅双极型晶体管,由BJT(双极型三极管)和MOS(绝缘栅型场效应管)组成,所述的将GOX栅极氧化层,由原来的1000Å调至1200Å,将P-BODY IMPP型砷阱的离子注入由BORON 80Kev8E13调至BORON 80Kev9E13。
所述的IGBT芯片的静态参数上表现为通过半导体分立器件测试系统测试所得栅压VTH提高,VTH由原来的5V提升至5.7V。
所述的IGBT芯片的动态测试上表现为通过动态测试系统和示波器测试所得栅极塌陷(下勾)值提高。
本发明的有益效果是:有效改善IGBT芯片栅极塌陷,提高栅极塌陷的值,有充裕的范围让IGBT开通或关断,可降低误开通或误关断现象的出现。
附图说明
图1为动态测试对比图。
具体实施例
一种改善IGBT芯片栅极塌陷的工艺,IGBT为绝缘栅双极型晶体管,由BJT(双极型三极管)和MOS(绝缘栅型场效应管)组成,所述的将GOX栅极氧化层,由原来的1000Å调至1200Å,将P-BODY IMPP型砷阱的离子注入由BORON 80Kev8E13调至BORON 80Kev9E13。
所述的IGBT芯片的静态参数上表现为通过半导体分立器件测试系统测试所得栅压VTH提高,VTH由原来的5V提升至5.7V。
所述的IGBT芯片的动态测试上表现为通过动态测试系统和示波器测试所得栅极塌陷(下勾)值提高。
通过半导体分立器件测试系统测试所得。
VTH(工艺调整前)(V) | VTH(工艺调整前)(V) |
ID=250UA | ID=250UA |
5.021 | 5.957 |
5.013 | 5.961 |
5.026 | 5.966 |
5.018 | 5.958 |
5.019 | 5.922 |
5.011 | 5.957 |
5.015 | 5.945 |
通过动态测试系统和示波器测试所得。
动态测试系统见图1。
示波器测试:工艺调整后的栅极塌陷(下勾)为7.8V,比工艺调整前的值6.2V明显提高。
Claims (3)
1.一种改善IGBT芯片栅极塌陷的工艺,IGBT为绝缘栅双极型晶体管,由双极型三极管和绝缘栅型场效应管组成,其特征在于:所述的将GOX栅极氧化层,由原来的1000Å调至1200Å,将P-BODY IMPP型砷阱的离子注入由BORON 80Kev8E13调至BORON 80Kev9E13。
2.根据权利要求1所述的一种改善IGBT芯片栅极塌陷的工艺,其特征在于:所述的IGBT芯片的静态参数上表现为通过半导体分立器件测试系统测试所得栅压VTH提高,VTH由原来的5V提升至5.7V。
3.根据权利要求1所述的一种改善IGBT芯片栅极塌陷的工艺,其特征在于:所述的IGBT芯片的动态测试上表现为通过动态测试系统和示波器测试所得栅极塌陷下勾值提高。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810190366.8A CN108511336B (zh) | 2018-03-08 | 2018-03-08 | 一种改善igbt芯片栅极塌陷的工艺 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810190366.8A CN108511336B (zh) | 2018-03-08 | 2018-03-08 | 一种改善igbt芯片栅极塌陷的工艺 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108511336A true CN108511336A (zh) | 2018-09-07 |
CN108511336B CN108511336B (zh) | 2019-06-28 |
Family
ID=63377204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810190366.8A Active CN108511336B (zh) | 2018-03-08 | 2018-03-08 | 一种改善igbt芯片栅极塌陷的工艺 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108511336B (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101478001A (zh) * | 2008-11-27 | 2009-07-08 | 电子科技大学 | 一种具有空穴注入结构的集电极短路igbt |
CN104409485A (zh) * | 2014-12-05 | 2015-03-11 | 国家电网公司 | 具有低反向传输电容抗闩锁结构的平面栅igbt及其制造方法 |
CN104517837A (zh) * | 2013-09-29 | 2015-04-15 | 无锡华润上华半导体有限公司 | 一种绝缘栅双极型晶体管的制造方法 |
CN105185829A (zh) * | 2015-08-28 | 2015-12-23 | 深圳深爱半导体股份有限公司 | 功率晶体管及其制备方法 |
-
2018
- 2018-03-08 CN CN201810190366.8A patent/CN108511336B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101478001A (zh) * | 2008-11-27 | 2009-07-08 | 电子科技大学 | 一种具有空穴注入结构的集电极短路igbt |
CN104517837A (zh) * | 2013-09-29 | 2015-04-15 | 无锡华润上华半导体有限公司 | 一种绝缘栅双极型晶体管的制造方法 |
CN104409485A (zh) * | 2014-12-05 | 2015-03-11 | 国家电网公司 | 具有低反向传输电容抗闩锁结构的平面栅igbt及其制造方法 |
CN105185829A (zh) * | 2015-08-28 | 2015-12-23 | 深圳深爱半导体股份有限公司 | 功率晶体管及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
CN108511336B (zh) | 2019-06-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103413824B (zh) | 一种rc-ligbt器件及其制作方法 | |
CN103956379B (zh) | 具有优化嵌入原胞结构的cstbt器件 | |
CN203967093U (zh) | 一种上拉双扩散金属氧化物半导体 | |
CN105118862B (zh) | 一种具有抗单粒子效应的vdmos器件 | |
CN105185826A (zh) | 一种横向rc-igbt器件 | |
CN102610641B (zh) | 高压ldmos器件及其制造方法 | |
CN104576347A (zh) | Igbt背面金属化的改善方法 | |
CN105023943A (zh) | 一种纵向rc-igbt器件 | |
CN108511336A (zh) | 一种改善igbt芯片栅极塌陷的新工艺 | |
CN102637733B (zh) | 一种超结绝缘栅双极型晶体管 | |
CN104299990A (zh) | 绝缘栅双极晶体管及其制造方法 | |
Fallahnejad et al. | Design and simulation noise characteristics of AlGaN/GaN HEMT on SIC substrate for low noise applications | |
CN107068742A (zh) | 具有不连续p型基区嵌入原胞结构的半导体器件 | |
CN204857733U (zh) | 降低起始电压及导通电阻的mosfet组件 | |
CN207097830U (zh) | 一种绝缘栅双极型晶体管 | |
CN102290436B (zh) | 新型绝缘栅双极晶体管背面结构及其制备方法 | |
CN103811491A (zh) | 一种可调恒流源集成芯片及制造方法 | |
CN103531586B (zh) | 一种功率半导体器件及其制造方法 | |
CN107342286B (zh) | 一种具有表面双栅控制的横向rc-igbt器件 | |
CN105513953B (zh) | 改善高压器件性能随衬底电阻率变化的工艺控制方法 | |
CN104183594B (zh) | 一种采用半浮栅结构的氮化镓功率器件 | |
CN220652018U (zh) | 一种高增益复合bjt结构 | |
CN204289460U (zh) | 一种带有InAlP势垒层的增强型PHEMT结构 | |
CN109103243A (zh) | 一种高值电阻的phemt器件 | |
CN203205423U (zh) | 一种vdmos场效应晶体管优化结构 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |