CN108231723A - 封装结构及其形成方法 - Google Patents
封装结构及其形成方法 Download PDFInfo
- Publication number
- CN108231723A CN108231723A CN201611198710.5A CN201611198710A CN108231723A CN 108231723 A CN108231723 A CN 108231723A CN 201611198710 A CN201611198710 A CN 201611198710A CN 108231723 A CN108231723 A CN 108231723A
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- Prior art keywords
- weld pad
- groove
- substrate
- main body
- body region
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- 238000000034 method Methods 0.000 title claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 231
- 210000000746 body region Anatomy 0.000 claims abstract description 135
- 239000004020 conductor Substances 0.000 claims abstract description 46
- 238000002161 passivation Methods 0.000 claims description 34
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 230000001788 irregular Effects 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 98
- 238000000926 separation method Methods 0.000 description 26
- 239000000463 material Substances 0.000 description 20
- 239000004065 semiconductor Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 238000003466 welding Methods 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000004411 aluminium Substances 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical group [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical group [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical group [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
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Abstract
一种封装结构及其形成方法,其中封装结构包括:基底,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,所述凹槽区和焊垫主体区邻接;主体焊垫,位于焊垫主体区基底上;键合导电线,所述键合导电线的一端与所述主体焊垫连接。所述封装结构能够避免主体焊垫和周围器件发生短路。
Description
技术领域
本发明涉及半导体制造领域,尤其涉及一种封装结构及其形成方法。
背景技术
在集成电路芯片封装工艺中,一个重要的工艺步骤是打线封装。打线封装能够将芯片上的键合垫与导电架上的内引脚进行电连接,继而将集成电路内的电信号传输到外部。
打线封装一般是当导电架从弹匣内传送至定位器后,应用电子影像处理技术来确定芯片上各个接点以及每一个接点对应的内引脚上接点的位置,然后进入焊线步骤。进行焊线时,芯片上的接点为第一焊点,导电架的内引脚上的接点为第二焊点。焊线步骤包括:使用焊接设备将引线的一端烧结成小球,然后将小球压焊在第一焊点上;将小球压焊在第一焊点上后,依照设计好的路径拉拽引线,将引线的另一端压焊在第二焊点上;之后,拉断第二焊点与焊接设备之间的引线。
然而,采用现有的打线封装形成的封装结构的性能较差。
发明内容
本发明解决的问题是提供一种封装结构及其形成方法,以避免主体焊垫和周围器件发生短路。
为解决上述问题,本发明提供一种封装结构,包括:基底,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,所述凹槽区和焊垫主体区邻接;主体焊垫,位于焊垫主体区基底上;键合导电线,所述键合导电线的一端与所述主体焊垫连接。
可选的,还包括:位于基底表面的钝化层,所述钝化层暴露出焊垫主体区和凹槽区;位于凹槽区的凹槽,所述凹槽位于钝化层和主体焊垫之间。
可选的,所述凹槽底部的基底表面低于或齐平于焊垫主体区的基底顶部表面。
可选的,所述凹槽底部暴露出凹槽区基底表面。
可选的,还包括:位于凹槽底部基底表面的附加焊垫,所述附加焊垫的表面低于主体焊垫的顶部表面。
可选的,当所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面时,所述附加焊垫的顶部表面高于、低于或齐平于焊垫主体区的基底顶部表面。
可选的,所述焊垫主体区内还具有接触区,所述键合导电线的一端与所述接触区基底上的主体焊垫连接。
可选的,所述接触区和凹槽区之间具有最小距离,所述最小距离为1um~2um。
可选的,所述基底包括一个或多个焊垫区,各焊垫区包括一个焊垫主体区和位于一个焊垫主体区周围的一个或多个凹槽区。
可选的,所述焊垫区的基底表面的形状为矩形、方形、圆形、三角形或不规则的形状。
可选的,所述焊垫区的基底表面形状为矩形;所述矩形具有两条相对的第一侧边和两条相对的第二侧边,所述第二侧边分别和第一侧边连接;所述接触区的基底表面形状为圆形,且所述接触区的基底表面与所述第一侧边或第二侧边相切。
本发明还提供一种封装结构的形成方法,包括:提供基底;获取位于基底表面的焊垫主体区和凹槽区,所述凹槽区位于焊垫主体区周围,所述凹槽区和焊垫主体区邻接;在所述焊垫主体区基底上形成主体焊垫;采用打线工艺形成键合导电线,所述键合导电线的一端与所述主体焊垫连接。
可选的,还包括:在形成所述主体焊垫之前,在所述基底表面形成钝化层,所述钝化层暴露出焊垫主体区和凹槽区;在形成所述主体焊垫的同时形成位于凹槽区的凹槽,所述凹槽位于钝化层和主体焊垫之间。
可选的,所述凹槽底部的基底表面齐平于焊垫主体区的基底顶部表面,且所述凹槽底部暴露出凹槽区基底表面;形成所述主体焊垫和凹槽的方法包括:在所述焊垫主体区基底和凹槽区基底上形成第一初始焊垫;去除凹槽区基底上的全部第一初始焊垫,形成主体焊垫的同时形成所述凹槽。
可选的,所述凹槽底部的基底表面齐平于焊垫主体区的基底顶部表面;所述封装结构的形成方法还包括:在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底表面,且所述附加焊垫的表面低于主体焊垫的顶部表面;形成所述主体焊垫、凹槽和附加焊垫的方法包括:在所述焊垫主体区基底和凹槽区基底上形成第一初始焊垫;去除凹槽区基底上部分厚度的第一初始焊垫,形成主体焊垫,同时形成所述附加焊垫和所述凹槽。
可选的,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面;所述封装结构的形成方法还包括:在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底表面,且所述附加焊垫的表面低于主体焊垫的顶部表面;形成所述主体焊垫、凹槽和附加焊垫的方法包括:在所述凹槽区的基底中形成初始凹槽;在所述初始凹槽中以及焊垫主体区基底上形成第二初始焊垫,在形成主体焊垫的同时形成所述附加焊垫和所述凹槽。
可选的,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面;且所述凹槽底部暴露出凹槽区基底表面;形成所述凹槽和主体焊垫的方法包括:在所述凹槽区的基底中形成初始凹槽;在所述初始凹槽中、以及焊垫主体区基底上形成第二初始焊垫;去除凹槽区的第二初始焊垫,在形成主体焊垫的同时形成所述凹槽。
可选的,所述基底包括一个或多个焊垫区;各焊垫区包括一个焊垫主体区和位于一个焊垫主体区周围的一个或多个凹槽区。
可选的,所述焊垫主体区内还具有接触区,所述键合导电线的一端与所述接触区基底上的主体焊垫连接;获取位于基底表面的焊垫主体区和凹槽区的步骤包括:在所述基底的焊垫区内设置接触区;在所述接触区以外焊垫区内设置凹槽区;将所述凹槽区之外的焊垫区设置为焊垫主体区。
可选的,所述接触区和凹槽区之间具有最小距离,所述最小距离为1um~2um。
与现有技术相比,本发明的技术方案具有以下优点:
本发明技术方案提供的封装结构中,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,主体焊垫位于焊垫主体区基底上。所述焊垫主体区周围的凹槽区基底上的空间能够容纳主体焊垫受到挤压后向周围延伸的部分,避免主体焊垫形变后延伸至周围的器件。因此能够避免主体焊垫和周围器件发生短路。
本发明技术方案提供的封装结构的形成方法中,在进行打线工艺的过程中,主体焊垫受到键合导电线的挤压作用而向周围延伸。由于在主体焊垫周围的基底设置了凹槽区,因此在打线工艺中,主体焊垫向周围延伸的部分能够被凹槽区基底上的空间容纳。进而避免主体焊垫形变后延伸至周围的器件,因此能够避免主体焊垫和周围器件发生短路。
附图说明
图1为一种封装结构的结构示意图;
图2至图6为本发明一实施例中封装结构形成过程的结构示意图;
图7至图9为本发明另一实施例中封装结构形成过程的结构示意图;
具体实施方式
正如背景技术所述,现有的打线封装形成的封装结构的性能较差。
图1为一种封装结构的结构示意图,封装结构包括:基底100,多个焊垫区;焊垫110,分别位于焊垫区的基底100上;键合导电线120,所述键合导电线120的一端与所述焊垫110连接。
然而,上述封装结构中,相邻焊垫容易发生短路现象,经研究发现,原因在于:
焊垫110的材料为铝,所述键合导电线120的材料为铜。将键合导电线120和焊垫110连接的过程中采用打线工艺。由于键合导电线120的硬度较大,所述打线工艺需要的能量较大,因此焊垫110受到打线工艺作用力较大。而焊垫110的硬度较小,在打线工艺中,焊垫110容易发生较大的形变而延伸至周围器件,导致焊垫110和周围器件连接在一起。
在此基础上,本发明提供一种封装结构的形成方法,包括:基底,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,所述凹槽区和焊垫主体区邻接;主体焊垫,位于焊垫主体区基底上;键合导电线,所述键合导电线的一端与所述主体焊垫连接。
所述方法中,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,主体焊垫位于焊垫主体区基底上。所述焊垫主体区周围的凹槽区基底上的空间能够容纳主体焊垫受到挤压后向周围延伸的部分,避免主体焊垫形变后延伸至周围的器件。因此能够避免主体焊垫和周围器件发生短路。
为使本发明的上述目的、特征和优点能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
图2至图6为本发明一实施例中封装结构形成过程的结构示意图。
结合参考图2和图3,图3为图2中朝向顶层互联层的焊垫区Ⅰ的俯视图,图2为沿着图3中切割线M-M1的示意图,提供基底200。
所述基底200包括:半导体衬底201;半导体器件(未图示),所述半导体器件位于半导体衬底201内或者位于半导体衬底201表面;电互连结构202,所述电互连结构202连接所述半导体器件;绝缘介质层,位于半导体衬底201和半导体器件上,所述电互连结构202位于绝缘介质层内。
所述半导体衬底201为硅衬底、硅锗衬底、碳化硅衬底、绝缘体上硅(SOI)衬底、绝缘体上锗(GOI)衬底、玻璃衬底或III-V族化合物衬底,例如氮化镓或砷化镓等。所述半导体器件能够为CMOS器件,所述CMOS器件包括晶体管、存储器、电容器或电阻器等。所述绝缘介质层的材料为氧化硅、氮氧化硅、碳氮化硅或氮化硅层。
本实施例中,所述半导体衬底201为硅衬底,所述半导体器件为晶体管。
本实施例中,所述电互连结构202包括顶层互联层和位于顶层互联层下方的底层互联层。所述底层互联层包括一层或者多层底层互联子层。顶层互联层和底层互联层之间、多层底层互联子层之间、以及底层互联子层与半导体器件之间用连接键203连接。
所述电互连结构202和连接键203的材料包括金属,如铜或铝。
本实施例中,所述顶层互联层的表面为焊垫区Ⅰ基底200表面。
所述焊垫区Ⅰ基底200表面的形状为矩形、方形、圆形、三角形或不规则的形状。
本实施例中,所述焊垫区Ⅰ的基底200表面形状为矩形。具体的,所述矩形具有相对的两条第一侧边和相对的两条第二侧边,所述第二侧边分别和第一侧边连接。
请继续结合参考图2和图3,获取位于基底200表面的焊垫主体区A和凹槽区B,所述凹槽区B位于焊垫主体区A周围,所述凹槽区B和焊垫主体区A邻接。
所述基底200包括一个或多个焊垫区Ⅰ,各个焊垫区Ⅰ包括一个焊垫主体区A和位于一个焊垫主体区A周围的一个或多个凹槽区B。
在其它实施例中,所述基底包括一个或多个焊垫区,各个焊垫区仅包括焊垫主体区,所述凹槽区位于焊垫区的周围。
所述焊垫主体区A内还具有接触区C,后续形成的键合导电线的一端与接触区C基底200上的主体焊垫连接。
需要说明的是,所述接触区C为在工艺设计中为主体焊垫和键合导电线相接触设计的最大区域。在实际工艺中,主体焊垫和键合导电线相接触的区域位于所述接触区内或与所述接触区重合。
本实施例中,获取位于基底200表面的焊垫主体区A和凹槽区B的步骤包括:在所述基底200的焊垫区Ⅰ内设置接触区C;在所述接触区C以外焊垫区Ⅰ内设置凹槽区B(参考图3);将所述凹槽区B之外的焊垫区Ⅰ设置为焊垫主体区A(参考图3)。
本实施例中,所述接触区C的基底200表面形状为圆形,且所述接触区C的基底200表面与所述第一侧边或第二侧边相切。
在一个实施例中,所述接触区C和凹槽区B之间具有最小距离,所述最小距离为1um~2um。在此情况下,若后续形成的主体焊垫和键合导电线接触的区域与与所述接触区重合,对后续打线工艺的精度要求降低,且凹槽区B用于容纳后续主体焊垫延伸至周围材料的空间较大。
本实施例中,在形成后续主体焊垫之前,在基底200表面形成钝化层210,所述钝化层210暴露出焊垫主体区A和凹槽区B的基底200表面;具体的,所述钝化层210暴露出焊垫区Ⅰ的顶层互联层表面。
在一个实施例中,所述钝化层210为单层结构,所述钝化层210的材料为二氧化硅、氮化硅或聚酰亚胺。
在另一个实施例中,所述钝化层210为叠层结构,所述钝化层210包括第一钝化层和位于第一钝化层上的第二钝化层。所述第一钝化层的材料为二氧化硅或氮化硅。所述第二钝化层的材料为聚酰亚胺。
接着,在所述焊垫主体区A基底200上形成主体焊垫。在形成所述主体焊垫的同时形成位于凹槽区B的凹槽,所述凹槽位于钝化层210和主体焊垫之间。
本实施例中,所述凹槽底部的基底200表面齐平于焊垫主体区A的基底200顶部表面。
本实施例中,在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底200表面,且所述附加焊垫的表面低于主体焊垫的顶部表面。
下面参考图4至图5具体介绍形成凹槽、主体焊垫和附加焊垫的方法。
参考图4,在所述焊垫主体区A基底200和凹槽区B基底200上形成第一初始焊垫220。
本实施例中,所述第一初始焊垫220还位于焊垫主体区A和凹槽区B周围的基底200上。
所述第一初始焊垫220用于形成主体焊垫和附加焊垫。所述第一初始焊垫220的材料为金属,如铝。本实施例中,所述第一初始焊垫220的材料为铝。形成所述第一初始焊垫220的工艺为沉积工艺,如溅射工艺。
需要说明的是,在形成第一初始焊垫220之前,还可以在焊垫主体区A基底和凹槽区B基底上形成隔离层(未图示)。在其它实施例中,可以不形成隔离层。
本实施例中,所述隔离层为叠层结构,所述隔离层包括底层隔离层和位于底层隔离层上的顶层隔离层。
所述底层隔离层的材料为氮化钽,所述顶层隔离层的材料为钽。或者,所述底层隔离层的材料氮化钛,所述顶层隔离层的材料为钛。
在其它实施例中,所述隔离层为单层结构,所述隔离层的材料为氮化、钽、氮化钛或钛。
在一个实施例中,所述隔离层的厚度为50nm~150nm。
所述隔离层的作用包括:隔离焊垫区Ⅰ的顶层互联层和第一初始焊垫220,避免后续形成的主体焊垫和附加焊垫中的原子扩散到顶层互联层中,从而避免顶层互联层的电学性能受到影响。
参考图5,去除凹槽区B基底200上部分厚度的第一初始焊垫220,从而在所述焊垫主体区A基底200上形成主体焊垫221,同时形成附加焊垫223和凹槽222。
所述凹槽222位于钝化层210和主体焊垫221之间,且所述凹槽222位于凹槽区B,所述凹槽222底部的基底200表面齐平于焊垫主体区A的基底200顶部表面。
所述附加焊垫223位于凹槽222底部基底200表面,且所述附加焊垫223的表面低于主体焊垫221的顶部表面。去除凹槽区B基底200上部分厚度的第一初始焊垫220的工艺为有掩膜的刻蚀工艺。
本实施例中,在去除凹槽区B基底200上部分厚度的第一初始焊垫220的同时,还去除了焊垫主体区A和凹槽区B周围的基底200上的部分或者全部第一初始焊垫220,图5示出去除了焊垫主体区A和凹槽区B周围的基底200上部分第一初始焊垫220。
需要说明的是,当形成隔离层时,附加焊垫223和凹槽区B基底200之间、以及主体焊垫221和焊垫主体区A基底200之间具有隔离层。
需要说明的是,在其它实施例中,所述凹槽底部的基底表面齐平于焊垫主体区的基底顶部表面,且所述凹槽底部暴露出凹槽区基底表面。相应的,形成所述主体焊垫和凹槽的方法包括:在所述焊垫主体区基底和凹槽区基底上形成第一初始焊垫;去除凹槽区基底上的全部第一初始焊垫,在所述焊垫主体区基底上形成焊垫,同时形成所述凹槽。
在形成第一初始焊垫之前,还可以在焊垫主体区基底和凹槽区基底上形成隔离层。相应的,隔离层位于焊垫主体区基底和主体焊垫之间、以及凹槽区基底顶部表面。
参考图6,采用打线工艺形成键合导电线230,所述键合导电线230的一端与所述主体焊垫221连接。
所述键合导电线230的材料包括金属,如铜、钨、铝、金或银。本实施例中,所述键合导电线230的材料为铜。
本实施例中,所述键合导电线230的一端连接主体焊垫221。所述键合导电线230的另一端用于连接外部封装连线。
在进行打线工艺的过程中,主体焊垫221受到一定的作用力而向周围延伸。
当所述键合导电线230采用硬度较大的金属,如铜或金时,所述打线工艺需要的能量较大。因此,在进行打线工艺的过程中,主体焊垫221受到的作用力较大,主体焊垫221向周围延伸的程度较大。
由于在主体焊垫221周围的基底200设置了凹槽区B,因此在打线工艺中,主体焊垫221向周围延伸的部分能够被凹槽区B基底200上的空间容纳。进而避免主体焊垫221形变后延伸至周围的器件,因此能够避免主体焊垫221和周围器件发生短路。
当所述主体焊垫221的个数为多个时,还能避免相邻主体焊垫221发生短路。
另外,在满足主体焊垫221用于焊接的面积的情况下,利用了主体焊垫221周围的焊垫区Ⅰ形成所述凹槽222。无需额外占用焊垫区Ⅰ以外的基底200。
相应的,本发明还提供一种采用上述方法形成的封装结构,请继续参考图6,基底200,所述基底200包括焊垫主体区A(参考图3)和位于焊垫主体区A周围的凹槽区B(参考图3),所述凹槽区B和焊垫主体区A邻接;主体焊垫221,位于焊垫主体区A基底200上;键合导电线230,所述键合导电线230的一端与所述主体焊垫221连接。
所述基底参考前述内容,不再详述。
所述基底200包括一个或多个焊垫区Ⅰ,各个焊垫区Ⅰ包括一个焊垫主体区A和位于一个焊垫主体区A周围的一个或多个凹槽区B。
在其它实施例中,所述基底包括一个或多个焊垫区,各个焊垫区仅包括焊垫主体区,所述凹槽区位于焊垫区的周围。
所述焊垫区Ⅰ的基底200表面的形状为矩形、方形、圆形、三角形或不规则的形状。
本实施例中,所述焊垫区Ⅰ的基底200表面形状为矩形;所述矩形具有两条相对的第一侧边和两条相对的第二侧边,所述第二侧边分别和第一侧边连接。
所述焊垫主体区A内还具有接触区C(参考图3),所述键合导电线230的一端与所述接触区C基底200上的主体焊垫221连接。
需要说明的是,所述接触区C为在工艺设计中为主体焊垫221和键合导电线230相接触设计的最大区域。在实际工艺中,主体焊垫221和键合导电线230相接触的区域位于所述接触区C内或与所述接触区C重合。
本实施例中,所述接触区C的基底200表面形状为圆形,且所述接触区C的基底200表面与所述第一侧边或第二侧边相切。
所述接触区C和凹槽区B之间具有最小距离,所述最小距离为1um~2um。
所述封装结构还包括:位于基底表面的钝化层210,所述钝化层210暴露出焊垫主体区A和凹槽区B的基底200表面,具体的,所述钝化层210暴露出焊垫区Ⅰ的顶层互联层表面;位于凹槽区B的凹槽222,所述凹槽222位于钝化层210和主体焊垫221之间。
本实施例中,所述凹槽222底部的基底200表面齐平于焊垫主体区A的基底200顶部表面。
本实施例中,封装结构还包括:位于凹槽222底部基底200表面的附加焊垫223,所述附加焊垫223的表面低于主体焊垫221的顶部表面。
在其它实施例中,所述凹槽底部暴露出凹槽区基底表面。
所述封装结构还包括:隔离层(未图示),位于附加焊垫223和凹槽区B基底200之间、以及主体焊垫221和焊垫主体区A基底200之间。
在其它实施例中,所述封装结构包括隔离层,不包括附加焊垫223,隔离层位于凹槽222底部基底200表面、以及主体焊垫221和焊垫主体区A基底200之间。
本实施例提供的封装结构中,所述焊垫主体区A周围的凹槽区B基底200上的空间能够容纳主体焊垫221受到挤压后向周围延伸的部分,避免主体焊垫221形变后延伸至周围的器件。因此能够避免主体焊垫221和周围器件发生短路。
当所述主体焊垫221的个数为多个时,还能避免相邻主体焊垫221发生短路。
另外,在满足主体焊垫221用于焊接的面积的情况下,利用了主体焊垫221周围的焊垫区Ⅰ形成所述凹槽222。无需额外占用焊垫区Ⅰ以外的基底200。
图7至图9为本发明另一实施例中封装结构形成过程的结构示意图。
本实施例与前一实施例的区别在于:所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面,在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底表面,且所述附加焊垫的表面低于主体焊垫的顶部表面。或者,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面,且所述凹槽底部暴露出凹槽区基底表面。关于本实施例与前一实施例相同的部分,不再详述。
本实施例,以所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面,在形成所述主体焊垫和凹槽的过程中形成附加焊垫为示例进行说明。
下面参考图7至图8具体介绍形成凹槽、主体焊垫和附加焊垫的形成方法。
参考图7,图7为在图2基础上的示意图,在所述凹槽区B(参考图3)的基底200中形成初始凹槽320。
形成所述初始凹槽320的工艺为有掩膜的刻蚀工艺。
本实施例中,所述初始凹槽320贯穿部分基底,具体的,所述初始凹槽320贯穿顶层互联层。
参考图8,在所述初始凹槽320(参考图7)中、以及焊垫主体区A(参考图3)基底200上形成第二初始焊垫330,从而在形成主体焊垫342的同时形成附加焊垫343和凹槽341。
形成所述第二初始焊垫330的工艺为沉积工艺,如溅射工艺。
需要说明的是,第二初始焊垫330还位于焊垫主体区A和凹槽区B周围的基底200上。形成第二初始焊垫330后,还需要去除焊垫主体区A和凹槽区B周围的基底200上的部分或者全部第二初始焊垫330。
所述主体焊垫342位于焊垫主体区A(参考图3)基底上。
所述凹槽341位于钝化层210和主体焊垫342之间,且所述凹槽341位于凹槽区B。所述凹槽341底部的基底200表面低于焊垫主体区A的基底200顶部表面。
本实施例中,所述附加焊垫343位于凹槽341底部基底200表面,且所述附加焊垫343的表面低于主体焊垫342的顶部表面。
当所述凹槽341底部的基底200表面低于焊垫主体区A的基底200顶部表面时,所述附加焊垫343的顶部表面高于、低于或齐平于焊垫主体区A的基底200顶部表面。
当所述附加焊垫343的顶部表面高于焊垫区Ⅰ基底200顶部表面时,顶层互联层不会被暴露出,避免顶层互联层受到空气中水汽的影响。
本实施例中,还在附加焊垫343和凹槽区B基底200之间、以及主体焊垫342和焊垫主体区A之间形成了隔离层,隔离层的材料、结构、厚度和作用参照前一实施例中隔离层的材料、结构、厚度和作用。
在其它实施例中,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面;且所述凹槽底部暴露出凹槽区基底表面。相应的,形成所述凹槽和主体焊垫的方法包括:在所述凹槽区的基底中形成初始凹槽;在所述初始凹槽中、以及焊垫主体区基底上形成第二初始焊垫;去除凹槽区的第二初始焊垫,在形成主体焊垫的同时形成所述凹槽。
在形成第二初始焊垫之前,还可以在焊垫主体区基底和凹槽区基底上形成隔离层。相应的,隔离层位于凹槽底部基底表面、以及焊垫主体区基底和主体焊垫之间。
参考图9,采用打线工艺形成键合导电线350,所述键合导电线350的一端与所述主体焊垫342连接。
所述键合导电线230的材料和作用参照前述实施例。
在进行打线工艺的过程中,主体焊垫342受到一定的作用力而向周围延伸。当所述键合导电线350采用硬度较大的金属,如铜、金等时,所述打线工艺需要的能量较大。因此,在进行打线工艺的过程中,主体焊垫342受到的作用力较大,主体焊垫342向周围延伸的程度较大。
由于在主体焊垫342周围的基底200设置了凹槽区B,因此在打线工艺中,主体焊垫342向周围延伸的部分能够被凹槽区B基底200上的空间容纳。进而避免主体焊垫342形变后延伸至周围的器件,因此能够避免主体焊垫342和周围器件发生短路。
另外,在满足主体焊垫342用于焊接的面积的情况下,利用了主体焊垫342周围的焊垫区Ⅰ形成所述凹槽341。无需额外占用焊垫区Ⅰ以外的基底200。
相应的,本发明还提供一种采用上述方法形成的封装结构,请继续参考图9,基底200,所述基底200包括焊垫主体区A(参考图3)和位于焊垫主体区A周围的凹槽区B(参考图3),所述凹槽区B和焊垫主体区A邻接;主体焊垫342,位于焊垫主体区A基底200上;键合导电线350,所述键合导电线350的一端与所述主体焊垫342连接。
所述基底参考前述内容,不再详述。
所述基底200包括一个或多个焊垫区Ⅰ,各个焊垫区Ⅰ包括一个焊垫主体区A和位于一个焊垫主体区A周围的一个或多个凹槽区B。
在其它实施例中,所述基底包括一个或多个焊垫区,各个焊垫区仅包括焊垫主体区,所述凹槽区位于焊垫区的周围。
所述焊垫区Ⅰ的基底200表面的形状为矩形、方形、圆形、三角形或不规则的形状。
本实施例中,所述焊垫区Ⅰ的基底200表面形状为矩形;所述矩形具有两条相对的第一侧边和两条相对的第二侧边,所述第二侧边分别和第一侧边连接。
所述焊垫主体区A内还具有接触区C(参考图3),所述键合导电线350的一端与所述接触区C基底200上的主体焊垫342连接。
需要说明的是,所述接触区C为在工艺设计中为主体焊垫342和键合导电线350相接触设计的最大区域。在实际工艺中,主体焊垫342和键合导电线350相接触的区域位于所述接触区C内或与所述接触区C重合。
本实施例中,所述接触区C的基底200表面形状为圆形,且所述接触区C的基底200表面与所述第一侧边或第二侧边相切。
所述接触区C和凹槽区B之间具有最小距离,所述最小距离为1um~2um。
所述封装结构还包括::位于基底表面的钝化层210,所述钝化层210暴露出焊垫主体区A和凹槽区B的基底200表面,具体的,所述钝化层210暴露出焊垫区Ⅰ的顶层互联层表面;位于凹槽区B的凹槽341,所述凹槽341位于钝化层210和主体焊垫342之间。
本实施例中,所述凹槽341底部的基底200表面低于焊垫主体区A的基底200顶部表面。
本实施例中,所述封装结构还包括:位于凹槽341底部基底200表面的附加焊垫343,所述附加焊垫343的表面低于主体焊垫342的顶部表面。
当所述凹槽341底部的基底200表面低于焊垫主体区A的基底200顶部表面时,所述附加焊垫343的顶部表面高于、低于或齐平于焊垫主体区A的基底200顶部表面。
在其它实施例中,所述凹槽底部暴露出凹槽区基底表面。
所述封装结构还包括:隔离层,位于附加焊垫343和凹槽区B基底200之间、以及主体焊垫342和焊垫主体区A之间。
在其它实施例中,所述封装结构包括隔离层,不包括附加焊垫343,隔离层位于凹槽341底部基底200表面、以及主体焊垫342和焊垫主体区A基底200之间。
本实施例提供的封装结构中,所述焊垫主体区A周围的凹槽区B基底200上的空间能够容纳主体焊垫342受到挤压后向周围延伸的部分,避免主体焊垫342形变后延伸至周围的器件。因此能够避免主体焊垫342和周围器件发生短路。
当所述主体焊垫342的个数为多个时,还能避免相邻主体焊垫342发生短路。
另外,在满足主体焊垫342用于焊接的面积的情况下,利用了主体焊垫342周围的焊垫区Ⅰ形成所述凹槽341。无需额外占用焊垫区Ⅰ以外的基底200。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。
Claims (20)
1.一种封装结构,其特征在于,包括:
基底,所述基底包括焊垫主体区和位于焊垫主体区周围的凹槽区,所述凹槽区和焊垫主体区邻接;
主体焊垫,位于焊垫主体区基底上;
键合导电线,所述键合导电线的一端与所述主体焊垫连接。
2.根据权利要求1所述的封装结构,其特征在于,还包括:位于基底表面的钝化层,所述钝化层暴露出焊垫主体区和凹槽区;位于凹槽区的凹槽,所述凹槽位于钝化层和主体焊垫之间。
3.根据权利要求2所述的封装结构,其特征在于,所述凹槽底部的基底表面低于或齐平于焊垫主体区的基底顶部表面。
4.根据权利要求3所述的封装结构,其特征在于,所述凹槽底部暴露出凹槽区基底表面。
5.根据权利要求3所述的封装结构,其特征在于,还包括:位于凹槽底部基底表面的附加焊垫,所述附加焊垫的表面低于主体焊垫的顶部表面。
6.根据权利要求5所述的封装结构,其特征在于,当所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面时,所述附加焊垫的顶部表面高于、低于或齐平于焊垫主体区的基底顶部表面。
7.根据权利要求1所述的封装结构,其特征在于,所述焊垫主体区内还具有接触区,所述键合导电线的一端与所述接触区基底上的主体焊垫连接。
8.根据权利要求7所述的封装结构,其特征在于,所述接触区和凹槽区之间具有最小距离,所述最小距离为1um~2um。
9.根据权利要求7所述的封装结构,其特征在于,所述基底包括一个或多个焊垫区,各焊垫区包括一个焊垫主体区和位于一个焊垫主体区周围的一个或多个凹槽区。
10.根据权利要求9所述的封装结构,其特征在于,所述焊垫区的基底表面的形状为矩形、方形、圆形、三角形或不规则的形状。
11.根据权利要求10所述的封装结构,其特征在于,所述焊垫区的基底表面形状为矩形;所述矩形具有两条相对的第一侧边和两条相对的第二侧边,所述第二侧边分别和第一侧边连接;所述接触区的基底表面形状为圆形,且所述接触区的基底表面与所述第一侧边或第二侧边相切。
12.一种封装结构的形成方法,其特征在于,包括:
提供基底;
获取位于基底表面的焊垫主体区和凹槽区,所述凹槽区位于焊垫主体区周围,所述凹槽区和焊垫主体区邻接;
在所述焊垫主体区基底上形成主体焊垫;
采用打线工艺形成键合导电线,所述键合导电线的一端与所述主体焊垫连接。
13.根据权利要求12所述的封装结构的形成方法,其特征在于,还包括:在形成所述主体焊垫之前,在所述基底表面形成钝化层,所述钝化层暴露出焊垫主体区和凹槽区;在形成所述主体焊垫的同时形成位于凹槽区的凹槽,
所述凹槽位于钝化层和主体焊垫之间。
14.根据权利要求13所述的封装结构的形成方法,其特征在于,所述凹槽底部的基底表面齐平于焊垫主体区的基底顶部表面,且所述凹槽底部暴露出凹槽区基底表面;形成所述主体焊垫和凹槽的方法包括:在所述焊垫主体区基底和凹槽区基底上形成第一初始焊垫;去除凹槽区基底上的全部第一初始焊垫,形成主体焊垫的同时形成所述凹槽。
15.根据权利要求13所述的封装结构的形成方法,其特征在于,所述凹槽底部的基底表面齐平于焊垫主体区的基底顶部表面;所述封装结构的形成方法还包括:在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底表面,且所述附加焊垫的表面低于主体焊垫的顶部表面;形成所述主体焊垫、凹槽和附加焊垫的方法包括:在所述焊垫主体区基底和凹槽区基底上形成第一初始焊垫;去除凹槽区基底上部分厚度的第一初始焊垫,形成主体焊垫,同时形成所述附加焊垫和所述凹槽。
16.根据权利要求13所述的封装结构的形成方法,其特征在于,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面;所述封装结构的形成方法还包括:在形成所述主体焊垫和凹槽的过程中形成附加焊垫,所述附加焊垫位于凹槽底部基底表面,且所述附加焊垫的表面低于主体焊垫的顶部表面;形成所述主体焊垫、凹槽和附加焊垫的方法包括:在所述凹槽区的基底中形成初始凹槽;在所述初始凹槽中以及焊垫主体区基底上形成第二初始焊垫,在形成主体焊垫的同时形成所述附加焊垫和所述凹槽。
17.根据权利要求13所述的封装结构的形成方法,其特征在于,所述凹槽底部的基底表面低于焊垫主体区的基底顶部表面;且所述凹槽底部暴露出凹槽区基底表面;形成所述凹槽和主体焊垫的方法包括:在所述凹槽区的基底中形成初始凹槽;在所述初始凹槽中、以及焊垫主体区基底上形成第二初始焊垫;去除凹槽区的第二初始焊垫,在形成主体焊垫的同时形成所述凹槽。
18.根据权利要求12所述的封装结构的形成方法,其特征在于,所述基底包括一个或多个焊垫区;各焊垫区包括一个焊垫主体区和位于一个焊垫主体区周围的一个或多个凹槽区。
19.根据权利要求18所述的封装结构的形成方法,其特征在于,所述焊垫主体区内还具有接触区,所述键合导电线的一端与所述接触区基底上的主体焊垫连接;获取位于基底表面的焊垫主体区和凹槽区的步骤包括:在所述基底的焊垫区内设置接触区;在所述接触区以外焊垫区内设置凹槽区;将所述凹槽区之外的焊垫区设置为焊垫主体区。
20.根据权利要求19所述的封装结构的形成方法,其特征在于,所述接触区和凹槽区之间具有最小距离,所述最小距离为1um~2um。
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