CN108140694A - 发光装置 - Google Patents
发光装置 Download PDFInfo
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- CN108140694A CN108140694A CN201680056863.8A CN201680056863A CN108140694A CN 108140694 A CN108140694 A CN 108140694A CN 201680056863 A CN201680056863 A CN 201680056863A CN 108140694 A CN108140694 A CN 108140694A
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Abstract
提供一种包括多个更高度集成的封装体的发光装置。该发光装置设置有:多个封装体,每个封装体包括第一基板和第二基板,第二基板上排列多个封装体。在该连接件中,第一基板设置有:第一光源和第二光源,第一光源包括:发射具有第一波长的光的第一发光部,以及连接到第一发光部的第一电极和第二电极;第二光源包括:发射具有第二波长的光的第二发光部,以及连接到第二发光部的第三电极和第四电极。第二基板设置有第一连接部、第二连接部以及驱动电路。第一连接部与第一封装体的第一电极以及与第二封装体的第一电极两者连接,第二封装体在第一方向上与第一封装体相邻。第二连接部与第一封装体的第三电极和第二封装体中的第三电极两者连接。并且驱动电路驱动多个封装体。
Description
技术领域
本发明涉及一种包括多个封装体的发光装置,每个封装体包括多个发光元件。
背景技术
已经提出了称为平铺显示器的显示设备,其能够形成更大的显示屏幕。这种平铺显示器包括多个封装体,每个封装体包括多个发光元件并且以瓦片形式彼此紧密接触地排列成二维布置。
引文列表
专利文献
专利文献1:日本未经审查的专利申请公开第2011-47977号
发明内容
然而,当前可用的平铺显示器在封装体之间的间隙(接合)中形成其中不显示图像的非显示区域,导致显示质量降低的问题。为了解决这个问题,期望缩小显示面板之间的间隙。
因此,期望提供一种包括集成更高的多个封装体的发光装置。
根据本公开的实施方式的第一发光装置包括多个封装体,每个封装体包括第一基板和单个第二基板,该第二基板上排列多个封装体。这里,第一基板设置有第一光源和第二光源。第一光源包括:发射具有第一波长的光的第一发光部,以及耦接到第一发光部的第一电极和第二电极。第二光源包括:发射具有第二波长的光的第二发光部,以及耦接到第二发光部的第三电极和第四电极。第二基板包括第一连接件和第二连接件以及驱动电路。第一连接件与多个封装体的第一封装体中的第一电极和多个封装体的第二封装体中的第一电极两者耦接。第二封装体在第一方向上与第一封装体相邻。第二连接件与第一封装体中的第三电极和第二封装体中的第三电极两者耦接。驱动电路驱动多个封装体。要注意的是,发光装置可以包括一个以上的第二基板,并且因此可以包括两个以上的第二基板。
在根据本公开的实施方式的第一发光装置中,第二基板的第一连接件和第二连接件在第一封装体和第二封装体之间共享。与分别设置与第一封装体对应的第一连接件和第二连接件以及与第二封装体对应的第一连接件和第二连接件的情况相比,这使得可以减少诸如第二基板上的连接件和配线的部件的数量。
根据本公开的实施方式的第二发光装置包括多个封装体和第二基板。多个封装体各自包括具有第一正面和第二背面的第一基板。第一正面设置有包括第一元件的第一像素、包括第二元件的第二像素、耦接到第一元件的第一电极以及耦接到第二元件的第二电极。第二背面设置有耦接到第一电极和第二电极两者的配线层。第二基板设置在面向第二背面的第二正面上。第二基板包括耦接到配线层的连接件以及驱动多个封装体的驱动电路。
根据本公开的实施方式的第二发光装置使得可以实现更紧凑的配置。
根据本公开的实施方式的发光装置使得可以减少要安装在设置有驱动电路的第二基板上的部件的数量,优选地允许更大数量的封装体被集成在第二基板上。因此,用作显示器的发光装置能够显示具有更高清晰度的图像。而且,用作照明装置的发光装置能够以更高的亮度照亮物体。应该注意,本公开的效果不限于以上描述的那些,并且可以是下面描述的任何效果。
附图说明
[图1]图1是示出根据本公开的第一实施方式的发光装置的整体构造的示例的示意图。
[图2]图2示出了在图1中所示的像素驱动电路的示例。
[图3A]图3A是在图1中所示的发光区域的一部分配置的平面图。
[图3B]图3B是以放大方式示出图3A中所示的封装体的放大平面图。
[图4A]图4A是以放大方式示出图3B中所示的封装体的横截面的放大平面图。
[图4B]图4B是以放大方式示出了图3B中所示的封装体的横截面的另一个放大平面图。
[图4C]图4C是以放大方式示出了图3A中所示的发光区域中的相邻封装体之间的区域的截面的放大平面图。
[图5]图5是根据本公开的第二实施方式的发光装置中的封装体的平面图。
[图6A]图6A是图5中所示的封装体的横截面图。
[图6B]图6B是根据图5中所示的发光装置的第一变形例的封装体的横截面图。
[图6C]图6C是根据图5中所示的发光装置的第二变形例的封装体的横截面图。
[图6D]图6D是根据图5中所示的发光装置的第三变形例的封装体的横截面图。
[图7]图7是根据本公开的第三实施方式的发光装置中的封装体的平面图。
[图8A]图8A是图7中所示的封装体的横截面图。
[图8B]图8B是图7中所示的封装体的另一横截面图。
具体实施方式
在下文中,参考附图详细描述本公开的实施方式。要注意的是,按照以下顺序进行描述:
1.第一实施方式
包括多个封装体的发光装置,其中,在每个封装体中为单个面板基板设置一个像素。
2.第二实施方式
包括多个封装体的发光装置,在每个封装体中为单个面板基板设置四个像素。
3.第三实施方式
包括多个封装体的发光装置,每个封装体具有多层配线结构。
4.其他变形例
[1.第一实施方式]
[发光装置1的配置]
图1示出了根据本公开的第一实施方式的发光装置1的整体配置。图2示出了像素驱动电路的配置的示例。图3A是示出发光装置1的发光区域11A(稍后描述)的一部分的配置的平面图,并且图3B是以放大的方式示出设置在发光区域11A中的一个封装体20(稍后描述)的平面图。图4A是沿着图3B中所示的线IVA-IVA截取的封装体的横截面图,图4B是沿着图3B中所示的线IVB-IVB截取的封装体的横截面图,并且图4C是沿图3B中所示的线IVC-IVC截取的封装体的横截面图。
例如,发光装置1被用作在内部或外部空间中以不同颜色发光的平面彩色显示装置(显示设备)或照明装置。发光装置1包括排列在共用基板11的发光区域11A中的多个封装体20。每个封装体20包括在面板基板21上的多个发光元件10(10R、10G和10B)(稍后描述)。应该注意的是,图1示意性地示出为了便于图中的空间而将两个封装体20A和20B排列在Y方向上的方式。每个封装体20A和20B包括在X方向上排列的三个发光元件10R、10G和10B。例如,信号线驱动电路12、扫描线驱动电路13和电源线驱动电路14设置在共用基板11上的发光区域11A周围。
如在图3A中所示,例如,以二维矩阵方式排列的多个封装体20被安装在共用基板11上的发光区域11A中。另外,在封装体20中设置的驱动发光元件10的像素驱动电路15被布置在共用基板11上的发光区域11A中。在像素驱动电路15中,多个信号线12A(12A1、12A2、...12Am,...)在列方向上布置,并且多个扫描线13A(13A1,...,13An,...)和多条电源线14A(14A1,...,14An,...)在行方向被布置。发光元件10R、10G和10B中的任一者相应地设置在每个信号线12A和每个扫描线13A之间的各个交点处。信号线12A分别与信号线驱动电路12耦接。扫描线13A分别与扫描线驱动电路13耦接。电源线14A分别与电源线驱动电路14耦接。
信号线驱动电路12将对应于从信号供给源馈送的亮度信息的图像信号的信号电压提供给通过对应的信号线12A选择的发光元件10R、10G或10B。
例如,扫描线驱动电路13包括移位寄存器,该移位寄存器与接收的时钟脉冲同步地依次移位(传送)起始脉冲。扫描线驱动电路13在将图像信号写入各个发光元件10R、10G和10B时逐行扫描发光元件10R、10G和10B,并且顺序地将扫描信号提供给扫描线13A。
例如,电源线驱动电路14包括移位寄存器,该移位寄存器与接收的时钟脉冲同步地依次移位(传送)起始脉冲。与由扫描线驱动电路13进行的逐行扫描同步,电源线驱动电路14适当地向电源线14A馈送彼此不同的第一和第二电位中的任一电位。这使得进行驱动晶体管Tr1(稍后描述)的导通状态或非导通状态的选择。
如图2中所示,像素驱动电路15是有源驱动电路,该有源驱动电路包括驱动晶体管Tr1、写入晶体管Tr2、设置在驱动晶体管Tr1和写入晶体管Tr2之间的电容器(保持电容器)Cs以及发光元件10。发光元件10与电源线14A和公共电源线(GND)之间的驱动晶体管Tr1串联连接。驱动晶体管Tr1和写入晶体管Tr2均由典型的薄膜晶体管(TFT)构成,典型的薄膜晶体管(TFT)具有可以是但不特别限于逆交错结构(所谓的“底栅型”)或交错结构(顶栅型)的配置。
例如,写入晶体管Tr2具有耦接到信号线12A的漏极,使得图像信号从信号线驱动电路12被提供到写入晶体管Tr2。另外,写入晶体管Tr2还具有耦接到扫描线13A的栅极,使得扫描信号从扫描线驱动电路13被提供到写入晶体管Tr2。此外,写入晶体管Tr2还具有耦接到驱动晶体管Tr1的栅极的源电极。
例如,驱动晶体管Tr1具有耦接到电源线14A的漏极,并且被设置为来自电源线驱动电路14的第一或第二电位。驱动晶体管Tr1具有耦接到发光元件10的源电极。
保持电容器Cs设置在驱动晶体管Tr1的栅极(写入晶体管Tr2的源极电极)和驱动晶体管Tr1的源极之间。
如在图3A中所示,分别包括多个发光元件10的多个封装体20在XY平面上延伸的发光区域11A中整体以矩阵方式被排列。更具体地,例如,在Y方向上排成一列的封装体20E、20A和20B以及同样在Y方向上排成一列的封装体20F、20C和20D在X方向上彼此相邻。应该注意的是,图3A示意性地示出了在发光区域11A中设置的一些封装体20,但封装体20的数量不限于此。
如在图3B、4A和4B中所示,每个封装体20具有这样的结构,其中依次堆叠包括诸如陶瓷的材料的绝缘面板基板21、包括电极31至34的配线层22、发光元件10(10R、10G和10B)以及透明保护膜23。发光元件10R、10G和10B是分别发出红光、绿光和蓝光的发光二极管(LED),并且被设置在公共电极34上。例如,透明保护膜23一并覆盖发光元件10和包括电极31至34的配线层22。电极31至34彼此分离并电绝缘。此外,电极31至34分别包括从面板基板21的上表面21S1经由端面21T延伸至下表面21S2的部分。例如,如在图4B中所示,这些电极31至34分别具有U形的截面。
焊盘41至44在与电极31至34对应的各个位置处被设置在共用基板11的最上层。具体地,焊盘41设置在与XY平面上的电极31的位置部分重叠的位置处,焊盘42设置在与XY平面上的电极32的位置部分重叠的位置处,焊盘43设置在与XY平面上的电极33的位置部分重叠的位置处,以及焊盘44设置在与XY平面上的电极34的位置部分重叠的位置处。焊盘41至44经由包括诸如焊料的材料的连接层T电耦接至各个电极。如图4C所示,例如,配线层51至53嵌入在共用基板11中。例如,配线层51经由通孔V1耦接至焊盘41,并且配线层52经由通孔V2耦接至焊盘42。
如在图3B中所示,发光元件10R耦接到电极31和电极33,并且由于在电极31和电极33之间产生预定电位差而发出红光。类似地,发光元件10G耦接到电极34和电极33,并且由于在电极34和电极33之间产生预定的电位差而发出绿光。发光元件10B连接到电极32和电极33,并且由于在电极32和电极33之间产生预定的电位差而发出蓝光。尽管在此提供了发光元件10R、10G和10B共用的电极33,但是可以单独提供电极用于每个发光元件。
如在图3A中所示,例如,在发光装置1中,沿Y方向排列的封装体20A和20B具有关于在X方向上延伸的线X1-X1彼此基本对称的配置。换句话说,沿着线X1-X1排列的电极31A和电极32A、电极33A以及电极34A依次被布置在封装体20A的面板基板21上。电极31A和32A、电极33A以及电极34A被布置成在Y方向上远离线X1-X1。类似地,沿线X1-X1排列的电极31B和32B、电极33B以及电极34B依次被布置在封装体20B中的面板基板21上。电极31B和32B、电极33B以及电极34B被布置成在Y方向上远离线X1-X1。这里,耦接到电极31A和31B两者的焊盘41(41AB)和耦接到电极32A和32B两者的焊盘42(42AB)布置在封装体20A和20B之间。焊盘41AB和42AB在X方向上彼此相邻布置。
而且,在发光装置1中,封装体20C在X方向上与封装体20A相邻地配置,并且封装体20D在X方向上与封装体20B相邻地配置。因此,封装体20C和封装体20D被布置成在Y方向上彼此相邻。这里,耦接到电极33A和33C两者的焊盘43(43AC)被布置在封装体20A和20C之间。类似地,耦接到电极33B和33D两者的焊盘43(43BD)被布置在封装体20A和20C之间。焊盘43AC和焊盘43BD在Y方向上被布置在关于X1-X1基本对称的位置处。此外,耦接到电极31C和31D两者的焊盘41(41CD)和耦接到电极32C和32D两者的焊盘42(42CD)被布置在封装体20C和20D之间。焊盘41CD和42CD被布置成在X方向上彼此相邻。
在发光装置1中,封装体20E在Y方向上被布置在与跨封装体20A的封装体20B相反的一侧。此外,封装体20F在Y方向上被布置在与跨封装体20C的封装体20D相反的一侧。因此,封装体20E和封装体20F在X方向上彼此相邻地布置。这里,耦接到电极34A和34E两者的焊盘44(44AE)被布置在封装体20A和20E之间。类似地,耦接到电极34C和34F两者的焊盘44(44CF)被布置在封装体20C和20F之间。另外,耦接到电极33E和33F两者的焊盘43(43EF)被布置在封装体20E和20F之间。
以这种方式,在X方向和Y方向上彼此相邻的封装体20被配置成使得它们的电极31至34与各个公共焊盘41至44耦接。此外,在光发射装置1中,在面板基板21上的同等布置位置处设置有电极31至34的封装体在Y方向上交替排列。具体而言,如在图3A中所示,封装体20A中的面板基板21上的电极31至34的布置位置和形状以及封装体20G中的面板基板21上的电极31至34的布置位置和形状彼此基本相同,并且封装体20B中的面板基板21上的电极31至34的布置位置和形状以及封装体20E中的面板基板21上的电极31至34的布置位置和形状彼此基本相同。此外,封装体20A和20G中面板基板21上的电极31至34的几何结构和形状以及封装体20B和20E中面板基板21上的电极31至34的几何结构和形状关于线X2-X2基本上对称。
此外,在发光装置1中,在X方向上排列的封装体20也具有对称的布置关系。具体而言,如在图3A中所示,在Y方向上排列的封装体20G、20E、20A以及20B中的电极31至34的几何结构和形状和在Y方向上排列的封装体20H、20F、20C以及20D的电极31至34的几何结构和形状关于线Y1-Y1基本对称。
[发光装置1的工作和效果]
在根据本实施方式的发光装置1中,电极31至34分别耦接至在X方向和Y方向上彼此相邻的封装体20中的各公共焊盘41至44。具体地,在封装体20中,可以通过两个连接件将包括发光元件10R、10G和10B的一个像素耦接到像素驱动电路15。这使得可以减少设置在共用基板11上的焊盘的总数和配线的数量。因此,与每个封装体20的电极31至34分别耦接至专用焊盘和配线的情况相比,允许更多数量的封装体20被集成并安装在共用基板11上。因此,用作显示设备的发光装置1能够显示具有更高清晰度图像。而且,用作照明设备的发光装置能够以更高的亮度照亮物体。
[2.第二实施方式]
图5示出了根据本公开第二实施方式的发光装置的封装体60的整体配置。尽管在上述第一实施方式中为单个封装体20而提供了包括发光元件10R、10G和10B的一个像素,但是该技术不限于此。本实施方式的封装体60包括设置在一个面板基板21上的四个像素。
具体地,发射红光的四个发光元件10R(10R1至10R4)、发射绿光的四个发光元件10G(10G1至10G4)以及发射蓝光的四个发光元件10B(10B1至10B4)被设置在面板基板21上。
这里,例如,发光元件10R1的一端和发光元件10R2的一端通过公共电极71耦接到设置在共用基板11上的焊盘81。发光元件10R1的另一端通过电极72耦接到焊盘82,并且发光元件10R2的另一端通过电极73耦接到焊盘83。
此外,例如,发光元件10R3的一端和发光元件10R4的一端通过公共电极74耦接到设置在共用基板11上的焊盘84。发光元件10R3的另一端通过电极72耦接到焊盘82,并且发光元件10R4的另一端通过电极73耦接到焊盘83。
此外,发光元件10G1的一端和发光元件10G2的一端通过公共电极75耦接到设置在共用基板11上的焊盘85。发光元件10G1的另一端通过电极72耦接到焊盘82,并且发光元件10G2的另一端通过电极73耦接到焊盘83。
此外,发光元件10G3的一端和发光元件10G4的一端通过公共电极76耦接到布置在共用基板11上的焊盘86。发光元件10G3的另一端通过电极72耦接到焊盘82,并且发光元件10G4的另一端通过电极73耦接到焊盘83。
此外,发光元件10B1的一端和发光元件10B2的一端通过公共电极77耦接到设置在共用基板11上的焊盘87。发光元件10B1的另一端通过电极72耦接到焊盘82,并且发光元件10B2的另一端通过电极73耦接到焊盘83。
此外,发光元件10B3的一端和发光元件10B4的一端通过公共电极78耦接到设置在共用基板11上的焊盘88。发光元件10B3的另一端通过电极72耦接到焊盘82,发光元件10G4的另一端通过电极73耦接到焊盘83。
如在图6A中所示,封装体60包括透明保护膜23,透明保护膜具有分别分离相邻像素的分离件或分离槽24。分离槽24将相邻的像素彼此光学分离。例如,在观察者从相对于共用基板11的倾斜方向观察的情况下,分离槽24防止亮度的变化。需注意的是,例如,封装体60也可以代替分离槽24而包括例如在透明保护膜23上具有遮光性的遮光膜25(与图6B中所示的封装体60A相同)。遮光膜25具有在构成每个像素的发光元件10R、10G和10B的正上方和附近的开口25K。遮光膜25从而限制倾斜发射的光。
以这种方式,尽管包括四个像素,但可以通过八个连接件81至88将封装体60和60A耦接到设置在共用基板11上的像素驱动电路15。因此,通过在共用基板11上以矩阵方式设置封装体60并在相邻封装体60之间共享连接件81至88从而为一个像素提供一个连接件是足够的。因此,本实施方式能够实现更高密度的安装。此外,在一个封装体60或60A上的相邻像素之间设置诸如分离凹槽24或遮光膜25的分离物使得能够抑制从斜方向观看时明显的亮度变化,从而能够实现高质量发光。
要注意的是,所有分离器在连接相邻像素的方向上理想地具有基本相等的宽度。这使得可以实现封装体的更高集成和更高质量的显示。在共用基板11上设置包括多个像素的多个封装体60的情况下(如图6C中通过示例方式所示),理想的是相邻封装体60之间的间隙24A的宽度和封装体60中的相邻像素之间的分离槽24的宽度也都基本相等(尺寸D1)。在这种情况下,同样理想的是各个像素的宽度基本相等(尺寸W1)。此外,在共用基板11上设置包括多个像素的多个封装体60A的情况下(如图6D中通过示例方式所示),理想的是相邻的开口25K的间隔全部基本相等(尺寸D2)。在这种情况下,同样理想的是各个像素的宽度基本相等(尺寸W2)。
要注意的是,分离器宽度的较大的变化导致在视觉上可察觉的亮度的更大的不均匀性。此外,将分离件的宽度窄的部分视觉识别为亮线,而将分离件的宽度宽的部分视觉识别为暗线。亮线和暗线混合的情况会导致图像质量下降。因此,分离器宽度的变化最好在±3%以内。
[3.第三实施方式]
图7示出了根据本公开第三实施方式的发光装置中的封装体61的整体配置。另外,图8A和8B是沿着图7中所示的线VIIIA-VIIIA和VIIIB-VIIIB截取的截面图。尽管在根据上述第二实施方式的封装体60中的所有电极71至78被设置在面板基板21上,但是该技术不限于此。根据本实施方式的封装体61具有多层配线结构,其中电极90至99设置在面板基板21上并且面板基板21包括耦接这些电极的配线层101和102A至102C。例如,与第二实施方式的封装体60相比,这能够减小封装体61的面板基板21的面积,从而能够实现更高密度的安装。
[4.另一个变形例]
尽管以上通过参考一些实施方式及其变形例描述了本公开,但是本公开不限于上述实施方式和变形例,并且能够以各种方式修改。例如,实施方式和变形例中描述的组件的布置位置、形状和数量不限于此,并且可以采用任何其他布置位置、形状和数量。例如,尽管根据第二实施方式的封装体60包括设置在单个面板基板21上的四个像素,但是三个以下或者五个以上的像素可以设置在一个面板基板上。另外,像素的排列方向不限于两个方向彼此正交的情况,并且可以是任何方向。
此外,尽管在实施方式和变型例中描述了包括多个发光元件的发光装置,但是该技术不限于此。例如,该技术可应用于在共用基板上包括多个封装体的传感器阵列的设备,其中代替发光元件而设置多个不同种类的传感器。例如,不同种类的传感器是温度传感器、光学传感器、压力传感器或气体传感器。在这样的传感器阵列装置中,布置在共用基板上的驱动电路可以按照线序从各个传感器收集数据。
此外,例如,共用基板可以是包括柔性树脂膜的柔性基板。
此外,尽管在实施方式和变形例中已经描述了其中发光元件是LED的情况,但是发光元件例如可以是半导体激光器。
应该注意,这里描述的效果仅仅是示例性的,并不限于其描述。本公开的效果可以是任何其他效果。而且,本公开可以具有以下配置:
(1)
一种发光装置,包括:
多个封装体,多个封装体的每一者包括第一基板,第一基板包括第一元件、第一电极、第二电极、第二元件、第三电极以及第四电极,第一电极和第二电极耦接到第一元件,第三电极和第四电极耦接到第二元件;以及
单个第二基板,多个封装体被排列在第二基板上,并且第二基板包括第一连接件、第二连接件和驱动电路,第一连接件与多个封装体的第一封装体中的第一电极和多个封装体的第二封装体中的第一电极两者耦接,第二封装体与多个封装体的第一封装体在第一方向上相邻,第二连接件与第一封装体中的第三电极和第二封装体中的第三电极两者耦接,驱动电路驱动多个封装体。
(2)
根据权利要求(1)所述的发光装置,其中,第二电极和第四电极集成为一体。
(3)
根据权利要求(1)或(2)所述的发光装置,其中,
多个封装体进一步包括第三封装体,第三封装体与第一封装体在第二方向上相邻,第二方向与第一方向正交,并且
第二基板进一步包括第三连接件,第三连接件与所有的第一封装体中的第二电极和第四电极以及第三封装体中的第二电极和第四电极耦接。
(4)
根据权利要求(3)所述的发光装置,其中,
多个封装体进一步包括第四封装体,第四封装体与第三封装体在第一方向上相邻并且与第二封装体在第二方向上相邻,并且
第二基板进一步包括:
第四连接件,与所有的第二封装体中的第二电极和第四电极以及第四封装体中的第二电极和第四电极耦接;
第五连接件,与第三封装体中的第一电极和第四封装体中的第一电极两者耦接;以及
第六连接件,与第三封装体中的第三电极和第四封装体中的第三电极两者耦接。
(5)
根据权利要求(1)所述的发光装置,其中,
多个封装体分别包括第三元件、第五电极和第六电极,第五电极和第六电极分别耦接到第三元件,
多个封装体进一步包括第五封装体,第五封装体在第一方向上跨第一封装体布置在第二封装体的相反的一侧,
第二基板进一步包括第五连接件,第五连接件与第一封装体中的第五电极和第五封装体中的第五电极两者耦接。
(6)
根据权利要求(5)所述的发光装置,其中,第一元件至第三元件包括分别发射各自具有第一波长至第三波长的光的第一发光元件至第三发光元件。
(7)
根据权利要求(1)到(6)中任一项所述的发光装置,其中,封装体包括将多个像素彼此光学分离的一个或多个分离器,多个像素均包括第一发光部和所述第二发光部。
(8)
根据权利要求(7)所述的发光装置,其中,
封装体进一步包括覆盖多个发光部的透明保护膜,并且
透明保护膜具有在彼此相邻的多个像素之间设置的分离槽或遮光膜来作为分离器。
(9)
根据权利要求(7)或(8)所述的发光装置,其中,多个分离器在连接彼此相邻的多个像素的方向上具有彼此基本相同的相应宽度。
(10)
一种发光装置,包括:
多个封装体,每个封装体包括第一基板,第一基板包括第一正面和第二背面,第一正面包括具有第一元件的第一像素、具有第二元件的第二像素、耦接到第一元件的第一电极以及耦接到第二元件的第二电极,第二背面包括与第一电极和第二电极两者耦接的配线层;以及
第二基板,设置在面向第二背面的第二正面上并且包括连接件和驱动电路,连接件耦接到配线层,驱动电路驱动多个封装体。
本申请要求于2015年10月5日向日本专利局提出的日本优先权专利申请JP2015-197372的权益,其全部内容通过引用结合于本文。
应该由本领域技术人员理解的是,根据目前的设计需求和其它系数可以发生各种变形、组合、子组合和改变,只要他们在所附权利要求或其等同物的范围内。
Claims (10)
1.一种发光装置,包括:
多个封装体,每一个封装体包括第一基板,所述第一基板包括第一元件、第一电极、第二电极、第二元件、第三电极以及第四电极,所述第一电极和所述第二电极耦接到所述第一元件,所述第三电极和所述第四电极耦接到所述第二元件;以及
单个第二基板,多个所述封装体被排列在所述第二基板上,并且所述第二基板包括第一连接件、第二连接件以及驱动电路,所述第一连接件与多个所述封装体的第一封装体中的第一电极和多个所述封装体的第二封装体中的第一电极两者耦接,所述第二封装体与多个所述封装体的所述第一封装体在第一方向上相邻,所述第二连接件与所述第一封装体中的第三电极和所述第二封装体中的第三电极两者耦接,所述驱动电路驱动多个所述封装体。
2.根据权利要求1所述的发光装置,其中,所述第二电极和所述第四电极集成为一体。
3.根据权利要求1所述的发光装置,其中,
多个所述封装体进一步包括第三封装体,所述第三封装体与所述第一封装体在第二方向上相邻,所述第二方向与所述第一方向正交,并且
所述第二基板进一步包括第三连接件,所述第三连接件与所有的所述第一封装体中的第二电极和第四电极以及所述第三封装体中的第二电极和第四电极耦接。
4.根据权利要求3所述的发光装置,其中,
多个所述封装体进一步包括第四封装体,所述第四封装体与所述第三封装体在所述第一方向上相邻并且与所述第二封装体在所述第二方向上相邻,并且
所述第二基板进一步包括:
第四连接件,与所有的所述第二封装体中的第二电极和第四电极以及所述第四封装体中的第二电极和第四电极耦接;
第五连接件,与所述第三封装体中的第一电极和所述第四封装体中的第一电极两者耦接;以及
第六连接件,与所述第三封装体中的第三电极和所述第四封装体中的第三电极两者耦接。
5.根据权利要求1所述的发光装置,其中,
多个所述封装体分别包括第三元件、第五电极和第六电极,所述第五电极和所述第六电极分别耦接到所述第三元件,
多个所述封装体进一步包括第五封装体,所述第五封装体设置在所述第一方向上的所述第一封装体的与所述第二封装体相反的一侧,以及
所述第二基板进一步包括第五连接件,所述第五连接件与所述第一封装体中的第五电极和所述第五封装体中的第五电极两者耦接。
6.根据权利要求5所述的发光装置,其中,所述第一元件至所述第三元件包括第一发光元件至第三发光元件,所述第一发光元件至所述第三发光元件分别发射各自具有第一波长至第三波长的光。
7.根据权利要求1所述的发光装置,其中,所述封装体包括将多个像素彼此光学分离的一个或多个分离器,所述多个像素均包括第一发光部和第二发光部。
8.根据权利要求7所述的发光装置,其中,
所述封装体进一步包括覆盖多个发光部的透明保护膜,并且
所述透明保护膜具有在彼此相邻的所述多个像素之间设置的分离槽或遮光膜来作为分离器。
9.根据权利要求7所述的发光装置,其中,多个所述分离器在连接彼此相邻的所述多个所述像素的方向上具有彼此基本相同的相应宽度。
10.一种发光装置,包括:
多个封装体,每个封装体包括第一基板,所述第一基板包括第一正面和第二背面,所述第一正面包括具有第一元件的第一像素、具有第二元件的第二像素、耦接到所述第一元件的第一电极以及耦接到所述第二元件的第二电极,所述第二背面包括与所述第一电极和所述第二电极两者耦接的配线层;以及
第二基板,设置在面向所述第二背面的第二正面上并且包括连接件和驱动电路,所述连接件耦接到所述配线层,所述驱动电路驱动所述多个封装体。
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US10840226B2 (en) | 2020-11-17 |
US20180342490A1 (en) | 2018-11-29 |
WO2017061226A1 (ja) | 2017-04-13 |
KR20180066034A (ko) | 2018-06-18 |
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