JP6680875B2 - エレクトロニクス部品のためのパッケージ、エレクトロニクス部品、およびエレクトロニクス装置 - Google Patents
エレクトロニクス部品のためのパッケージ、エレクトロニクス部品、およびエレクトロニクス装置 Download PDFInfo
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- JP6680875B2 JP6680875B2 JP2018519930A JP2018519930A JP6680875B2 JP 6680875 B2 JP6680875 B2 JP 6680875B2 JP 2018519930 A JP2018519930 A JP 2018519930A JP 2018519930 A JP2018519930 A JP 2018519930A JP 6680875 B2 JP6680875 B2 JP 6680875B2
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- 239000004065 semiconductor Substances 0.000 claims description 74
- 239000000463 material Substances 0.000 description 7
- 230000005670 electromagnetic radiation Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Description
20 エレクトロニクス部品
30 エレクトロニクス装置
100 筐体
101 上面
102 底面
110 空洞
120 条片
200 リードフレーム
201 上面
202 底面
203 隙間
204 鏡軸
210 第1の領域
211 上面
212 底面
213 第1の部分
214 第2の部分
220 第2の領域
221 上面
222 底面
223 第1の部分
224 第2の部分
230 第3の領域
231 上面
232 底面
233 第1の間隙
234 第2の間隙
300 エレクトロニクス半導体チップ
301 第1のエレクトロニクス半導体チップ
302 第2のエレクトロニクス半導体チップ
303 第3のエレクトロニクス半導体チップ
304 第4のエレクトロニクス半導体チップ
310 第1のコンタクトパッド
320 第2のコンタクトパッド
330 ボンドワイヤ
340 導電接続部
Claims (10)
- 筐体(100)と、前記筐体(100)に埋め込まれたリードフレーム(200)とを備え、
前記リードフレーム(200)は、互いに電気絶縁された第1の領域(210)と、第2の領域(220)と、第3の領域(230)とを含んでおり、
前記第1の領域(210)および前記第2の領域(220)は、それぞれL形であり、
前記第1の領域(210)、前記第2の領域(220)、および前記第3の領域(230)は、それぞれ、隙間(203)で互いに隔てられており、
前記第1の領域(210)、前記第2の領域(220)、および前記第3の領域(230)は、前記第3の領域(230)が前記第1の領域(210)と前記第2の領域(220)とに挟まれて、ほぼ長方形を構成し、
前記筐体(100)は空洞(110)を有しており、
前記リードフレーム(200)の前記第1の領域(210)、前記第2の領域(220)、および前記第3の領域(230)の上面(211、221、231)の少なくとも一部が、前記空洞(110)に露出しており、
前記第1の領域(210)の前記上面(211)の第1の部分(213)および第2の部分(214)が、前記空洞(110)に露出しており、
前記筐体(110)の条片(120)が、前記第1の部分(213)と前記第2の部分(214)との間の前記第1の領域(210)の前記上面(211)の領域を覆っている、
エレクトロニクス部品(20)のためのパッケージ(10)。 - 前記第1の領域(210)と前記第2の領域(220)とは、互いにミラー対称である、
請求項1に記載のパッケージ(10)。 - 前記リードフレーム(200)は、ミラー対称である、
請求項2に記載のパッケージ(10)。 - 前記リードフレーム(200)の前記第1の領域(210)、前記第2の領域(220)、および前記第3の領域(230)の底面(212、222、232)の少なくとも一部が、前記筐体(100)の底面(102)で露出している、
請求項1から3のいずれか一項に記載のパッケージ(10)。 - 請求項1に記載のパッケージ(10)と、
前記第3の領域(230)の前記上面(231)上の前記空洞(110)に配置されたエレクトロニクス半導体チップ(300)と、
を備える、エレクトロニクス部品(20)。 - 前記エレクトロニクス部品(20)は、前記第3の領域(230)の前記上面(231)に配置されたエレクトロニクス半導体チップ(300)を少なくとも2つ備えており、
前記エレクトロニクス半導体チップ(300)の少なくとも2つは、前記第1の領域(210)および前記第2の領域(220)と直列配置で電気接続されている、
請求項5に記載のエレクトロニクス部品(20)。 - 前記エレクトロニクス部品(20)は、前記第3の領域(230)の前記上面(231)に配置されたエレクトロニクス半導体チップ(300)を少なくとも2つ備えており、
前記エレクトロニクス半導体チップ(300)の少なくとも2つは、前記第1の領域(210)および前記第2の領域(220)と並列配置で電気接続されている、
請求項5又は6に記載のエレクトロニクス部品(20)。 - 請求項5から7のいずれか一項に記載のエレクトロニクス部品(20)を少なくとも2つ備える、
エレクトロニクス装置(30)。 - 前記エレクトロニクス部品(20)の少なくとも2つは、直列配置で電気接続されている、
請求項8に記載のエレクトロニクス装置(30)。 - 前記エレクトロニクス部品(20)の少なくとも2つは、並列配置で電気接続されている、
請求項8又は9に記載のエレクトロニクス装置(30)。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP2015/076461 WO2017080605A1 (en) | 2015-11-12 | 2015-11-12 | Package for an electronic component, electronic component and electronic arrangement |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018534776A JP2018534776A (ja) | 2018-11-22 |
JP6680875B2 true JP6680875B2 (ja) | 2020-04-15 |
Family
ID=54540108
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018519930A Active JP6680875B2 (ja) | 2015-11-12 | 2015-11-12 | エレクトロニクス部品のためのパッケージ、エレクトロニクス部品、およびエレクトロニクス装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10468337B2 (ja) |
JP (1) | JP6680875B2 (ja) |
DE (1) | DE112015007119T5 (ja) |
WO (1) | WO2017080605A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017073411A (ja) * | 2015-10-05 | 2017-04-13 | ソニー株式会社 | 発光装置 |
JP6680274B2 (ja) * | 2017-06-27 | 2020-04-15 | 日亜化学工業株式会社 | 発光装置及び樹脂付リードフレーム |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4369409B2 (ja) * | 2005-09-27 | 2009-11-18 | 日本ライツ株式会社 | 光源装置 |
US20080179618A1 (en) * | 2007-01-26 | 2008-07-31 | Ching-Tai Cheng | Ceramic led package |
JP5233170B2 (ja) * | 2007-05-31 | 2013-07-10 | 日亜化学工業株式会社 | 発光装置、発光装置を構成する樹脂成形体及びそれらの製造方法 |
US8049230B2 (en) * | 2008-05-16 | 2011-11-01 | Cree Huizhou Opto Limited | Apparatus and system for miniature surface mount devices |
JP5010716B2 (ja) * | 2010-01-29 | 2012-08-29 | 株式会社東芝 | Ledパッケージ |
TW201203627A (en) * | 2010-07-15 | 2012-01-16 | Lextar Electronics Corp | Light emitting diode and method for forming supporting frame thereof and improved structure of the supporting frame |
TWI533483B (zh) * | 2010-08-09 | 2016-05-11 | Lg伊諾特股份有限公司 | 發光裝置 |
TWI445103B (zh) * | 2010-08-19 | 2014-07-11 | Cyntec Co Ltd | 電子封裝結構及其封裝方法 |
CN102298125B (zh) * | 2011-03-03 | 2013-01-23 | 江苏多维科技有限公司 | 推挽桥式磁电阻传感器 |
-
2015
- 2015-11-12 WO PCT/EP2015/076461 patent/WO2017080605A1/en active Application Filing
- 2015-11-12 DE DE112015007119.9T patent/DE112015007119T5/de active Pending
- 2015-11-12 JP JP2018519930A patent/JP6680875B2/ja active Active
- 2015-11-12 US US15/775,584 patent/US10468337B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20180374784A1 (en) | 2018-12-27 |
WO2017080605A1 (en) | 2017-05-18 |
JP2018534776A (ja) | 2018-11-22 |
DE112015007119T5 (de) | 2018-07-26 |
US10468337B2 (en) | 2019-11-05 |
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