CN107946251A - 一种半导体产品的封装方法 - Google Patents
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Abstract
本发明是一种半导体产品的封装方法,属于半导体封装技术领域。其包括柔性半导体产品和芯片,所述柔性半导体产品的一面为覆晶面、另一面为非覆晶面,所述芯片通过焊球倒装于柔性半导体产品的覆晶面,芯片和柔性半导体产品中间填充底部填充料,所述芯片周围覆盖包覆材料形成保护层。所述承载载具包括承载环和承载膜,所述承载环呈方形环或者圆形环,其上设有承载环定位凹口,所述承载膜的粘附面为单面具有粘性的膜,承载膜的粘附面面向承载环。本实用提供了一种柔性半导体产品的封装结构及其承载载具。以实现柔性半导体产品在现有设备上完成封装的方法,满足后续焊接到电路板上的应用需求。
Description
本发明涉及一种半导体产品的封装方法,属于半导体封装技术领域。
背景技术
随着电子技术的发展,便携式手持终端等电子产品具有体积更小,单位范围内布线更多,电性能更好且具有良好的柔性及高可靠性,的柔性基板技术的发展迎合了这一发展趋势。与传统的条形基板不同,的柔性基板有以下几个特征:
1)圆形,直径通常为8英寸或12英寸;
2)分布有多颗基板单元;
3)内部有交替的绝缘层及金属线路层,厚度可以薄到25um,
4)没有刚性,易卷曲,并且受力易变形。
对于这类基板进行的封装,通常是将基板切成固定尺寸的条状,每个条状的基板有多颗基板单元,或者直接切成单颗单基板,然后用夹具固定的方法进行封装。
但目前柔性基板等柔性半导体产品存在不好拿持、展平等问题,对后续的封装工艺(如覆晶、包覆等工艺)过程带来极大的挑战。当前柔性基板等产品传统的拿持方式是通过治具夹持,把产品夹持在承载框架及盖板的中间,承载框架和盖板通过定位件和定位孔定位固定,盖板配置在承载框架上,以压合并固定产品。然而目前柔性半导体产品在这种传统的治具夹持下,进行封装工艺过程中还存在如下的一些问题:
1、在柔性半导体产品放入夹持治具后,柔性半导体产品有翘曲及贴附不牢的现象,夹持效果不好;
2、柔性半导体产品在放入夹持治具后,因夹持治具设计有对应的真空槽,在覆晶过程中,真空孔槽会直接影响覆晶的焊接质量;
3、已经完成覆晶的产品在生产工艺过程中需要从夹持的治具上取下,在取下时产品还没有做包覆等工步,仍然是柔性的,容易出现已经完成覆晶的芯片连接断裂的现象,这会造成产品拿持要求极高;
4、柔性基板越薄,难度越大。
发明内容
本发明的目的在于克服柔性基板封装中存在的不好拿持、展平等问题,提供一种简单易行、提高工艺能力和产品质量的半导体产品的封装方法。
本发明的目的是这样实现的:
本发明的目的是提供一种适用于柔性半导体产品的封装方法,其采用环形承载治具支撑柔性基板产品,解决了柔性基板产品倒装覆晶封装技术中产生的翘曲问题,并对覆晶芯片凸点焊接良率起到了有效改善。
本发明的另一目的是提供一种适用于倒装覆晶封装工艺中已有设备的承载治具,通过承载治具对柔性半导体产品的支持,达到在现有设备上满足产品质量和保证良率的要求。上述承载载具由承载膜和承载环组成,其中承载环上有用于指示产品方向,在各设备中定位产品的定位凹口。承载膜在贴附到承载环上后,在承载环对承载膜的张力的作用下,对柔性半导体产品具有良好的支撑作用,即满足现有设备对产品的真空吸附,固定产品位置,又满足对柔性半导体产品的支撑作用,使柔性半导体产品不产生变形而达到良好的封装制程要求。
本发明提供了一种承载载具,所述承载载具包括承载环和承载膜,所述承载环呈方形环或者圆形环,其上设有承载环定位凹口,
所述承载膜的粘附面为单面具有粘性的膜,承载膜的粘附面面向承载环。
本发明还提供了一种半导体产品的封装结构,其包括柔性半导体产品和芯片,所述柔性半导体产品的一面为覆晶面、另一面为非覆晶面,所述芯片通过焊球倒装于柔性半导体产品的覆晶面,芯片和柔性半导体产品中间填充底部填充料,所述芯片周围覆盖包覆材料形成保护层。
可选地,所述芯片是单芯片。
可选地,所述芯片是多芯片。
本发明进一步提供了一种半导体产品的封装方法,包括以下工艺步骤:
步骤一、贴膜设备把承载环送入贴膜平台,通过承载环的承载环定位凹口定位固定;设备通过张力模组把承载膜拉向承载环,使承载膜的粘附面面向承载环,使承载膜在贴向承载环时具有固定的张力(张力的大小依据工艺需求进行调整);设备贴膜模组把承载膜贴附在承载环上,切膜模组进一步地把多余的承载膜切除,形成完整的承载载具,完成后设备传送模组把承载载具传送出贴膜设备;
步骤二、把贴好承载膜的承载环放在工作桌上,使承载膜的粘附面向上,把柔性半导体产品的覆晶面向上,非覆晶面面向承载膜的粘附面,保持柔性半导体产品定位凹口与承载环定位凹口有固定的夹角(按工艺定义为0度,或90度,或180度,或270度),贴附在承载膜上;
步骤三、倒装设备自动传送柔性半导体产品进入设备内部,设备承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,通过真空孔把承载载具吸附定位,设备拾取模组将芯片拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片倒装在柔性半导体产品的预定位置上;完成倒装覆晶芯片后,自动传送出倒装设备,再自动传送到回流焊机,通过回流焊机的加热完成芯片与柔性半导体产品的固定连接;或者在倒装设备自动传送入倒装设备内部,设备承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,真空孔把承载载具吸附定位,倒装设备拾取模组将芯片拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片倒装至柔性半导体产品上,同时在倒装设备上通过加热功能,完成芯片对柔性半导体产品的固定连接;
步骤四、完成倒装焊接的产品,放在等离子清洗设备腔体内,启动该设备进行等离子清洗,完成后取出产品;
步骤五、完成等离子清洗的产品通过设备自动传送入底部填充设备,设备的承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,真空吸附固定柔性半导体产品,通过设备的加热,及底部填充模组的工作,把底部填充料填充入芯片和柔性半导体产品的间隙,完成底部填充的产品通过传送模组传送出设备;
步骤六、设备把完成以上工艺的产品传送到包覆设备承载平台,承载平台的定位装置通过对承载环的承载环定位凹口定位并固定,完成对柔性半导体产品的定位,并通过承载平台的真空吸附,固定柔性半导体产品的位置,然后通过设备自动加热、模具合拢、注入塑封料、塑封料成型完成对柔性半导体产品和芯片的包覆。完成后自动把产品传送出包覆设备;
步骤七、完成包覆后,从承载载具上取下柔性半导体产品;
步骤八、完成包覆的柔性半导体产品贴附划片膜,自动传送入划片设备完成分切,形成单颗的器件。
可选地,所述承载环呈方形环或者圆形环。
可选地,所述承载环的内直径比柔性半导体产品的内直径大3mm以上。
可选地,所述承载环的外直径比柔性半导体产品的外直径大10~50mm。
有益效果
1)本发明的封装方法有效地解决了柔性半导体产品在治具内翘曲和贴附不牢的现象,实现良好的承载方式,满足生产工艺过程中的需求;同时有效地避免了柔性半导体产品在传送过程中或生产过程中与设备表面接触而产生的擦伤等问题,有效地保证产品质量;
2)本发明的封装方法有效解决了夹持治具的真空孔带来的对柔性半导体产品在倒装覆晶过程中的焊接不良的质量问题;
3)本发明的封装方法在包覆完成后脱离治具,解决产品在包覆工艺前需要脱离治具时仍然是柔软的问题,有效地解决了产品的传送问题;
4)本发明的封装方法解决了产品越薄,生产过程中越难生产的问题,使不同厚度的产品有效地使用同一种工艺进行生产。
附图说明
图1A和图1B分别为柔性半导体产品的俯视图和剖面示意图;
图2A和图2B分别为承载环的俯视图和剖面示意图;
图3为本发明一种半导体产品的封装结构的示意图;
图4A-图4I为本发明一种半导体产品的封装方法的流程示意图;
其中:
承载环110
承载环定位凹口 111
承载膜120
粘附面121
柔性半导体产品 200
覆晶面201
非覆晶面202
柔性半导体产品定位凹口203
芯片300
底部填充材料401
包覆材料402。
具体实施方式
现在将在下文中参照附图更加充分地描述本发明,在附图中示出了本发明的示例性实施例,从而本公开将本发明的范围充分地传达给本领域的技术人员。然而,本发明可以以许多不同的形式实现,并且不应被解释为限制于这里阐述的实施例。
柔性半导体产品的结构是由多层金属和多层钝化层层层堆叠形成。如图1A和图1B所示,图1A为俯视图,图1B为剖面图。柔性半导体产品200包括覆晶面201和非覆晶面202、定位凹口203,它的特点是:厚度薄,最薄到25微米;产品柔软,可以随意折叠弯曲;电性能优异,和同类电路板相比,机械性能和电性能更具有优势。该柔性半导体产品200通过一承载载具支撑,进一步地拿持完成覆晶、回流焊接、等离子清洗、包覆等工步。
上述承载载具包括承载环110和承载膜120,如图2A和2B所示。图2A为俯视图,图2B为剖面图。该承载环110呈方形环或者圆形环,图2A中以圆形环示意。该承载膜120为单面具有粘性的膜。
本发明一种半导体产品的封装结构,如图3所示,其包括柔性半导体产品200和芯片300,所述芯片300是单芯片,也可以是功能相同或功能不同的多芯片。所述柔性半导体产品200的一面为覆晶面201、另一面为非覆晶面202,所述芯片300通过焊球倒装于柔性半导体产品200的覆晶面201,芯片300和柔性半导体产品200中间填充底部填充料401,所述芯片300周围覆盖包覆材料形成保护层402。
以下是本发明一种半导体产品的封装方法,具体为柔性半导体产品封装工艺的实施步骤:
步骤一、贴膜设备把承载环110送入贴膜平台,通过承载环110的承载环定位凹口111定位固定;设备通过张力模组把承载膜120拉向承载环110,使承载膜120的粘附面121面向承载环,使承载膜120在贴向承载环110时具有固定的张力(张力的大小依据工艺需求进行调整);设备贴膜模组把承载膜120贴附在承载环110上,切膜模组进一步地把多余的承载膜切除,形成完整的承载载具,如图4A所示。其中承载环110的内直径比产品直径大3mm以上,外直径比产品大10~50mm。完成后设备传送模组把承载载具传送出贴膜设备。
步骤二、把贴好承载膜120的承载环110放在工作桌上,使承载膜120的粘附面121向上,把柔性半导体产品200的覆晶面201向上,非覆晶面202面向承载膜120的粘附面121,保持柔性半导体产品定位凹口203与承载环定位凹口111有固定的夹角(按工艺定义为0度,或90度,或180度,或270度),贴附在承载膜120上,如图4B和图4C所示。
步骤三、倒装设备自动传送柔性半导体产品200进入设备内部,设备承载平台通过承载环110确定产品位置,通过承载环定位凹口111确定产品方向,确定方向后把承载载具传送到产品承载平台,通过真空孔把承载载具吸附定位,设备拾取模组将芯片300拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片300倒装在柔性半导体产品200的预定位置上;完成倒装覆晶芯片后,自动传送出倒装设备,再自动传送到回流焊机,通过回流焊机的加热完成芯片300与柔性半导体产品200的固定连接;或者在倒装设备自动传送入倒装设备内部,设备承载平台通过承载环110确定产品位置,通过承载环定位凹口111确定产品方向,确定方向后把承载载具传送到产品承载平台,真空孔把承载载具吸附定位,倒装设备拾取模组将芯片300拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片300倒装至柔性半导体产品200上,同时在倒装设备上通过加热功能,完成芯片300对柔性半导体产品200的固定连接。如图4D和4E所示。在此工艺中,承载载具的使用使倒装及回流设备不需要做任何的更改,直接兼容于其他产品且确保设备稳定生产。
步骤四、完成倒装焊接的产品,放在等离子清洗设备腔体内,启动该设备进行等离子清洗,完成后取出产品。在此工步中,传统的手动传送往往造成芯片300与柔性半导体产品200连接断裂,通过使用该承载载具,使柔性半导体产品200的传送避免了这种断裂的风险。
步骤五、完成等离子清洗的产品通过设备自动传送入底部填充设备,设备的承载平台通过承载环110确定产品位置,通过承载环定位凹口111确定产品方向,确定方向后把承载载具传送到产品承载平台,真空吸附固定柔性半导体产品200,通过设备的加热,及底部填充模组的工作,把底部填充料填充入芯片300和柔性半导体产品200的间隙,完成底部填充的产品通过传送模组传送出设备,如图4F所示。该承载载具的使用使整个传送过程更加稳定。同时,在底部填充过程中,承载膜在承载环支撑下的张力作用及支撑作用,避免了真空吸附对柔性半导体产品带来的变形,避免了柔性半导体产品因真空吸附造成的芯片300和柔性半导体产品200的连接断裂的风险及吸附过程中柔性半导体产品200因形变带来的填充不稳定。
步骤六、设备把完成以上工艺的产品传送到包覆设备承载平台,承载平台的定位装置通过对承载环定位凹口111定位并固定,完成对柔性半导体产品200的定位,并通过承载平台的真空吸附,固定柔性半导体产品200的位置,然后通过设备自动加热、模具合拢、注入塑封料、塑封料成型完成对柔性半导体产品200和芯片300的包覆。完成后自动把产品传送出包覆设备,如图4G所示。该工步承载载具的使用,解决了柔性半导体产品在包覆设备中的传送和无法定位的问题,及柔性半导体产品在包覆过程中的形变的问题。因为其他类型的载具无法进入包覆设备或者无法完成产品对模具的定位。
步骤七、完成包覆后,从承载载具上取下的产品不再是简单的柔性半导体产品,可以和常规的硅晶圆或其他基板类产品一样进行拿持传送,完成相关的工艺,如图4H所示。而取下的承载环110可以重复使用。
步骤八、完成包覆的柔性半导体产品贴附划片膜,自动传送入划片设备完成分切,形成单颗的器件如,如图4I所示。
本发明提供了一种简便易行的拿持方式,提高了柔性半导体产品生产工艺能力和产品质量。
以上所述的具体实施方式,对本发明的目的、技术方案和有益效果进行了进一步地详细说明,所应理解的是,以上所述仅为本发明的具体实施方式而已,并不用于限定本发明的保护范围,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (8)
1.一种承载载具,其特征在于,所述承载载具包括承载环和承载膜,所述承载环呈方形环或者圆形环,其上设有承载环定位凹口,
所述承载膜的粘附面为单面具有粘性的膜,承载膜的粘附面面向承载环。
2.一种半导体产品的封装结构,其特征在于,其包括柔性半导体产品和芯片,所述柔性半导体产品的一面为覆晶面、另一面为非覆晶面,所述芯片通过焊球倒装于柔性半导体产品的覆晶面,芯片和柔性半导体产品中间填充底部填充料,所述芯片周围覆盖包覆材料形成保护层。
3.根据权利要求2所述的半导体产品的封装结构,其特征在于,所述芯片是单芯片。
4.根据权利要求2所述的半导体产品的封装结构,其特征在于,所述芯片是多芯片。
5.一种半导体产品的封装方法,包括以下工艺步骤:
步骤一、贴膜设备把承载环送入贴膜平台,通过承载环的承载环定位凹口定位固定;设备通过张力模组把承载膜拉向承载环,使承载膜的粘附面面向承载环,使承载膜在贴向承载环时具有固定的张力(张力的大小依据工艺需求进行调整);设备贴膜模组把承载膜贴附在承载环上,切膜模组进一步地把多余的承载膜切除,形成完整的承载载具,完成后设备传送模组把承载载具传送出贴膜设备;
步骤二、把贴好承载膜的承载环放在工作桌上,使承载膜的粘附面向上,把柔性半导体产品的覆晶面向上,非覆晶面面向承载膜的粘附面,保持柔性半导体产品定位凹口与承载环定位凹口有固定的夹角(按工艺定义为0度,或90度,或180度,或270度),贴附在承载膜上;
步骤三、倒装设备自动传送柔性半导体产品进入设备内部,设备承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,通过真空孔把承载载具吸附定位,设备拾取模组将芯片拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片倒装在柔性半导体产品的预定位置上;完成倒装覆晶芯片后,自动传送出倒装设备,再自动传送到回流焊机,通过回流焊机的加热完成芯片与柔性半导体产品的固定连接;或者在倒装设备自动传送入倒装设备内部,设备承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,真空孔把承载载具吸附定位,倒装设备拾取模组将芯片拾起,翻转后蘸取助焊剂,通过图像识别系统对位把芯片倒装至柔性半导体产品上,同时在倒装设备上通过加热功能,完成芯片对柔性半导体产品的固定连接;
步骤四、完成倒装焊接的产品,放在等离子清洗设备腔体内,启动该设备进行等离子清洗,完成后取出产品;
步骤五、完成等离子清洗的产品通过设备自动传送入底部填充设备,设备的承载平台通过承载环确定产品位置,通过承载环定位凹口确定产品方向,确定方向后把承载载具传送到产品承载平台,真空吸附固定柔性半导体产品,通过设备的加热,及底部填充模组的工作,把底部填充料填充入芯片和柔性半导体产品的间隙,完成底部填充的产品通过传送模组传送出设备;
步骤六、设备把完成以上工艺的产品传送到包覆设备承载平台,承载平台的定位装置通过对承载环的承载环定位凹口定位并固定,完成对柔性半导体产品的定位,并通过承载平台的真空吸附,固定柔性半导体产品的位置,然后通过设备自动加热、模具合拢、注入塑封料、塑封料成型完成对柔性半导体产品和芯片的包覆,
完成后自动把产品传送出包覆设备;
步骤七、完成包覆后,从承载载具上取下柔性半导体产品;
步骤八、完成包覆的柔性半导体产品贴附划片膜,自动传送入划片设备完成分切,形成单颗的器件。
6.根据权利要求5所述的封装方法,其特征在于,所述承载环呈方形环或者圆形环。
7.根据权利要求5所述的封装方法,其特征在于,所述承载环的内直径比柔性半导体产品的内直径大3mm以上。
8.根据权利要求5所述的封装方法,其特征在于,所述承载环的外直径比柔性半导体产品的外直径大10~50mm。
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109152230A (zh) * | 2018-08-28 | 2019-01-04 | 上海幂方电子科技有限公司 | 柔性电路及其制造方法 |
CN110060944A (zh) * | 2019-04-03 | 2019-07-26 | 长电科技(宿迁)有限公司 | 一种具有等离子清洗功能的包封预热台 |
CN114247601A (zh) * | 2021-12-21 | 2022-03-29 | 合肥京东方星宇科技有限公司 | 芯片助焊剂涂覆装置 |
CN115377015A (zh) * | 2022-08-29 | 2022-11-22 | 北京超材信息科技有限公司 | 电子器件的封装结构及制作方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080032489A1 (en) * | 2006-08-03 | 2008-02-07 | Stmicroelectronics Ltd. | Removable wafer expander for die bonding equipment |
JP2012169670A (ja) * | 2012-05-28 | 2012-09-06 | Lintec Corp | ダイソート用シート |
WO2015134111A1 (en) * | 2014-03-07 | 2015-09-11 | Plasma-Therm, Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US20150270173A1 (en) * | 2014-03-21 | 2015-09-24 | Semiconductor Components Industries, Llc | Electronic die singulation method |
CN105006439A (zh) * | 2014-04-24 | 2015-10-28 | 东部Hitek株式会社 | 半导体器件之封装方法与实施该方法的装置 |
CN207818553U (zh) * | 2017-12-28 | 2018-09-04 | 江阴长电先进封装有限公司 | 一种半导体产品的封装结构及其承载载具 |
-
2017
- 2017-12-28 CN CN201711461458.7A patent/CN107946251B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080032489A1 (en) * | 2006-08-03 | 2008-02-07 | Stmicroelectronics Ltd. | Removable wafer expander for die bonding equipment |
JP2012169670A (ja) * | 2012-05-28 | 2012-09-06 | Lintec Corp | ダイソート用シート |
WO2015134111A1 (en) * | 2014-03-07 | 2015-09-11 | Plasma-Therm, Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US20150270173A1 (en) * | 2014-03-21 | 2015-09-24 | Semiconductor Components Industries, Llc | Electronic die singulation method |
CN105006439A (zh) * | 2014-04-24 | 2015-10-28 | 东部Hitek株式会社 | 半导体器件之封装方法与实施该方法的装置 |
CN207818553U (zh) * | 2017-12-28 | 2018-09-04 | 江阴长电先进封装有限公司 | 一种半导体产品的封装结构及其承载载具 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109152230A (zh) * | 2018-08-28 | 2019-01-04 | 上海幂方电子科技有限公司 | 柔性电路及其制造方法 |
CN110060944A (zh) * | 2019-04-03 | 2019-07-26 | 长电科技(宿迁)有限公司 | 一种具有等离子清洗功能的包封预热台 |
CN114247601A (zh) * | 2021-12-21 | 2022-03-29 | 合肥京东方星宇科技有限公司 | 芯片助焊剂涂覆装置 |
CN114247601B (zh) * | 2021-12-21 | 2024-02-02 | 合肥京东方星宇科技有限公司 | 芯片助焊剂涂覆装置 |
CN115377015A (zh) * | 2022-08-29 | 2022-11-22 | 北京超材信息科技有限公司 | 电子器件的封装结构及制作方法 |
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