CN107946177A - 一种减少光刻胶剥离工艺对器件性能影响的方法 - Google Patents

一种减少光刻胶剥离工艺对器件性能影响的方法 Download PDF

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CN107946177A
CN107946177A CN201711168487.4A CN201711168487A CN107946177A CN 107946177 A CN107946177 A CN 107946177A CN 201711168487 A CN201711168487 A CN 201711168487A CN 107946177 A CN107946177 A CN 107946177A
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stripping process
photoresist stripping
device performance
oxide film
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孟祥国
李全波
陆连
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Shanghai Huali Microelectronics Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31058—After-treatment of organic layers

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Abstract

本发明提出一种减少光刻胶剥离工艺对器件性能影响的方法，包括下列步骤：提供半导体衬底，侧墙刻蚀形成浅沟槽隔离结构；在上述结构上生长致密氧化物薄膜层；进行光刻胶旋涂与曝光工艺处理；进行离子注入工艺处理；进行光刻胶玻璃工艺处理后进行湿法清洗处理；去除所述致密氧化物薄膜层。本发明提出的减少光刻胶剥离工艺对器件性能影响的方法，通过在侧墙刻蚀之后增加致密氧化膜的生长，在离子注入光刻胶剥离时可以有效阻止有源区的注入离子的损失和晶圆表面的膜质损失，从而避免了因光刻胶剥离工艺的变更导致的器件漂移问题。

Description

一种减少光刻胶剥离工艺对器件性能影响的方法
技术领域
本发明涉及半导体集成电路制造领域，且特别涉及一种减少光刻胶剥离工艺对器件性能影响的方法。
背景技术
现有的离子注入工艺是以光刻胶层为掩膜进行的。在离子注入工艺尤其是大剂量的离子注入工艺后，光刻胶的材质会发生变化，在光刻胶层表面形成一层很硬的交联层。在进行离子注入工艺之后，需要通过灰化(Ash)工艺将位于光刻胶层表面的交联层去除，然后再利用湿法刻蚀工艺将残留的光刻胶层完全去除。
在灰化工艺过程中，对半导体衬底造成了损失，并且会在半导衬底上形成电荷污染，会造成最终形成的半导体器件的漏电流增加，比如在CMOS图像传感器中造成暗电流等缺陷。随着半导体工艺技术节点持续缩减，超浅结技术被广泛引用，灰化工艺对器件的性能造成的缺陷越来越明显。
现有技术是在侧墙刻蚀工艺之后有数道离子注入工艺，在光刻胶剥离工艺常有工艺更新，不同的光刻胶剥离工艺对晶圆表面的膜影响不同，在后续湿法工艺的作用下导致原注入的离子损失不同，从而对器件造成影响。
因此，需要一种针对离子注入工艺后的光刻胶层的去除方法，能够将光刻胶层去除，并且不会损伤半导体衬底，不会造成半导体衬底的电荷污染和缺陷。
发明内容
本发明提出一种减少光刻胶剥离工艺对器件性能影响的方法，减少甚至避免光刻胶剥离工艺或者光刻胶工艺变化时对器件的影响。
为了达到上述目的，本发明提出一种减少光刻胶剥离工艺对器件性能影响的方法，包括下列步骤：
提供半导体衬底，侧墙刻蚀形成浅沟槽隔离结构；
在上述结构上生长致密氧化物薄膜层；
进行光刻胶旋涂与曝光工艺处理；
进行离子注入工艺处理；
进行光刻胶玻璃工艺处理后进行湿法清洗处理；
去除所述致密氧化物薄膜层。
进一步的，所述致密氧化物薄膜层的厚度为10～30埃。
进一步的，所述致密氧化物薄膜层去除采用湿法刻蚀工艺。
进一步的，所述浅沟槽隔离结构中沉积有多晶硅层。
进一步的，所述浅沟槽隔离结构上部沉积有硬掩膜层。
进一步的，所述侧墙结构包括氧化硅层和氮化硅层。
本发明提出的减少光刻胶剥离工艺对器件性能影响的方法，通过在侧墙刻蚀之后增加致密氧化膜的生长，在离子注入光刻胶剥离时可以有效阻止有源区的注入离子的损失和晶圆表面的膜质损失，从而避免了因光刻胶剥离工艺的变更导致的器件漂移问题。
附图说明
图1所示为本发明较佳实施例的减少光刻胶剥离工艺对器件性能影响的方法流程图。
图2所示为本发明较佳实施例的离子注入示意图。
图3所示为本发明较佳实施例的离子注入后示意图。
具体实施方式
以下结合附图给出本发明的具体实施方式，但本发明不限于以下的实施方式。根据下面说明和权利要求书，本发明的优点和特征将更清楚。需说明的是，附图均采用非常简化的形式且均使用非精准的比率，仅用于方便、明晰地辅助说明本发明实施例的目的。
请参考图1，图1所示为本发明较佳实施例的减少光刻胶剥离工艺对器件性能影响的方法流程图。本发明提出一种减少光刻胶剥离工艺对器件性能影响的方法，包括下列步骤：
步骤S100：提供半导体衬底，侧墙刻蚀形成浅沟槽隔离结构；
步骤S200：在上述结构上生长致密氧化物薄膜层；
步骤S300：进行光刻胶旋涂与曝光工艺处理；
步骤S400：进行离子注入工艺处理；
步骤S500：进行光刻胶玻璃工艺处理后进行湿法清洗处理；
步骤S600：去除所述致密氧化物薄膜层。
再请参考图2和图3，图2所示为本发明较佳实施例的离子注入示意图。图3所示为本发明较佳实施例的离子注入后示意图。根据本发明较佳实施例，所述致密氧化物薄膜层OX的厚度为10～30埃。所述致密氧化物薄膜层OX去除采用湿法刻蚀工艺。所述浅沟槽隔离结构中沉积有多晶硅层Poly。所述浅沟槽隔离结构上部沉积有硬掩膜层HM。所述侧墙结构包括氧化硅层SP1OX和氮化硅层SP1SIN。
本发明提出的减少光刻胶剥离工艺对器件性能影响的方法，通过在侧墙刻蚀之后增加致密氧化膜OX的生长，在离子注入光刻胶PR剥离时可以有效阻止有源区的注入离子的损失和晶圆Sub表面的膜质损失，从而避免了因光刻胶剥离工艺的变更导致的器件漂移问题。
虽然本发明已以较佳实施例揭露如上，然其并非用以限定本发明。本发明所属技术领域中具有通常知识者，在不脱离本发明的精神和范围内，当可作各种的更动与润饰。因此，本发明的保护范围当视权利要求书所界定者为准。

Claims (6)

1.一种减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，包括下列步骤：
提供半导体衬底，侧墙刻蚀形成浅沟槽隔离结构；
在上述结构上生长致密氧化物薄膜层；
进行光刻胶旋涂与曝光工艺处理；
进行离子注入工艺处理；
进行光刻胶玻璃工艺处理后进行湿法清洗处理；
去除所述致密氧化物薄膜层。
2.根据权利要求1所述的减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，所述致密氧化物薄膜层的厚度为10～30埃。
3.根据权利要求1所述的减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，所述致密氧化物薄膜层去除采用湿法刻蚀工艺。
4.根据权利要求1所述的减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，所述浅沟槽隔离结构中沉积有多晶硅层。
5.根据权利要求1所述的减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，所述浅沟槽隔离结构上部沉积有硬掩膜层。
6.根据权利要求1所述的减少光刻胶剥离工艺对器件性能影响的方法，其特征在于，所述侧墙结构包括氧化硅层和氮化硅层。
CN201711168487.4A 2017-11-21 2017-11-21 一种减少光刻胶剥离工艺对器件性能影响的方法 Pending CN107946177A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109659231A (zh) * 2018-12-27 2019-04-19 上海华力集成电路制造有限公司 光刻胶剥离工艺中改善器件均一性的方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101308786A (zh) * 2007-05-15 2008-11-19 中芯国际集成电路制造(上海)有限公司 半导体器件的离子注入方法
CN101399203A (zh) * 2007-09-29 2009-04-01 中芯国际集成电路制造(上海)有限公司 金属硅化物薄膜的制备方法
CN101673674A (zh) * 2008-09-10 2010-03-17 中芯国际集成电路制造(北京)有限公司 一种多晶硅预掺杂方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101308786A (zh) * 2007-05-15 2008-11-19 中芯国际集成电路制造(上海)有限公司 半导体器件的离子注入方法
CN101399203A (zh) * 2007-09-29 2009-04-01 中芯国际集成电路制造(上海)有限公司 金属硅化物薄膜的制备方法
CN101673674A (zh) * 2008-09-10 2010-03-17 中芯国际集成电路制造(北京)有限公司 一种多晶硅预掺杂方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109659231A (zh) * 2018-12-27 2019-04-19 上海华力集成电路制造有限公司 光刻胶剥离工艺中改善器件均一性的方法

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