CN107925404A - 功率器件 - Google Patents

功率器件 Download PDF

Info

Publication number
CN107925404A
CN107925404A CN201680046927.6A CN201680046927A CN107925404A CN 107925404 A CN107925404 A CN 107925404A CN 201680046927 A CN201680046927 A CN 201680046927A CN 107925404 A CN107925404 A CN 107925404A
Authority
CN
China
Prior art keywords
transistor
power device
inductance element
grid
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201680046927.6A
Other languages
English (en)
Inventor
田村亮佑
杉本薰
贺屋秀介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Furukawa Automotive Systems Inc
Original Assignee
Furukawa Electric Co Ltd
Furukawa Automotive Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd, Furukawa Automotive Systems Inc filed Critical Furukawa Electric Co Ltd
Publication of CN107925404A publication Critical patent/CN107925404A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/645—Inductive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/08116—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in composite switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10—Modifications for increasing the maximum permissible switched voltage
    • H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/168—Modifications for eliminating interference voltages or currents in composite switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/0566—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883—Combination of depletion and enhancement field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10—Inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1903—Structure including wave guides
    • H01L2924/19032—Structure including wave guides being a microstrip line type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08—Microstrips; Strip lines
    • H01P3/081—Microstriplines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K2017/6875—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors using self-conductive, depletion FETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Conversion In General (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Ceramic Engineering (AREA)

Abstract

本发明提供一种功率器件，其能够容易地设计在维持开关速度不变的同时应对高频噪声的开关电路。功率器件(10、10A～10D)包括：常导通型第一晶体管(12)、常关断型第二晶体管(14)、以及在第一晶体管(12)与第二晶体管(14)之间构建共源共栅连接且包含电感元件(32)的电通路(16)。

Description

功率器件
技术领域
本发明涉及将常导通型第一晶体管和常关断型第二晶体管共源共栅连接而构成的功率器件。
背景技术
现有技术中，一直在开发适于将电力作为驱动源的移动体例如电动车辆的电源系统的功率变换装置(以下称作功率器件)。最近，提出各种用于弥补利用宽带隙(WBG)半导体的晶体管的缺点并谋求小型化、高效率化的安装技术。
在专利文献1中，提出如下装置：将常导通型第一晶体管(SiC-JFET)和常关断型第二晶体管(Si-MOSFET)共源共栅连接(cascode connection)，并在第一晶体管的栅极与第二晶体管的源极之间设置用于调节开关速度的RC电路。并且记载了能通过开关速度的时间控制来抑制谐振(例如浪涌(surge))的发生并降低开关损耗的意思。
现有技术文献
专利文献
专利文献1：日本专利第5012930号公报(图1、图3、图5～图8等)
发明内容
发明要解决的课题
在这种功率器件中，为了高速稳定地执行开关动作，应对因各种原因而发生的高频噪声是重要的。今后伴随安装对象(例如电动车辆)的高性能化，功率器件的工作频率的上升不可避免，可预测该噪声应对的重要性会进一步增加。
根据专利文献1中提出的控制方法，通过在开关期间的后半段使共源共栅连接的常导通器件的开关速度变慢来抑制浪涌。然而，在该控制方法中，由于在开关期间的后半段使开关速度变慢，所以，不言而喻，会以相应程度发生开关损耗。
作为进一步的问题，在专利文献1所示的电路结构中包含作为高通滤波器发挥作用的RC电路。高通滤波器为了使属于高频段的频率成分大量通过，因此随着要应对的噪声成分的频率增加，每次都需要设计截止频率得以提高的滤波器。由此出现开关电路的设计变得极其烦杂等不良状况。
另外，作为其他现有技术的浪涌对策，是在渥尔曼电路(Cascode Circuit)的栅极插入铁氧体磁珠，抑制该栅极的浪涌，由此将漏极电流的浪涌也包括在内进行抑制。然而，在利用GaN系化合物半导体的器件中，即使在渥尔曼电路的栅极插入铁氧体磁珠，使栅极的浪涌得以抑制，但与之相反，漏极电流的浪涌变大，从而，电路整体的浪涌抑制效果不充分。
本发明鉴于上述的课题而提出，目的在于，提供一种能够容易地设计开关电路的功率器件，该开关电路维持开关速度不变且采用了高频噪声对策。
用于解决课题的手段
本发明所涉及的“功率器件”包括：常导通型第一晶体管，其具有第一栅极、第一源极以及第一漏极，并利用GaN系化合物半导体；常关断型第二晶体管，其具有第二栅极、第二源极以及第二漏极；以及电通路(electrical path)，其在所述第一晶体管与所述第二晶体管之间构建将所述第一栅极和所述第二源极连接且将所述第一源极和所述第二漏极连接而成的共源共栅连接，并且在所述第一晶体管与所述第二晶体管之间包含电感元件。
如此，由于在第一晶体管与第二晶体管之间，构建共源共栅连接的电通路包含电感元件，因此在共源共栅连接侧施加有作用使电感元件的频率特性得到反映的滤波器、即较多地截止属于高频段的频率成分的高频滤波器的电压。如此，即使在要应对的噪声成分的频率增加的情况下，只要是比截止频率高的值，也不需要大幅变更滤波器。由此，能够容易地设计在维持高的开关速度不变的同时实现了应对高频噪声的开关电路。
另外更优选，所述电感元件设置于所述第一晶体管的所述第一栅极与所述第二晶体管的所述第二源极之间的所述电通路。通过将电感元件配置于该电通路，能够在不损害开关速度的情况下，得到抑制栅极端子和漏极端子双方的浪涌的效果。
另外优选，所述电感元件是具有对伴随开关动作产生的浪涌进行抑制或去除的频率特性的电感器。由此难以受到伴随开关动作的浪涌的影响。
另外优选，所述电感元件是所述频率特性不同的多个电感器，所述多个电感器在所述电通路上并联连接，整流作用方向不一致的朝向的多个二极管与所述多个电感器分别串联连接。通过二极管的整流作用，能对应于充放电的方向选择不同的高频滤波器。另外，还有防止电感器的反向电压变小、在第二晶体管的第二源极施加过度电压的效果。
另外优选，所述电感元件是所述频率特性不同的多个电感器，所述多个电感器在所述电通路上串联连接。能将频率特性的范围相互包罗，并且高频滤波器的有效频带宽度实质扩大。
另外优选，所述电感元件是配置或成膜在所述第一晶体管所具有的栅极电极焊盘上的磁性构件。还优选，取而代之，所述电感元件是形成在所述第一晶体管所具有的栅极电极焊盘上的微带线(micro-strip line)。还优选，取而代之，所述电感元件是所述电通路中所含的电气布线的一部分，所述电气布线的一部分具有与剩余的部位不同的粗度、长度、线宽或形状。
任一种形态中，电子元件的件数都较少，因此能高效地进行配置，且能实现装置尺寸的小型化以及制造成本的降低。
发明效果
根据本发明所涉及的功率器件，能够容易地设计在维持开关速度不变的同时实现了应对高频噪声的开关电路。
附图说明
图1是各实施方式中通用的功率器件的电路图。
图2是第一实施方式所涉及的功率器件的电路图。
图3是表示图2的第一晶体管的结构例的截面图。
图4是第二实施方式所涉及的功率器件的电路图。
图5是表示图4的第一晶体管的结构例的截面图。
图6是表示电感元件所带来的第一效果的示意图。
图7是表示电感元件所带来的第二效果的示意图。
图8是第三实施方式所涉及的功率器件的电路图。
图9是第四实施方式所涉及的功率器件的电路图。
图10是表示图9的各电感器的频率特性的示意图。
具体实施方式
以下举出本发明所涉及的功率器件的优选实施方式，并参考附图来进行说明。
[各实施方式中通用的功率器件10的构成]
图1是各实施方式中通用的功率器件10的电路图。该功率器件10例如是适于以电力为驱动源的电动车辆的电源系统的装置，构成以及用途并不限于此。
功率器件10包含常导通型第一晶体管12、常关断型第二晶体管14构件以及构建第一晶体管12与第二晶体管14之间的共源共栅连接的电通路16(更详细而言，为路径部18、20)而构成。第一晶体管12具有第一栅极(G)、第一源极(S)以及第一漏极(D)，第二晶体管14具有第二栅极(G)、第二源极(S)以及第二漏极(D)。
在此，所谓“常导通型”，是指在不对栅极(G)施加电压的状态(通常的状态)下，在源极(S)-漏极(D)间“流过”电流的方式。反之，所谓“常关断型”，是指在不对栅极(G)施加电压的状态(通常的状态)下，在源极(S)-漏极(D)间“不流过”电流的方式。
第一晶体管12例如由利用含有氮化镓(GaN)的GaN系化合物半导体、即宽带隙(WBG)半导体的结型场效应晶体管(JFET；Junction Field Effect Transistor)构成。或者第一晶体管12也可以是高电子迁移率晶体管(HEMT；High Electron MobilityTransistor)。
第二晶体管14例如由利用硅(Si)的MOS(Metal-Oxide-Semiconductor，金属氧化物半导体)型FET构成。pn结型的寄生二极管15插入至第二晶体管14的第二源极(S)与第二漏极(D)之间。
如从图1理解的那样，第一晶体管12的第一漏极(D)与漏极端子21连接，第二晶体管14的第二源极(S)与源极端子22连接，第二晶体管14的第二栅极(G)与栅极端子23连接。另外，第一晶体管12的第一源极(S)经由路径部18与第二晶体管14的第二漏极(D)连接。另外，第一晶体管12的第一栅极(G)经由路径部20与第二晶体管14的第二源极(S)连接。
路径部18由包含键合线(bonding wire)48(图3)的导电性电气布线26构成。路径部20由与第一晶体管12连接的导电性电气布线27、与第二晶体管14连接的导电性电气布线28以及配置于电气布线27、28之间的含电感部30构成。也可以与其一起或与其分开地，含电感部30设于路径部18侧。另外，含电感部30也可以不经由电气布线27(28)而与第一晶体管12(第二晶体管14)直接连接。
含电感部30是显著大于电通路16整体的寄生电感的电感元件32，或者包含该电感元件32而构成。即，需要留意的是，在电感元件32中不包括电路设计上非刻意的微小电感(例如，电气布线26～28的寄生电感)这点。
[第一实施方式]
<功率器件10A的构成>
接下来参考图2以及图3来说明第一实施方式所涉及的功率器件10A的构成。图2所示的功率器件10A的含电感部30由电感器40构成。即，电感元件32是1个电感器40。
图3(a)是表示图2的第一晶体管12的结构例的截面图。更详细而言，该图相当于第一晶体管12的包括栅极电极焊盘46的主要部分放大截面图。关于包含其他部位的功率器件10A的整体构成，例如可以适用JP特开2008-66553号公报记载的各种公知的构成。
第一晶体管12按照从图中下侧朝向上侧的顺序层叠基板42、电子迁移层43、电子提供层44、层间绝缘膜45以及栅极电极焊盘46而构成。第一晶体管12使用GaN系化合物半导体，通常，基板42由含Si或SiC的材料构成，电子迁移层43由含非掺杂的GaN的材料构成，电子提供层44由含AlGaN(氮化铝镓)的材料构成，层间绝缘膜45由含SiO2(二氧化硅)的材料构成。
栅极电极焊盘46通过由金、银、铝等构成的键合线48与未图示的引线框电连接。在此，在栅极电极焊盘46上形成作为图2的电感器40发挥功能的磁性薄膜50。该磁性薄膜50由铁氧体等磁性体构成，使用包括蒸镀在内的各种公知的成膜法来形成。
如此，电感元件32是成膜在第一晶体管12所具有的栅极电极焊盘46上的磁性构件，具体而言可以是磁性薄膜50。在此情况下，由于电子元件的件数可以较少，因此能高效地进行配置，能谋求装置尺寸的小型化以及制造成本的降低。
也可以取而代之，如图3(b)所示那样，电感元件32是成膜在第一晶体管12所具有的栅极电极焊盘46上的例如曲折结构的微带线53。所谓微带线53，是在基板55的下表面形成导体箔(GND)56并在基板55的上表面形成线状的导体箔(传送线路)54的电路结构。即使是该形态，也由于电子元件的件数少，因此也能得到与上述情况同样的作用效果。
也可以取而代之，电感元件32是电通路16中所含的电气布线27(28)的一部分。在此情况下，设计电气布线27(28)，使其具有与其余的部位不同的粗度、长度、线宽或形状。作为该设计方法，具体而言，不仅能举出键合线48的粗度或长度，还能举出布线图案(未图示)的长度或线宽。另外，也可以变更键合线48的形状(例如卷绕成线圈状)来调整电感。即使是该形态，也由于电子元件的件数较少，因此也能得到与上述情况同样的作用效果。
<功率器件10A所带来的效果>
由于电感器40越在高频侧则越具有高阻抗，因此，能够在不阻碍功率器件10A的开关动作的情况下抑制包含比开关频率高的频率成分的浪涌。
[第二实施方式]
接下来，参考图4以及图5来说明第二实施方式所涉及的功率器件10B。图4所示的功率器件10B的含电感部30由电感器60、与电感器60串联连接的电阻62、与电感器60和电阻62的串联部分分别并联连接的电容器64、电阻66构成。即，电感元件32是1个电感器60。
如此，含电感部30并不限于L电路(第一实施方式)，也可以是包含其他电子元件(R以及/或C)的组合电路。由此，与第一实施方式的功率器件10A相比，采用了高频噪声对策的开关电路的设计灵活性增加。
此外，含电感部30(图4)既可以由具有L、R、C的各功能的电子部件的组合(包含L)构成，也可以由具有能用等效电路模型表现的电气性质的材料(图5的贴片磁珠(chipbeads)52)构成。
图5是表示图4的第一晶体管12的结构例的截面图。该图与图3同样，相当于第一晶体管12的包括栅极电极焊盘46的主要部分放大截面图。关于包含其他部位的功率器件10B的整体构成，如上述那样，可以适用各种公知的构成。
第一晶体管12按照从图中下侧朝向上侧的顺序层叠基板42、电子迁移层43、电子提供层44、层间绝缘膜45以及栅极电极焊盘46而构成。另外，栅极电极焊盘4经由键合线48与未图示的引线框电连接。在此，在栅极电极焊盘46上配置作为图4的电感器60以及电阻62(RL串联部分)发挥功能的贴片磁珠52。
管状的贴片磁珠52由铁氧体等磁性体构成，插入并贯通键合线48。此外，贴片磁珠52也可以具有将印刷有螺旋状的导线图案(各一半)的2种磁性薄片交替配置的层叠结构。
如此，电感元件32是配置在第一晶体管12所具有的栅极电极焊盘46上的磁性构件，具体而言可以是贴片磁珠52。在此情况下，由于电子元件的件数少，因此能高效地进行配置，并能谋求装置尺寸的小型化以及制造成本的降低。
此外，在该图例中将贴片磁珠52配置在栅极电极焊盘46上，但并不限于该配置形态。例如，也可以将贴片磁珠52配置在第一晶体管12的第一栅极(G)与第二晶体管14的第二源极(S)之间的电气布线27、28侧，还可以将贴片磁珠52配置在第一晶体管12的第一源极(S)与第二晶体管14的第二漏极(D)之间的路径部18侧。
<浪涌抑制效果>
接下来，参考图6，从频率特性的观点对电感元件32所带来的浪涌抑制效果进行说明。例如，假想伴随功率器件10B的开关动作而在电压或电流的波形中发生浪涌。该浪涌波形具有主要成分包含浪涌频率fs的频率特性(所谓的功率谱)。
图6是表示电感元件32所带来的第一效果的示意图，更详细而言，是表示功率器件10B的频率特性的图表。图表的横轴是频率(f；单位是Hz)，纵轴是含电感部30的阻抗(单位：Ω)。此外，在该图例中，作为“频率特性”的物理量(纵轴)采用阻抗，但也可以是电感(单位：H)。
该频率特性L1表示具有一个以峰值频率f1为中心的峰的带阻滤波器。频率越接近于峰值频率f1则阻抗越高。也就是说，随着浪涌频率fs接近于峰值频率f1而抑制或去除浪涌的效果提高。如此，若浪涌频率fs为已知，则导入具有频率差|fs-f1|的值接近于0的频率特性L1的含电感部30即可。
如以上那样，在包含电感元件32的共源共栅连接侧施加有作用使电感元件32的频率特性(L1)得到反映的滤波器、即较多地截止属于高频段的频率成分的高频滤波器的电压。
于是，在要应对的噪声成分的频率增加的情况下，只要是比截止频率高的值，就不需要大幅变更滤波器。由此，能够容易地设计在维持高的开关速度不变的同时应对高频噪声的开关电路。
另外，电感元件32优选设于第一晶体管12的第一栅极(G)与第二晶体管14的第二源极(S)之间的电通路(即路径部20)。通过在该电通路配置电感元件32，能够在不损害开关速度的情况下得到抑制栅极端子23和漏极端子21双方的浪涌的效果。
接下来，参考图7，从波形的观点对电感元件32所发挥的浪涌抑制效果进行说明。更详细而言，图7(a)是基于有无含电感部30的漏极电压的波形图，图7(b)是基于有无含电感部30的栅极电流的波形图。
实线的图表示具有含电感部30的状况，虚线的图表示没有含电感部30的状况。另外，假设在漏极端子21连接电源、在源极端子22连接GND，在栅极端子23连接GND的情况。
如图7(a)所示那样，若开始从“导通状态”向“关断状态”的开关动作，则漏极电压在从GND(0V)急剧上升后，一边重复衰减振动一边不断向稳态值接近。如从该图理解的那样，在“有”的情况下，与“无”的情况相比，浪涌大幅得到抑制。
如图7(b)所示那样，若开始从“导通状态”向“关断状态”的开关动作，则栅极电流在从稳态值急剧上升后，一边重复衰减振动一边不断向初始值(稳态值)接近。如从该图理解的那样，“有”的情况与“无”的情况相比，浪涌大幅得到抑制。
如此，通过采用功率器件10B的构成，能得到抑制浪涌所引起的高频噪声的滤波器效果。此外，上述作用效果并不限于功率器件10B的形态，在其他实施方式中也同样能得到。
[第三实施方式]
接下来，参考图8来说明第三实施方式所涉及的功率器件10C。图8所示的功率器件10C的含电感部30由并联连接的2个电感器70、72、与电感器70串联连接的二极管74和与电感器72串联连接的二极管76构成。即，电感元件32为多个(在此为2个)电感器70、72。
二极管74的阳极侧与电感器70连接，并且阴极侧与第二晶体管14的第二源极(S)侧连接。二极管76的阳极侧与第二晶体管14的第二源极(S)侧连接，并且阴极侧与电感器72连接。换言之，2个二极管74、76在电通路16上沿整流作用方向不一致的方向并联连接，并且在二极管74串联连接电感器70、在二极管76串联连接电感器72。
在此，通过使用频率特性不同的多个电感器70、72，通过二极管74、76的整流作用，能对应于充放电的方向选择不同的高频滤波器。另外，还有防止电感器70、72的反向电压变小、在第二晶体管14的第二源极(S)施加过度的电压的效果。
[第四实施方式]
接下来，关于第四实施方式所涉及的功率器件10D，参考图9以及图10来进行说明。图9所示的功率器件10D的含电感部30由串联连接的2个电感器80、82构成。即，电感元件32是多个(在此为2个)电感器80、82。
图10所示的图表的横轴是频率(f；单位是Hz)，纵轴是电感器80、82的阻抗(单位：Ω)。此外，在该图例中，作为“频率特性”的物理量(纵轴)而采用阻抗，但也可以是电感(单位：H)。
电感器80具有带阻滤波器型的频率特性L2，其具有一个以峰值频率f2为中心的峰。另外，电感器82具有带阻滤波器型的频率特性L3，其具有一个以峰值频率f3(>f2)为中心的峰。在此情况下，含电感部30的阻抗相当于两者的阻抗的和(L2+L3)。
如此，通过将频率特性L2、L3不同的多个(在此为2和)电感器80、82在电通路16上串联连接，能使频率特性的范围相互包罗。其结果，高频滤波器的有效频带宽度实质扩大。
[各实施方式中共同的作用效果]
如以上那样，功率器件10(10A～10D)包括：[1]常导通型第一晶体管12，其具有第一栅极(G)、第一源极(S)以及第一漏极(D)，并利用GaN系化合物半导体；[2]常关断型第二晶体管14，其具有第二栅极(G)、第二源极(S)以及第二漏极(D)；和[3]电通路16，其在第一晶体管12与第二晶体管14之间构建将第一栅极(G)和第二源极(S)连接且将第一源极(S)和第二漏极(D)连接的共源共栅连接，并且在第一晶体管12与第二晶体管14之间包含含电感部30。由于在第一晶体管12与第二晶体管14之间，构建共源共栅连接的电通路16包含电感元件32，因此在共源共栅连接侧施加已作用使电感元件32的频率特性得到反映的滤波器即较多地截止属于高频段的频率成分的高频滤波器的电压。
如此，即使在要应对的噪声成分的频率增加的情况下，只要是比截止频率高的值，也不需要大幅变更滤波器。由此，能够能容易地设计在维持开关速度不变的同时应对高频噪声的开关电路。
另外，电感元件32更优选设于第一晶体管12的第一栅极(G)与第二晶体管14的第二源极(S)之间的电通路(路径部20)。通过将电感元件32配置于该电通路，能够在不损害开关速度的情况下得到抑制栅极端子23和漏极端子21双方的浪涌的效果。
另外，电感元件32优选是具有抑制或去除伴随开关动作产生的浪涌的频率特性的电感器40、60、70、72、80、82。由此难以受到伴随开关动作的浪涌的影响。
[备注]
此外，本发明并不限定于上述的实施方式，当然可以在不脱离本发明的主旨的范围内自由变更。例如，只要没有技术上的矛盾，则可以适当组合各实施方式中的特征的一部分。
标号的说明
10(A/B/C/D) 功率器件
12 第一晶体管
14 第二晶体管
15 寄生二极管
16 电通路
18、20 路径部
21 漏极端子
22 源极端子
23 栅极端子
26～28 电气布线
30 含电感部
32 电感元件
40、60、70、72、80、82 电感器
42 基板
43 电子迁移层
44 电子提供层
46 栅极电极焊盘
48 键合线(电气布线)
50 磁性薄膜(磁性构件)
52 贴片磁珠(磁性构件)
53 微带线
54 导体箔(传送线路)
55 基板
56 导体箔(GND)
60、66 电阻
74、76 二极管

Claims (7)

1.一种功率器件，其特征在于，包括：
常导通型第一晶体管，其具有第一栅极、第一源极以及第一漏极，并利用GaN系化合物半导体；
常关断型第二晶体管，其具有第二栅极、第二源极以及第二漏极；以及
电通路，其在所述第一晶体管与所述第二晶体管之间构建将所述第一栅极和所述第二源极连接且将所述第一源极和所述第二漏极连接的共源共栅连接，并且在所述第一晶体管与所述第二晶体管之间包含电感元件。
2.根据权利要求1所述的功率器件，其特征在于，
所述电感元件设于所述第一晶体管的所述第一栅极与所述第二晶体管的所述第二源极之间的所述电通路。
3.根据权利要求2所述的功率器件，其特征在于，
所述电感元件是具有对伴随开关动作产生的浪涌进行抑制或去除的频率特性的电感器。
4.根据权利要求3所述的功率器件，其特征在于，
所述电感元件是所述频率特性不同的多个电感器，
所述多个电感器在所述电通路上并联连接，
整流作用方向不一致的方向的多个二极管与所述多个电感器分别串联连接。
5.根据权利要求3所述的功率器件，其特征在于，
所述电感元件是所述频率特性不同的多个电感器，
所述多个电感器在所述电通路上串联连接。
6.根据权利要求1～5中任一项所述的功率器件，其特征在于，
所述电感元件是配置或成膜在所述第一晶体管所具有的栅极电极焊盘上的磁性构件。
7.根据权利要求1～5中任一项所述的功率器件，其特征在于，
所述电感元件是形成在所述第一晶体管所具有的栅极电极焊盘上的微带线。
CN201680046927.6A 2015-09-10 2016-09-09 功率器件 Pending CN107925404A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015178375 2015-09-10
JP2015-178375 2015-09-10
PCT/JP2016/076540 WO2017043611A1 (ja) 2015-09-10 2016-09-09 パワーデバイス

Publications (1)

Publication Number Publication Date
CN107925404A true CN107925404A (zh) 2018-04-17

Family

ID=58239910

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680046927.6A Pending CN107925404A (zh) 2015-09-10 2016-09-09 功率器件

Country Status (5)

Country Link
US (1) US20180174986A1 (zh)
EP (1) EP3349358A4 (zh)
JP (1) JPWO2017043611A1 (zh)
CN (1) CN107925404A (zh)
WO (1) WO2017043611A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7224918B2 (ja) 2019-01-04 2023-02-20 株式会社東芝 半導体装置及び半導体パッケージ
EP4044225B1 (en) * 2021-02-16 2024-06-26 Nexperia B.V. A semiconductor device and a method of manufacturing a semiconductor device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4297718A (en) * 1973-05-22 1981-10-27 Semiconductor Research Foundation Mitsubishi Denki K.K. Vertical type field effect transistor
CN102388535A (zh) * 2009-03-27 2012-03-21 瑞士苏黎世联邦理工学院 具有栅地阴地放大器电路的开关装置
US20120241756A1 (en) * 2011-03-21 2012-09-27 International Rectifier Corporation High Voltage Composite Semiconductor Device with Protection for a Low Voltage Device
CN103872006A (zh) * 2012-12-17 2014-06-18 Nxp股份有限公司 级联电路
WO2014094115A1 (en) * 2012-12-21 2014-06-26 Gan Systems Inc. Devices and systems comprising drivers for power conversion circuits
CN103972193A (zh) * 2013-02-05 2014-08-06 英飞凌科技奥地利有限公司 功率晶体管装置和用于制造功率晶体管装置的方法
US20140306238A1 (en) * 2011-11-24 2014-10-16 Sharp Kabushiki Kaisha Semiconductor device and electronic apparatus
CN104769840A (zh) * 2012-11-09 2015-07-08 三菱电机株式会社 共源共栅放大器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19902520B4 (de) * 1999-01-22 2005-10-06 Siemens Ag Hybrid-Leistungs-MOSFET
DE102005051571B4 (de) * 2005-10-21 2013-06-20 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Photodioden-Chip hoher Grenzfrequenz
US8766275B2 (en) * 2010-01-25 2014-07-01 Sharp Kabushiki Kaisha Composite semiconductor device
JP5012930B2 (ja) * 2010-02-15 2012-08-29 株式会社デンソー ハイブリッドパワーデバイス
US9236376B2 (en) * 2011-03-21 2016-01-12 Infineon Technologies Americas Corp. Power semiconductor device with oscillation prevention
US8766375B2 (en) * 2011-03-21 2014-07-01 International Rectifier Corporation Composite semiconductor device with active oscillation prevention
US9343440B2 (en) * 2011-04-11 2016-05-17 Infineon Technologies Americas Corp. Stacked composite device including a group III-V transistor and a group IV vertical transistor
JP5290354B2 (ja) * 2011-05-06 2013-09-18 シャープ株式会社 半導体装置および電子機器
JP2013042270A (ja) * 2011-08-12 2013-02-28 Advanced Power Device Research Association トランジスタ回路、双方向スイッチ回路、ダイオード回路及びトランジスタ回路の製造方法
WO2013046439A1 (ja) * 2011-09-30 2013-04-04 ルネサスエレクトロニクス株式会社 半導体装置
WO2013146570A1 (ja) * 2012-03-27 2013-10-03 シャープ株式会社 カスコード回路
JP6223729B2 (ja) * 2013-06-25 2017-11-01 株式会社東芝 半導体装置
KR102178865B1 (ko) * 2015-02-25 2020-11-18 한국전자통신연구원 고속 스위칭 성능을 갖는 캐스코드 타입의 스위치 회로

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4297718A (en) * 1973-05-22 1981-10-27 Semiconductor Research Foundation Mitsubishi Denki K.K. Vertical type field effect transistor
CN102388535A (zh) * 2009-03-27 2012-03-21 瑞士苏黎世联邦理工学院 具有栅地阴地放大器电路的开关装置
US20120241756A1 (en) * 2011-03-21 2012-09-27 International Rectifier Corporation High Voltage Composite Semiconductor Device with Protection for a Low Voltage Device
US20140306238A1 (en) * 2011-11-24 2014-10-16 Sharp Kabushiki Kaisha Semiconductor device and electronic apparatus
CN104769840A (zh) * 2012-11-09 2015-07-08 三菱电机株式会社 共源共栅放大器
CN103872006A (zh) * 2012-12-17 2014-06-18 Nxp股份有限公司 级联电路
WO2014094115A1 (en) * 2012-12-21 2014-06-26 Gan Systems Inc. Devices and systems comprising drivers for power conversion circuits
CN103972193A (zh) * 2013-02-05 2014-08-06 英飞凌科技奥地利有限公司 功率晶体管装置和用于制造功率晶体管装置的方法

Also Published As

Publication number Publication date
EP3349358A1 (en) 2018-07-18
EP3349358A4 (en) 2019-04-17
WO2017043611A1 (ja) 2017-03-16
US20180174986A1 (en) 2018-06-21
JPWO2017043611A1 (ja) 2018-06-21

Similar Documents

Publication Publication Date Title
US9871008B2 (en) Monolithic microwave integrated circuits
US9692363B2 (en) RF power transistors with video bandwidth circuits, and methods of manufacture thereof
US9571044B1 (en) RF power transistors with impedance matching circuits, and methods of manufacture thereof
CN105103289B (zh) 半导体装置
JP7133305B2 (ja) ビデオ帯域幅が強化されたｒｆ電力増幅器用のマルチベースバンド終端コンポーネント
CN107403794B (zh) 包括倒装地安装的ic和垂直集成的电感器的半导体封装体
CN205081096U (zh) Esd保护器件
CN109560069B (zh) 带有屏蔽结构的晶体管、封装器件及其制造方法
US9852928B2 (en) Semiconductor packages and modules with integrated ferrite material
US10897249B1 (en) Switching circuits having drain connected ferrite beads
US20110140825A1 (en) Inductor
JP6346643B2 (ja) カスコード回路に基づく半導体パッケージ構造
CN112053994A (zh) 半导体衬底和半导体装置
CN107925404A (zh) 功率器件
US9159679B2 (en) Semiconductor package with integrated passives and method for fabricating same
JP2013045979A (ja) 半導体デバイスパッケージ及び半導体デバイスパッケージの製造方法
US10510636B2 (en) Electronic module
CN208143194U (zh) 带有esd保护功能的电感器
JP2010199241A (ja) 半導体装置
CN115295500A (zh) 转换器、电子设备及转换器的封装方法
CN107393881B (zh) 具有集成的电感器的ic封装体
US8154874B2 (en) Use of flexible circuits in a power module for forming connections to power devices
US10128170B2 (en) Conductive clip connection arrangements for semiconductor packages
JP2015019002A (ja) 半導体装置
WO2023145316A1 (ja) 半導体装置および半導体モジュール

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20180417