CN107819052A - A kind of efficiently crystal silicon non crystal heterogeneous agglomeration battery structure and preparation method thereof - Google Patents
A kind of efficiently crystal silicon non crystal heterogeneous agglomeration battery structure and preparation method thereof Download PDFInfo
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- CN107819052A CN107819052A CN201711303308.3A CN201711303308A CN107819052A CN 107819052 A CN107819052 A CN 107819052A CN 201711303308 A CN201711303308 A CN 201711303308A CN 107819052 A CN107819052 A CN 107819052A
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 46
- 239000010703 silicon Substances 0.000 title claims abstract description 46
- 239000013078 crystal Substances 0.000 title claims abstract description 43
- 238000005054 agglomeration Methods 0.000 title claims abstract description 20
- 230000002776 aggregation Effects 0.000 title claims abstract description 20
- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 107
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims description 13
- 230000008021 deposition Effects 0.000 claims description 13
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 238000012360 testing method Methods 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 5
- 235000008216 herbs Nutrition 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 238000005245 sintering Methods 0.000 claims description 5
- 210000002268 wool Anatomy 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 229910000077 silane Inorganic materials 0.000 claims description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- HJELPJZFDFLHEY-UHFFFAOYSA-N silicide(1-) Chemical compound [Si-] HJELPJZFDFLHEY-UHFFFAOYSA-N 0.000 claims 1
- 230000009466 transformation Effects 0.000 abstract description 4
- 230000003287 optical effect Effects 0.000 abstract description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004050 hot filament vapor deposition Methods 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0725—Multiple junction or tandem solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
- H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a kind of crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof.It includes the lower intrinsic amorphous silicon layer of upper intrinsic amorphous silicon layer and the layer-of-substrate silicon lower floor on layer-of-substrate silicon and layer-of-substrate silicon upper strata, the upper strata of upper intrinsic amorphous silicon layer is disposed with the doped amorphous silicon layer of smooth surface first, the doped amorphous silicon layer of smooth surface second and upper TOC layers from lower to upper, and the lower floor of lower intrinsic amorphous silicon layer is disposed with the 3rd doped amorphous silicon layer and lower TOC layers from top to bottom.After above-mentioned structures and methods, due to setting two layers of smooth surface doped amorphous silicon layer and by realizing smooth surface codope amorphous silicon layer by adjusting process parameter in preparation process, make its film layer while there is excellent optical property and electric property, thus in the case where not influenceing HJT battery smooth surface doped amorphous silicon electric conductivity, improve the band gap of the doped amorphous silicon layer, the utilization rate of light is improved, so as to improve the photoelectric transformation efficiency of HJT batteries.
Description
Technical field
The present invention relates to a kind of crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof, belong to solar cell system
Make technical field.
Background technology
With the development of solar battery technology, the exploitation of high-efficiency battery is increasingly paid attention to, wherein using amorphous silicon intrinsic
Layer（a-Si:H(i)）The silicon substrate heterojunction solar cell of passivation（HJT batteries）It is one of research direction of emphasis；It is well known that
Silicon substrate heterojunction solar cell does not only have high transformation efficiency, high open-circuit voltage, and has low temperature coefficient, without photic
Decay（LID）, without electroluminescent decay（PID）, the advantage such as low preparation technology temperature, in addition silicon based hetero-junction battery ensureing high turn
While changing efficiency, silicon wafer thickness can be thinned to 100 μm, effectively reduce silicon material consumption, and can be used to prepare flexible battery
Component.
However, for HJT batteries, non-crystalline silicon plays passivation, forms the key effect of p-n junction, for HJT batteries
Conversion efficiency plays decisive role, and therefore, the excellent amorphous silicon membrane of processability is the crucial skill for obtaining efficient HJT batteries
Art, in the prior art, because non-crystalline silicon mainly has intrinsic amorphous silicon and doped amorphous silicon, smooth surface doping amorphous in HJT batteries
Silicon layer is due to that will ensure good electric conductivity, and usual hydrogen content is less, and band gap is smaller, thus the transmitance of light is relatively low, influences light
Utilization rate.
The content of the invention
The technical problem to be solved in the present invention is to provide one kind in the case where not influenceing electric conductivity, the utilization of light is improved
Rate, so as to improve the crystal silicon of photoelectric transformation efficiency/non crystal heterogeneous agglomeration battery structure and preparation method thereof.
In order to solve the above-mentioned technical problem, crystal silicon of the invention/non crystal heterogeneous agglomeration battery structure, including layer-of-substrate silicon with
And the lower intrinsic amorphous silicon layer of upper intrinsic amorphous silicon layer and the layer-of-substrate silicon lower floor on layer-of-substrate silicon upper strata, upper intrinsic amorphous silicon layer
Upper strata is disposed with the doped amorphous silicon layer of smooth surface first, the doped amorphous silicon layer of smooth surface second and upper TOC layers from lower to upper,
The lower floor of lower intrinsic amorphous silicon layer is disposed with the 3rd doped amorphous silicon layer and lower TOC layers from top to bottom.
The thickness of the doped amorphous silicon layer of smooth surface first and smooth surface second doped amorphous silicon layer is 2-10 nm.
The energy gap of the doped amorphous silicon layer of smooth surface first is 1.7-1.9 eV, and the smooth surface second adulterates non-
The energy gap of crystal silicon layer is 1.5-1.7 eV.
The thickness of the upper intrinsic amorphous silicon layer and lower intrinsic amorphous silicon layer is 5-15 nm, the 3rd doping amorphous
The thickness of silicon layer is 5-20 nm, and the thickness of the upper TOC layers and lower TOC layers is 70-120 nm.
A kind of crystal silicon/non crystal heterogeneous agglomeration battery preparation method described above, comprises the following steps：
A, making herbs into wool processing is carried out to n type single crystal silicon piece, forms pyramid matte, removed foreign ion and carry out surface cleaning；
B, the upper intrinsic amorphous silicon layer at the positive back side and lower intrinsic amorphous silicon layer are prepared by vapour deposition, upper intrinsic amorphous silicon layer with
The thickness of lower intrinsic amorphous silicon layer is 5-15nm；
C, n-type amorphous silicon layer is prepared using vapour deposition in lower intrinsic amorphous silicon layer surface, i.e. the 3rd doped amorphous silicon layer, it is thick
Spend for 5-20nm；
D, prepare two layers of p-type doped amorphous silicon layer using vapour deposition in upper intrinsic amorphous silicon layer surface, as smooth surface, i.e., by
The first p-type of smooth surface doped amorphous silicon layer, smooth surface the second p-type doped amorphous silicon layer, its thickness is 2-10 nm, and thickness is preferred
For 5 nm, in addition, the energy gap of the doped amorphous silicon layer of smooth surface first is 1.7-1.9 eV, preferably 1.8 eV, smooth surface
The energy gap of second doped amorphous silicon layer is 1.5-1.7 eV, preferably 1.6 eV；
E, upper TCO conducting films are deposited using magnetically controlled sputter method（TOC layers）With lower TCO conducting films, thickness 70-120nm；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 0.1-2mm, and main grid number is 2-20, the positive back of the body
The face secondary grid line width of silver is 20-70 μm, line number 80-250；
G, sintering makes to form good Ohmic contact between metal and silicon；
H, carry out testing the electrical property of battery.
Above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof, uses PECVD
Deposition（PECVD）Or hot-wire chemical gas-phase deposition（HWCVD）Prepare two layers of smooth surface doped amorphous silicon film.
Above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof, double-deck smooth surface amorphous silicon film is once
Completed in technical process, use silane, hydrogen, impurity gas（Gas containing boron or P elements）Reaction generation.
After above-mentioned structures and methods, due to setting two layers of smooth surface doped amorphous silicon layer and by preparing
During smooth surface codope amorphous silicon layer realized by adjusting process parameter, make its film layer while there is excellent optical property
And electric property, thus in the case where not influenceing HJT battery smooth surface doped amorphous silicon electric conductivity, improve the doping amorphous
The band gap of silicon layer, the utilization rate of light is improved, so as to improve the photoelectric transformation efficiency of HJT batteries.
Brief description of the drawings
Fig. 1 is the structural representation of crystal silicon of the present invention/non crystal heterogeneous agglomeration battery structure.
Embodiment
With reference to the accompanying drawings and detailed description, to invention crystal silicon/non crystal heterogeneous agglomeration battery structure and its preparation side
Method is described in further detail.
As illustrated, crystal silicon/non crystal heterogeneous agglomeration battery structure of the present invention, including layer-of-substrate silicon 1 and layer-of-substrate silicon
The upper intrinsic amorphous silicon layer 2 on upper strata and the lower intrinsic amorphous silicon layer 3 of layer-of-substrate silicon lower floor, the upper strata of upper intrinsic amorphous silicon layer 2 by
Under be up disposed with the first doped amorphous silicon layer of smooth surface 4, the second doped amorphous silicon layer of smooth surface 5 and upper TOC layers 6, by
The thickness of the first doped amorphous silicon layer of smooth surface 4 and the second doped amorphous silicon layer of smooth surface 5 is 2-10 nm, and smooth surface first is mixed
The energy gap of miscellaneous amorphous silicon layer 4 is 1.7-1.9 eV, and the energy gap of the second doped amorphous silicon layer of smooth surface 5 is 1.5-1.7
EV, the lower floor of lower intrinsic amorphous silicon layer 3 is disposed with the 3rd doped amorphous silicon layer 7 and lower TOC layers 8 from top to bottom, upper intrinsic
Amorphous silicon layer 2 and the thickness of lower intrinsic amorphous silicon layer 3 are 5-15 nm, and the thickness of the 3rd doped amorphous silicon layer 7 is 5-20 nm,
The thickness of upper TOC layers 6 and lower TOC layers 8 is 70-120 nm, is led in addition, the surface of upper TOC layers and lower TOC layers also has respectively
Screen printing scopiform is crossed into positive back side silver metal electrodes.
A kind of above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery preparation method, comprises the following steps：
A, making herbs into wool processing is carried out to n type single crystal silicon piece, forms pyramid matte, removed foreign ion and carry out surface cleaning；
B, the upper intrinsic amorphous silicon layer at the positive back side and lower intrinsic amorphous silicon layer are prepared by vapour deposition, upper intrinsic amorphous silicon layer with
The thickness of lower intrinsic amorphous silicon layer is 5-15nm；
C, n-type amorphous silicon layer is prepared using vapour deposition in lower intrinsic amorphous silicon layer surface, i.e. the 3rd doped amorphous silicon layer, it is thick
Spend for 5-20nm；
D, two layers of p-type doped amorphous silicon layer is prepared using vapour deposition in upper intrinsic amorphous silicon layer surface, as smooth surface, i.e., the
One doped amorphous silicon layer 4, the second doped amorphous silicon layer 5, its thickness are 2-10 nm；
E, TCO conducting films up and down, thickness 70-120nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 0.1-2mm, and main grid number is 2-20, the positive back of the body
The face secondary grid line width of silver is 20-70 μm, line number 80-250；
G, sintering makes to form good Ohmic contact between metal and silicon；
H, carry out testing the electrical property of battery.
In addition, it is necessary to explanation is that smooth surface doped amorphous silicon is to use plasma enhanced chemical gas in preparation process
Mutually deposit（PECVD）Or hot-wire chemical gas-phase deposition（HWCVD）Prepare smooth surface doped amorphous silicon film, double-deck smooth surface non-crystalline silicon
Film can be completed during one-time process, use silane, hydrogen, impurity gas（Gas containing boron or P elements）Reaction life
Into.
Following comparative illustration is made to the actual effect of the present invention with reference to specific comparative example：
Comparative example：
A, making herbs into wool processing is carried out to the monocrystalline silicon piece that N-type thickness is 180 μm, forms pyramid matte, removed foreign ion and enter
Row surface cleaning；
B, double intrinsic amorphous silicon layers at the positive back side, positive back side intrinsic amorphous silicon thickness are prepared by plasma activated chemical vapour deposition
For 10nm；
C, it is smooth surface doped layer to choose P-type non-crystalline silicon film, and n-type non-crystalline silicon is prepared using plasma enhanced chemical vapor deposition
Layer, thickness is 10 nm；
D, p-type amorphous silicon layer is prepared using plasma activated chemical vapour deposition, energy gap is 1.7 eV, the nm of thickness 10；
E, TCO conducting films, thickness 80nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 1mm, and main grid number is 4, positive back silver pair grid
Line width is 60 μm, line number 100；
G, sintering makes to form good Ohmic contact between metal and silicon.
H, carry out testing the electrical property of battery.
Embodiment：
A, making herbs into wool processing is carried out to the monocrystalline silicon piece that N-type thickness is 180 μm, forms pyramid matte, removed foreign ion and enter
Row surface cleaning；
B, double intrinsic amorphous silicon layers at the positive back side, positive back side intrinsic amorphous silicon thickness are prepared by plasma activated chemical vapour deposition
For 10nm；
C, it is smooth surface doped layer to choose p-type amorphous silicon film.N-type non-crystalline silicon is prepared using plasma enhanced chemical vapor deposition
Layer, thickness 10nm；
D, p-type amorphous silicon layer is prepared using plasma activated chemical vapour deposition,
| Energy gap | Thickness | |
| First doped layer | 1.7 eV | 5 nm |
| Second doped layer | 1.6 eV | 5 nm |
E, TCO conducting films, thickness 80nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 1mm, and main grid number is 4, positive back silver pair grid
Line width is 60 μm, line number 100；
G, sintering makes to form good Ohmic contact between metal and silicon.
H, carry out testing the electrical property of battery.
The electrical property for preparing HJT batteries according to the method described above be see the table below, it can be seen that efficiency is improved 0.15%（abs）,
The lifting being mainly manifested on electric current and filling capacity, the lifting of electric current mainly have benefited from the larger forbidden band of the doped layer of smooth surface first
The high transmittance that width is brought, and the band-gap with intrinsic amorphous silicon layer；The lifting of filling mainly has benefited from smooth surface
The high conductivity that the low energy gap of two doped layers is brought.Therefore realize that smooth surface codope is non-using by adjusting process parameter
Crystal silicon layer, it is feasible, specific contrast test number to make its film layer while have excellent optical property and the scheme of electric property
According to as follows：
Claims (7)
1. a kind of crystal silicon/non crystal heterogeneous agglomeration battery structure, including layer-of-substrate silicon（1）And layer-of-substrate silicon upper strata is upper intrinsic non-
Crystal silicon layer（2）With the lower intrinsic amorphous silicon layer of layer-of-substrate silicon lower floor（3）, it is characterised in that：The upper intrinsic amorphous silicon layer（2）'s
Upper strata is disposed with the doped amorphous silicon layer of smooth surface first from lower to upper（4）, the doped amorphous silicon layer of smooth surface second（5）With it is upper
TOC layers（6）, the lower intrinsic amorphous silicon layer（3）Lower floor be disposed with the 3rd doped amorphous silicon layer from top to bottom（7）With under
TOC layers（8）.
2. according to the crystal silicon described in claim 1/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The smooth surface first
Doped amorphous silicon layer（4）With the doped amorphous silicon layer of smooth surface second（5）Thickness be 2-10 nm.
3. according to the crystal silicon described in claim 1 or 2/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The smooth surface
One doped amorphous silicon layer（4）Energy gap be 1.7-1.9 eV, the doped amorphous silicon layer of smooth surface second（5）Forbidden band it is wide
Spend for 1.5-1.7 eV.
4. according to the crystal silicon described in claim 3/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The upper intrinsic amorphous
Silicon layer（2）With lower intrinsic amorphous silicon layer（3）Thickness be 5-15 nm, the 3rd doped amorphous silicon layer（7）Thickness be 5-
20 nm, the upper TOC layers（6）With lower TOC layers（8）Thickness be 70-120 nm.
A kind of 5. crystal silicon/non crystal heterogeneous agglomeration battery preparation method as described in one of claim 1-4, it is characterised in that bag
Include following steps：
A, making herbs into wool processing is carried out to n type single crystal silicon piece, forms pyramid matte, removed foreign ion and carry out surface cleaning；
B, the upper intrinsic amorphous silicon layer at the positive back side and lower intrinsic amorphous silicon layer are prepared by vapour deposition, upper intrinsic amorphous silicon layer with
The thickness of lower intrinsic amorphous silicon layer is 5-15nm；
C, n-type amorphous silicon layer is prepared using vapour deposition in lower intrinsic amorphous silicon layer surface, i.e. the 3rd doped amorphous silicon layer, it is thick
Spend for 5-20nm；
D, two layers of p-type doped amorphous silicon layer is prepared using vapour deposition in upper intrinsic amorphous silicon layer surface, as smooth surface, i.e., the
One doped amorphous silicon layer（4）, the second doped amorphous silicon layer（5）, its thickness is 2-10 nm；
E, TCO conducting films up and down, thickness 70-120nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 0.1-2mm, and main grid number is 2-20, the positive back of the body
The face secondary grid line width of silver is 20-70 μm, line number 80-250；
G, sintering makes to form good Ohmic contact between metal and silicon；
H, carry out testing the electrical property of battery.
6. according to the crystal silicon described in claim 5/non crystal heterogeneous agglomeration battery structure and preparation method thereof, it is characterised in that make
Two layers of smooth surface doped amorphous silicon film is prepared with plasma enhanced chemical vapor deposition or hot-wire chemical gas-phase deposition.
7. according to the crystal silicon described in claim 6/non crystal heterogeneous agglomeration battery structure and preparation method thereof, it is characterised in that：It is double
Layer smooth surface amorphous silicon film is completed during one-time process, uses silane, hydrogen, impurity gas reaction generation.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108538966A (en) * | 2018-04-18 | 2018-09-14 | 晋能光伏技术有限责任公司 | A kind of deficient manufacturing procedure rework preocess method after efficient heterojunction battery CVD |
| CN109411551A (en) * | 2018-12-13 | 2019-03-01 | 江苏爱康能源研究院有限公司 | Efficient silicon/crystalline silicon heterojunction solar battery electrode structure of multiple deposition and preparation method thereof |
| CN109449227A (en) * | 2018-12-13 | 2019-03-08 | 江苏爱康能源研究院有限公司 | Silicon/crystalline silicon heterojunction solar battery electrode structure of lamination intrinsic layer and preparation method thereof |
| CN109461780A (en) * | 2018-12-13 | 2019-03-12 | 江苏爱康能源研究院有限公司 | Efficient silicon/crystalline silicon heterojunction solar battery electrode structure of high matching degree and preparation method thereof |
| CN109638101A (en) * | 2018-12-04 | 2019-04-16 | 江苏爱康能源研究院有限公司 | The emitter structure and preparation method thereof of the double-deck amorphous silicon doped layer solar cell |
| CN109950132A (en) * | 2019-03-01 | 2019-06-28 | 晋能光伏技术有限责任公司 | A kind of method of Tubular PECVD device double-sided deposition solar battery amorphous silicon layer |
| CN110416345A (en) * | 2019-07-05 | 2019-11-05 | 江苏爱康能源研究院有限公司 | Heterojunction solar battery structure of the double-deck amorphous silicon intrinsic layer and preparation method thereof |
| CN114678434A (en) * | 2021-12-28 | 2022-06-28 | 浙江爱旭太阳能科技有限公司 | Heterojunction battery for improving photoelectric conversion efficiency |
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