CN207637825U - A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure - Google Patents
A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure Download PDFInfo
- Publication number
- CN207637825U CN207637825U CN201721705708.2U CN201721705708U CN207637825U CN 207637825 U CN207637825 U CN 207637825U CN 201721705708 U CN201721705708 U CN 201721705708U CN 207637825 U CN207637825 U CN 207637825U
- Authority
- CN
- China
- Prior art keywords
- amorphous silicon
- layer
- silicon layer
- light
- receiving surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
Abstract
The utility model discloses a kind of crystal silicon/non crystal heterogeneous agglomeration battery structures and preparation method thereof.It includes the upper intrinsic amorphous silicon layer of silicon substrate layer and silicon substrate layer upper layer and the lower intrinsic amorphous silicon layer of silicon substrate layer lower layer, the upper layer of upper intrinsic amorphous silicon layer is disposed with the first doped amorphous silicon layer of light-receiving surface, the second doped amorphous silicon layer of light-receiving surface and TOC layers upper from lower to upper, and the lower layer of lower intrinsic amorphous silicon layer is disposed with third doped amorphous silicon layer and TOC layers lower from top to bottom.After above-mentioned structures and methods, due to setting two layers of light-receiving surface doped amorphous silicon layer and by preparation process by adjusting technological parameter realize light-receiving surface codope amorphous silicon layer, make its film layer while there is excellent optical property and electric property, thus in the case where not influencing HJT battery light-receiving surface doped amorphous silicon electric conductivity, improve the band gap of the doped amorphous silicon layer, the utilization rate of light is improved, to improve the photoelectric conversion efficiency of HJT batteries.
Description
Technical field
The present invention relates to a kind of crystal silicon/non crystal heterogeneous agglomeration battery structures and preparation method thereof, belong to solar cell system
Make technical field.
Background technology
With the development of solar battery technology, the exploitation of high-efficiency battery is increasingly paid attention to, wherein using amorphous silicon intrinsic
Layer（a-Si:H(i)）The silicon substrate heterojunction solar cell of passivation（HJT batteries）It is one of the research direction of emphasis；It is well known that
Silicon substrate heterojunction solar cell not only has high transformation efficiency, high open-circuit voltage, but also has low temperature coefficient, without photic
Decaying（LID）, without electroluminescent decaying（PID）, the advantages such as low preparation process temperature, in addition silicon based hetero-junction battery ensureing high turn
While changing efficiency, silicon wafer thickness can be thinned to 100 μm, effectively reduce silicon material consumption, and can be used to prepare flexible battery
Component.
However, for HJT batteries, the key effect that non-crystalline silicon plays passivation, forms p-n junction, for HJT batteries
Transfer efficiency plays decisive role, and therefore, the excellent amorphous silicon membrane of processability is the key that obtain efficient HJT batteries skill
Art, in the prior art, since non-crystalline silicon mainly has intrinsic amorphous silicon and doped amorphous silicon, light-receiving surface to adulterate amorphous in HJT batteries
Silicon layer is due to that will ensure good electric conductivity, and usual hydrogen content is less, and band gap is smaller, thus the transmitance of light is relatively low, influences light
Utilization rate.
Invention content
The technical problem to be solved in the present invention is to provide one kind in the case where not influencing electric conductivity, improves the utilization of light
Rate, crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof to improve photoelectric conversion efficiency.
In order to solve the above-mentioned technical problem, the crystal silicon of the utility model/non crystal heterogeneous agglomeration battery structure, including silicon substrate
Layer and the upper intrinsic amorphous silicon layer on silicon substrate layer upper layer and the lower intrinsic amorphous silicon layer of silicon substrate layer lower layer, upper intrinsic amorphous silicon
Layer upper layer be disposed with from lower to upper the first doped amorphous silicon layer of light-receiving surface, the second doped amorphous silicon layer of light-receiving surface and on
TOC layers, the lower layer of lower intrinsic amorphous silicon layer is disposed with third doped amorphous silicon layer and TOC layers lower from top to bottom.
The thickness of the second doped amorphous silicon layer of the first doped amorphous silicon layer of the light-receiving surface and light-receiving surface is 2-10 nm.
The energy gap of the first doped amorphous silicon layer of the light-receiving surface is 1.7-1.9 eV, and the light-receiving surface second adulterates non-
The energy gap of crystal silicon layer is 1.5-1.7 eV.
The thickness of the upper intrinsic amorphous silicon layer and lower intrinsic amorphous silicon layer is 5-15 nm, and the third adulterates amorphous
The thickness of silicon layer is 5-20 nm, and described upper TOC layers and lower TOC layers of thickness are 70-120 nm.
A kind of such as above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery preparation method, includes the following steps：
A, making herbs into wool processing is carried out to n type single crystal silicon piece, forms pyramid matte, removed foreign ion and progress surface is clear
It is clean；
B, the upper intrinsic amorphous silicon layer at the positive back side and lower intrinsic amorphous silicon layer, upper intrinsic amorphous silicon are prepared by vapor deposition
Layer and the thickness of lower intrinsic amorphous silicon layer are 5-15nm；
C, N-shaped amorphous silicon layer, i.e. third doped amorphous silicon layer are prepared using vapor deposition in lower intrinsic amorphous silicon layer surface,
Its thickness is 5-20nm；
D, two layers of p-type doped amorphous silicon layer is prepared using vapor deposition in upper intrinsic amorphous silicon layer surface, as light-receiving surface,
That is the first p-type of light-receiving surface doped amorphous silicon layer, light-receiving surface the second p-type doped amorphous silicon layer, thickness is 2-10 nm, thickness
Preferably 5 nm, in addition, the energy gap of the first doped amorphous silicon layer of light-receiving surface is 1.7-1.9 eV, preferably 1.8 eV, by
The energy gap of the second doped amorphous silicon layer of smooth surface is 1.5-1.7 eV, preferably 1.6 eV；
E, upper TCO conductive films are deposited using magnetically controlled sputter method（TOC layers）With lower TCO conductive films, thickness 70-120nm；
F, positive back side silver metal electrodes being formed by silk-screen printing, main grid width is 0.1-2mm, and main grid number is 2-20,
Positive back silver pair grid line width is 20-70 μm, line number 80-250；
G, sintering makes to form good Ohmic contact between metal and silicon；
H, the electrical property of test battery is carried out.
Above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof, uses plasma enhanced chemical vapor
Deposition（PECVD）Or hot-wire chemical gas-phase deposition（HWCVD）Prepare two layers of light-receiving surface doped amorphous silicon film.
Above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery structure and preparation method thereof, the double-deck light-receiving surface amorphous silicon film is primary
It is completed in technical process, uses silane, hydrogen, impurity gas（Gas containing boron or P elements）Reaction generates.
After above-mentioned structures and methods, due to setting two layers of light-receiving surface doped amorphous silicon layer and by preparing
Light-receiving surface codope amorphous silicon layer is realized by adjusting technological parameter, make its film layer while there is excellent optical property in the process
And electric property improves the doping amorphous thus in the case where not influencing HJT battery light-receiving surface doped amorphous silicon electric conductivity
The band gap of silicon layer improves the utilization rate of light, to improve the photoelectric conversion efficiency of HJT batteries.
Description of the drawings
Fig. 1 is the structural schematic diagram of crystal silicon of the present invention/non crystal heterogeneous agglomeration battery structure.
Specific implementation mode
With reference to the accompanying drawings and detailed description, to invention crystal silicon/non crystal heterogeneous agglomeration battery structure and its preparation side
Method is described in further detail.
As shown, the crystal silicon of the utility model/non crystal heterogeneous agglomeration battery structure, including silicon substrate layer 1 and silicon lining
The upper intrinsic amorphous silicon layer 2 on bottom upper layer and the lower intrinsic amorphous silicon layer 3 of silicon substrate layer lower layer, upper intrinsic amorphous silicon layer 2 it is upper
Layer is disposed with the first doped amorphous silicon layer of light-receiving surface 4, the second doped amorphous silicon layer of light-receiving surface 5 and TOC layers upper from lower to upper
6, the thickness of the first doped amorphous silicon layer of light-receiving surface 4 and the second doped amorphous silicon layer of light-receiving surface 5 is 2-10 nm, light-receiving surface
The energy gap of one doped amorphous silicon layer 4 is 1.7-1.9 eV, and the energy gap of the second doped amorphous silicon layer of light-receiving surface 5 is 1.5-
The lower layer of 1.7 eV, lower intrinsic amorphous silicon layer 3 are disposed with third doped amorphous silicon layer 7 and lower TOC layers 8 from top to bottom, on
The thickness of intrinsic amorphous silicon layer 2 and lower intrinsic amorphous silicon layer 3 is 5-15 nm, and the thickness of third doped amorphous silicon layer 7 is 5-20
The thickness of nm, upper TOC layers 6 and lower TOC layers 8 is 70-120 nm, in addition, upper TOC layers also has respectively with lower TOC layers of surface
Have and positive back side silver metal electrodes are formed by silk-screen printing.
A kind of above-mentioned crystal silicon/non crystal heterogeneous agglomeration battery preparation method, includes the following steps：
A, making herbs into wool processing is carried out to n type single crystal silicon piece, forms pyramid matte, removed foreign ion and progress surface is clear
It is clean；
B, the upper intrinsic amorphous silicon layer at the positive back side and lower intrinsic amorphous silicon layer, upper intrinsic amorphous silicon are prepared by vapor deposition
Layer and the thickness of lower intrinsic amorphous silicon layer are 5-15nm；
C, N-shaped amorphous silicon layer, i.e. third doped amorphous silicon layer are prepared using vapor deposition in lower intrinsic amorphous silicon layer surface,
Its thickness is 5-20nm；
D, two layers of p-type doped amorphous silicon layer is prepared using vapor deposition in upper intrinsic amorphous silicon layer surface, as light-receiving surface,
That is the first doped amorphous silicon layer 4, the second doped amorphous silicon layer 5, thickness are 2-10 nm；
E, TCO conductive films up and down, thickness 70-120nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes being formed by silk-screen printing, main grid width is 0.1-2mm, and main grid number is 2-20,
Positive back silver pair grid line width is 20-70 μm, line number 80-250；
G, sintering makes to form good Ohmic contact between metal and silicon；
H, the electrical property of test battery is carried out.
In addition, it is necessary to explanation be light-receiving surface doped amorphous silicon be in preparation process use plasma enhanced chemical gas
Mutually deposit（PECVD）Or hot-wire chemical gas-phase deposition（HWCVD）Prepare light-receiving surface doped amorphous silicon film, the double-deck light-receiving surface non-crystalline silicon
Film can be completed during one-time process, use silane, hydrogen, impurity gas（Gas containing boron or P elements）Reaction life
At.
Following comparative illustration is made to the actual effect of the present invention with reference to specific comparative example：
Comparative example：
A, the monocrystalline silicon piece for being 180 μm to N-type thickness carries out making herbs into wool processing, forms pyramid matte, removes foreign ion
And carry out surface cleaning；
B, double intrinsic amorphous silicon layers at the positive back side, positive back side intrinsic amorphous silicon are prepared by plasma activated chemical vapour deposition
Thickness is 10nm；
C, it is light-receiving surface doped layer to choose P-type non-crystalline silicon film, and it is non-to prepare N-shaped using plasma enhanced chemical vapor deposition
Crystal silicon layer, thickness are 10 nm；
D, p-type amorphous silicon layer is prepared using plasma activated chemical vapour deposition, energy gap is 1.7 eV, 10 nm of thickness；
E, TCO conductive films, thickness 80nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 1mm, and main grid number is 4, positive back silver
Secondary grid line width is 60 μm, line number 100；
G, sintering makes to form good Ohmic contact between metal and silicon.
H, the electrical property of test battery is carried out.
Embodiment：
A, the monocrystalline silicon piece for being 180 μm to N-type thickness carries out making herbs into wool processing, forms pyramid matte, removes foreign ion
And carry out surface cleaning；
B, double intrinsic amorphous silicon layers at the positive back side, positive back side intrinsic amorphous silicon are prepared by plasma activated chemical vapour deposition
Thickness is 10nm；
C, it is light-receiving surface doped layer to choose p-type amorphous silicon film.It is non-that N-shaped is prepared using plasma enhanced chemical vapor deposition
Crystal silicon layer, thickness 10nm；
D, p-type amorphous silicon layer is prepared using plasma activated chemical vapour deposition,
| Energy gap | Thickness | |
| First doped layer | 1.7 eV | 5 nm |
| Second doped layer | 1.6 eV | 5 nm |
E, TCO conductive films, thickness 80nm are deposited using magnetically controlled sputter method；
F, positive back side silver metal electrodes are formed by silk-screen printing, main grid width is 1mm, and main grid number is 4, positive back silver
Secondary grid line width is 60 μm, line number 100；
G, sintering makes to form good Ohmic contact between metal and silicon.
H, the electrical property of test battery is carried out.
The electrical property for preparing HJT batteries according to the method described above see the table below, it can be seen that efficiency is improved 0.15%（abs）,
The promotion of the promotion being mainly manifested on electric current and filling capacity, electric current mainly has benefited from the larger forbidden band of the first doped layer of light-receiving surface
The high transmittance that width is brought, and the band-gap with intrinsic amorphous silicon layer；The promotion of filling mainly has benefited from light-receiving surface
The high conductivity that the low energy gap of two doped layers is brought.Therefore realize that light-receiving surface codope is non-using by adjusting technological parameter
Crystal silicon layer makes its film layer while having excellent optical property and the scheme of electric property to be feasible, specific contrast test number
According to as follows：
Claims (4)
1. a kind of crystal silicon/non crystal heterogeneous agglomeration battery structure, including silicon substrate layer（1）And silicon substrate layer upper layer is upper intrinsic non-
Crystal silicon layer（2）With the lower intrinsic amorphous silicon layer of silicon substrate layer lower layer（3）, it is characterised in that：The upper intrinsic amorphous silicon layer（2）'s
Upper layer is disposed with the first doped amorphous silicon layer of light-receiving surface from lower to upper（4）, the second doped amorphous silicon layer of light-receiving surface（5）With it is upper
TOC layers（6）, the lower intrinsic amorphous silicon layer（3）Lower layer be disposed with third doped amorphous silicon layer from top to bottom（7）With under
TOC layers（8）.
2. crystal silicon described in accordance with the claim 1/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The light-receiving surface first
Doped amorphous silicon layer（4）With the second doped amorphous silicon layer of light-receiving surface（5）Thickness be 2-10 nm.
3. according to crystal silicon as claimed in claim 1 or 2/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The light-receiving surface
One doped amorphous silicon layer（4）Energy gap be 1.7-1.9 eV, the second doped amorphous silicon layer of the light-receiving surface（5）Forbidden band it is wide
Degree is 1.5-1.7 eV.
4. crystal silicon described in accordance with the claim 3/non crystal heterogeneous agglomeration battery structure, it is characterised in that：The upper intrinsic amorphous
Silicon layer（2）With lower intrinsic amorphous silicon layer（3）Thickness be 5-15 nm, the third doped amorphous silicon layer（7）Thickness be 5-
20 nm, it is described TOC layers upper（6）With lower TOC layers（8）Thickness be 70-120 nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721705708.2U CN207637825U (en) | 2017-12-11 | 2017-12-11 | A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721705708.2U CN207637825U (en) | 2017-12-11 | 2017-12-11 | A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207637825U true CN207637825U (en) | 2018-07-20 |
Family
ID=62862785
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721705708.2U Active CN207637825U (en) | 2017-12-11 | 2017-12-11 | A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207637825U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107819052A (en) * | 2017-12-11 | 2018-03-20 | 晋能光伏技术有限责任公司 | A kind of efficiently crystal silicon non crystal heterogeneous agglomeration battery structure and preparation method thereof |
| CN114678434A (en) * | 2021-12-28 | 2022-06-28 | 浙江爱旭太阳能科技有限公司 | Heterojunction battery for improving photoelectric conversion efficiency |
-
2017
- 2017-12-11 CN CN201721705708.2U patent/CN207637825U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107819052A (en) * | 2017-12-11 | 2018-03-20 | 晋能光伏技术有限责任公司 | A kind of efficiently crystal silicon non crystal heterogeneous agglomeration battery structure and preparation method thereof |
| CN114678434A (en) * | 2021-12-28 | 2022-06-28 | 浙江爱旭太阳能科技有限公司 | Heterojunction battery for improving photoelectric conversion efficiency |
| CN114678434B (en) * | 2021-12-28 | 2024-05-10 | 浙江爱旭太阳能科技有限公司 | Heterojunction battery capable of improving photoelectric conversion efficiency |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107819052A (en) | A kind of efficiently crystal silicon non crystal heterogeneous agglomeration battery structure and preparation method thereof | |
| JP4560245B2 (en) | Photovoltaic element | |
| TWI463682B (en) | Heterojunction solar cell having intrinsic amorphous silicon film | |
| CN102446991B (en) | Film solar battery based on crystalline silicon and manufacturing method thereof | |
| CN211376648U (en) | Heterojunction solar cell structure with double-layer TCO conductive film | |
| CN103107228B (en) | Photoelectric conversion device | |
| CN109411551A (en) | Efficient silicon/crystalline silicon heterojunction solar battery electrode structure of multiple deposition and preparation method thereof | |
| CN109638094A (en) | Efficient heterojunction battery intrinsic amorphous silicon passivation layer structure and preparation method thereof | |
| CN103346214B (en) | A kind of silica-based radial homogeneity heterojunction solar cell and preparation method thereof | |
| CN111063757A (en) | Efficient crystalline silicon/amorphous silicon heterojunction solar cell and preparation method thereof | |
| CN104733557B (en) | HIT solar energy battery and method for improving short-circuit current density of HIT battery | |
| CN101976710A (en) | Method for preparing crystalline silicon hetero-junction solar cell based on hydrogenated microcrystalline silicon film | |
| CN109509807A (en) | Emitter structure of silicon/crystalline silicon heterojunction solar battery and preparation method thereof | |
| CN109638101A (en) | The emitter structure and preparation method thereof of the double-deck amorphous silicon doped layer solar cell | |
| JP2004014812A (en) | Photovoltaic device | |
| CN109950132A (en) | A kind of method of Tubular PECVD device double-sided deposition solar battery amorphous silicon layer | |
| JP2918345B2 (en) | Photovoltaic element | |
| CN218788382U (en) | High-efficiency heterojunction solar cell | |
| CN107170840A (en) | Back contacts heterojunction solar battery and its emitter stage, solar cell preparation method | |
| CN207637825U (en) | A kind of efficient crystal silicon non crystal heterogeneous agglomeration battery structure | |
| CN208655672U (en) | Heterojunction solar battery | |
| JP2001267598A (en) | Laminated solar cell | |
| CN106449850B (en) | A kind of efficient silicon based hetero-junction double-side cell and preparation method thereof | |
| CN114765235A (en) | Heterojunction solar cell and manufacturing method thereof | |
| CN101393942B (en) | Polycrystalline-silicon carbide lamination thin-film solar cell |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |