CN107818954B - 半导体封装件、制造其的方法以及电子装置模块 - Google Patents
半导体封装件、制造其的方法以及电子装置模块 Download PDFInfo
- Publication number
- CN107818954B CN107818954B CN201710599427.1A CN201710599427A CN107818954B CN 107818954 B CN107818954 B CN 107818954B CN 201710599427 A CN201710599427 A CN 201710599427A CN 107818954 B CN107818954 B CN 107818954B
- Authority
- CN
- China
- Prior art keywords
- semiconductor package
- frame
- electronic component
- conductive layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 54
- 239000002184 metal Substances 0.000 claims abstract description 54
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 31
- 239000010949 copper Substances 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 23
- 229910000679 solder Inorganic materials 0.000 claims description 20
- 229910052709 silver Inorganic materials 0.000 claims description 19
- 239000004020 conductor Substances 0.000 claims description 18
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 17
- 239000004332 silver Substances 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 16
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 239000004593 Epoxy Substances 0.000 claims description 14
- 229910045601 alloy Inorganic materials 0.000 claims description 14
- 239000000956 alloy Substances 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052759 nickel Inorganic materials 0.000 claims description 13
- 229910052718 tin Inorganic materials 0.000 claims description 12
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 10
- 239000011810 insulating material Substances 0.000 claims description 5
- 230000017525 heat dissipation Effects 0.000 description 16
- 230000015572 biosynthetic process Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229920006336 epoxy molding compound Polymers 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 239000000654 additive Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052745 lead Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
- H01L2225/06586—Housing with external bump or bump-like connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1035—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
本发明提供一种半导体封装件、制造其的方法以及电子装置模块。所述半导体封装件包括:框架,包括通孔;电子组件,设置在所述通孔中;重新分配部,设置在所述框架和所述电子组件的下面;金属层,设置在所述框架的内表面上;以及导电层,设置在所述金属层和所述电子组件之间,并覆盖所述框架和所述电子组件。
Description
本申请要求于2016年9月12日在韩国知识产权局提交的第10-2016-0117253号以及于2017年2月27日在韩国知识产权局提交的第10-2017-0025308号韩国专利申请的优先权和权益,所述韩国专利申请的全部公开内容出于所有目的通过引用被包含于此。
技术领域
以下描述涉及一种半导体封装件、制造半导体封装件的方法以及包括半导体封装件的电子装置模块。
背景技术
近来,由于半导体封装件被设计为轻量且紧凑,在电子组件运行时会导致电力损耗的散热已成为一个重大问题。此外,由电子组件产生的热会导致电子组件和半导体封装件劣化,从而导致装置可靠性降低以及装置性能特性劣化的问题。
此外,由于小型化的趋势,电子产品的尺寸已减小并且各种装置之间的距离已因此而减小。因此,将现有技术的EMI屏蔽方法应用到尺寸减小的电子产品是有问题的。
因此,期望开发用于提高散热和EMI屏蔽性能的结构以解决上述问题。
发明内容
提供本发明内容以按照简化形式介绍发明构思的选择,以下在具体实施方式中进一步描述发明构思。本发明内容并不意在确定所要求保护的主题的关键特征或必要特征,也不意在用于帮助确定所要求保护的主题的范围。
在一个总的方面,一种半导体封装件包括:框架,所述框架包括通孔;电子组件,设置在所述通孔中;重新分配部,设置在所述框架和所述电子组件的下面;金属层,设置在所述框架的内表面上;以及导电层,设置在所述金属层和所述电子组件之间,并覆盖所述框架和所述电子组件。
所述框架可包括由绝缘材料形成的芯以及设置在所述芯的上表面和下表面中的任一个或两者上的导体层。
所述框架还可包括过孔,所述过孔被构造为将所述导体层电连接到所述重新分配部,并且所述金属层和所述导电层可通过所述过孔连接到接地电极。
所述金属层可包括铜(Cu)、镍(Ni)以及包含Cu和Ni中的任意一种的合金中的任意一种。
所述导电层可包括导电环氧树脂(例如,银(Ag)环氧树脂)和焊料材料中的任意一种。
所述半导体封装件还可包括:结合辅助层,设置在所述导电层的下面,并被构造为帮助所述导电层结合。
所述导电层可包括焊料材料,并且所述结合辅助层可包括锡(Sn)、铅(Pb)、银(Ag)以及包含Sn、Pb和Ag中的任意一种的合金中的任意一种。
所述重新分配部的下表面可具有设置在所述重新分配部中的焊球。
一种电子装置模块可包括:如上所述的半导体封装件;以及电子装置,安装在所述半导体封装件的侧部上。
一种电子装置模块可包括:如上所述的半导体封装件;以及叠层封装件,安装在所述半导体封装件的侧部上。
在另一总的方面,一种制造半导体封装件的方法包括:在框架的内表面上形成金属层;在设置于所述框架中的导通孔中形成过孔;在设置于所述框架中的通孔中设置电子组件;在所述电子组件和所述金属层之间形成导电层,并且所述导电层覆盖所述电子组件和所述框架;在所述框架和所述电子组件的下表面上形成重新分配部;以及在所述重新分配部的下表面上形成焊球。
所述方法还可包括:在所述框架的所述内表面上形成所述金属层以及在所述导通孔中形成所述过孔之后,将载体构件结合到所述框架的下表面。
所述金属层可包括铜(Cu)、镍(Ni)以及包含Cu和Ni中的任意一种的合金中的任意一种。
所述金属层和所述导电层可通过所述过孔连接到接地电极。
所述导电层可包括导电环氧树脂(例如,银(Ag)环氧树脂)中的任意一种。
所述方法还可包括:在形成所述导电层之前,在所述框架和所述电子组件的上表面、所述金属层的内表面以及所述电子组件的侧表面上形成结合辅助层。
所述导电层可包括焊料材料。
所述结合辅助层可包括锡(Sn)、铅(Pb)、银(Ag)以及包含Sn、Pb和Ag中的任意一种的合金中的任意一种。
通过以下具体实施方式、附图以及权利要求,其它特征和方面将显而易见。
附图说明
图1是示出根据示例的半导体封装件的示意性截面图。
图2至图9是示出制造图1的半导体封装件的方法的示例的示图。
图10是示出根据另一示例的半导体封装件的示意性截面图。
图11至图15是示出制造图10的半导体封装件的方法的示例的示图。
图16是示出根据示例的电子装置模块的示意性截面图。
图17是示出根据另一示例的电子装置模块的示意性截面图。
图18是示出根据另一示例的电子装置模块的示意性截面图。
在整个附图和具体实施方式中,相同的标号指示相同的元件。附图可不按照比例绘制,为了清楚、说明以及方便起见,可夸大附图中元件的相对尺寸、比例和描绘。
具体实施方式
提供以下具体实施方式,以帮助读者获得对在此描述的方法、设备和/或系统的全面理解。然而,在理解了本申请的公开内容后,在此所描述的方法、设备和/或系统的各种改变、变型及等同物将是显而易见的。例如,在此描述的操作顺序仅仅是示例,且不限于在此所阐述的示例,而是除了必须按照特定顺序发生的操作外,可在理解了本申请的公开内容后做出显而易见的改变。此外,为了增加清楚性和简洁性,可省略本领域中公知的特征的描述。
在此描述的特征可按照不同的形式实施,并且将不被解释为局限于在此描述的示例。更确切地说,已经提供在此描述的示例,仅仅为了示出在理解了本申请的公开内容后将是显而易见的实现在此描述的方法、设备和/或系统的多种可行方式中的一些可行方式。
在整个说明书中,当元件(诸如层、区域或基板)被描述为“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件时,其可直接“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件,或者可存在介于它们之间的一个或更多个其它元件。相比之下,当元件被描述为“直接在”另一元件“上”、“直接连接到”另一元件或“直接结合到”另一元件时,可不存在介于它们之间的其它元件。
如在此使用的术语“和/或”包括相关所列项中的任何一个和任何两个或更多个的任何组合。
虽然诸如“第一”、“第二”和“第三”的术语可在此用于描述各种构件、组件、区域、层或部分,但是这些构件、组件、区域、层或部分不受这些术语限制。更确切地说,这些术语仅用于将一个构件、组件、区域、层或部分与另一构件、组件、区域、层或部分区分开。因此,在不脱离示例的教导的情况下,在此描述的示例中涉及到的第一构件、组件、区域、层或部分还可被称为第二构件、组件、区域、层或部分。
为了方便描述,在此可使用诸如“在……之上”、“上方”、“在……之下”以及“下方”的空间相关术语来描述如附图中所示的一个元件与另一元件之间的关系。这样的空间相对术语意于包含除了附图中描绘的方位之外的装置在使用或操作中的不同方位。例如,如果附图中的装置被翻转,则被描述为“在”另一元件“之上”或“上方”的元件将随后被描述为“在”另一元件“之下”或“下方”。因此,术语“在……之上”根据装置的空间方向包括“在……之上”和“在……之下”两种方位。装置还可以以另外的方式被定位(例如,旋转90度或处于其它方位),并将对在此使用的空间相关术语做出相应的解释。
在此使用的术语仅是为了描述各种示例,而不被用来限制本公开。除非上下文另外清楚地指明,否则单数形式也意于包含复数形式。术语“包含”、“包括”以及“具有”列举存在所陈述的特征、数量、操作、构件、元件和/或它们的组合,但不排除存在或添加一个或更多个其它特征、数量、操作、构件、元件和/或它们的组合。
下面参照附图更详细地描述示例。
参照图1,根据示例的半导体封装件100包括框架110、重新分配部120、电子组件130、金属层140和导电层150。
通孔112设置在框架110中。电子组件130插入并设置在通孔112中。换句话说,例如,框架110设置为围绕电子组件130,并且框架110呈使电子组件130设置在通孔112中的板状。
过孔114形成在框架110中,并被构造为将导电层150连接到接地电极,这将稍后通过示例的方式进行描述。
此外,框架110包括芯116和形成在芯116的上表面和/或下表面上的导体层118。
芯116由例如诸如环氧树脂的热固性树脂、诸如聚酰亚胺的热塑性树脂,或者含有诸如玻璃纤维或无机填料的增强材料的树脂(例如半固化片、ABF(Ajinomoto build-upfilm)、FR-4树脂或双马来酰亚胺三嗪(BT)树脂)的绝缘材料形成。然而,芯116的材料不限于前述示例。
具有优异的刚性和导热性的金属设置在芯116内。所述金属可以为Fe-Ni基合金,并可在Fe-Ni基合金的表面上形成Cu镀层。此外,芯116内还可设置诸如玻璃、陶瓷或塑料的材料。
导体层118包括具有优异的导电性的材料。例如,导体层118包括银(Ag)、钯(Pd)、铝(Al)、镍(Ni)、钛(Ti)、金(Au)、铜(Cu)和铂(Pt)中的任意一种或者任意两种或更多种的任意混合物。然而,可使用具有优异的导电性的其它材料。
导体层118通过已知的例如电解镀铜或非电镀铜的方法形成。更详细地,导体层118可以以诸如化学气相沉积(CVD)、物理气相沉积(PVD)、溅射、减成工艺、加成工艺、半加成工艺(SAP)或改良型半加成工艺(MSAP)的方法形成,但不限于通过前述方法形成。
重新分配部120形成在框架110的下面,并且电子组件130安装在重新分配部120上。通过示例的方式,重新分配部120包括绝缘层122和布线层124。此外,焊球102形成在布线层124中并暴露到重新分配部120的下部。
布线层124电连接到过孔114。布线层124还电连接到导体层118和电子组件130,这将稍后进行描述。
电子组件130安装在重新分配部120上,使得电子组件130插入并设置在通孔112中。连接到布线层124的连接电极(未示出)可暴露到电子组件130的下表面。
通过示例的方式,电子组件130是集成电路(IC)芯片,但不限于此。电子组件130可以是诸如图像传感器和存储器芯片的各种芯片中的任意一种。
金属层140形成在框架110的内表面上。换句话说,金属层140形成在框架110的形成通孔112的内表面上。金属层140由铜(Cu)或镍(Ni)或者包含铜(Cu)或镍(Ni)的合金形成。
金属层140可电连接到接地电极(未示出)。
如上所述,由于金属层140形成在框架110的内表面上,因此由电子组件130产生的热通过金属层140被传递到重新分配部120和导体层118,从而提高了散热效率。
此外,金属层140被构造为电连接到接地电极,从而提高了电磁干扰(EMI)屏蔽性能。
导电层150覆盖框架110的上表面和电子组件130的上表面。
如上所述,导电层150执行EMI屏蔽和散热功能。换句话说,导电层150覆盖电子组件130的上表面,从而执行EMI屏蔽和散热功能。
导电层150可由导电环氧树脂(例如,银(Ag)环氧树脂)形成。然而,其它材料可用于导电层150。
如上所述,由于导电层150覆盖框架110的上表面和电子组件130的上表面,因此与未设置导电层150的构造相比,EMI屏蔽性能提高。例如,与设置环氧模塑料(EMC)成型层的示例相比,在设置导电层150时,EMI性能得到提高。
此外,在图1所示的示例中,导电层150形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中。如上所述,导电层150将电子组件130固定在通孔112中。
此外,由于导电层150形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中,因此EMI屏蔽性能提高。此外,由于导电层150形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中,因此可更快速地执行从导电层150到金属层140的热传递,从而提高了散热性能。
如上所述,EMI屏蔽性能和散热性能可因导电层150而提高。
图2至图9是示出制造根据示例的半导体封装件100的方法的示图。
首先,如图2中所示,在框架110中形成通孔112和导通孔(via hole)114a。导通孔114a可形成为围绕通孔112形成的多个导通孔114a。
框架110包括由绝缘材料形成的芯116以及形成在芯116的上表面和/或下表面上的导体层118。
在下文中,如图3中所示,在框架110的内表面上形成金属层140。金属层140可由铜(Cu)或镍(Ni)或者包含铜(Cu)或镍(Ni)的合金形成。
使用导电材料填充导通孔114a以形成过孔114。
然后,如图4中所示,将第一载体10附着到框架110的下表面。稍后将去除被构造为临时附着以附着电子组件130并形成导电层150的第一载体10。
当完成第一载体10的附着时,如图5中所示,将电子组件130附着到第一载体10。电子组件130插入并设置在通孔112中。此外,将电子组件130安装在第一载体10上使得电子组件130与形成在框架110的内表面上的金属层140分开预定距离。
在以上的描述中,通过示例的方式示出了在安装电子组件130之前形成金属层140的示例,但是该方法不限于这样的示例。可选地,可在第一载体10上形成电子组件130的同时形成金属层140。
然后,如图6中所示,在电子组件130的侧表面和金属层140的内表面之间形成的空间中形成导电层150。此外,导电层150形成为覆盖电子组件130的上表面和框架110的上表面。
如上所述,导电层150形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中,从而将电子组件130固定在通孔112中。
导电层150可由导电环氧树脂(例如,银(Ag)环氧树脂)形成。
然后,如图7中所示,去除第一载体10。
接着,如图8中所示,在框架110的下面形成重新分配部120。重新分配部120包括绝缘层122和布线层124,并且布线层124可电连接到接地电极。
电子组件130也电连接到布线层124。
当完成重新分配部120的形成时,如图9中所示,在重新分配部120的下表面中形成焊球102。
如上所述,导电层150的形成使EMI屏蔽性能和散热性能提高。
此外,重新分配部120的形成进一步固定了电子组件130。
在下文中,将参照附图描述根据另一示例的半导体封装件200。然而,为了简洁起见,在理解了上述相应的描述适用的情况下,将省略与如上所述的组件相同的组件的描述。
图10是示出根据示例的半导体封装件200的示意性截面图。参照图10,例如,半导体封装件200包括框架110、重新分配部120、电子组件130、金属层140、导电层250和结合辅助层260。
在理解了上面提供的描述适用的情况下,将省略框架110、重新分配部120、电子组件130、金属层140(与根据图1的示例的半导体封装件100中包括的那些组件相同的组件)的描述。
导电层250覆盖框架110的上表面和电子组件130的上表面。
参照如上所述的导电层150,导电层250执行EMI屏蔽和散热功能。换句话说,导电层250覆盖电子组件130的上表面,从而执行EMI屏蔽和散热功能。
导电层250可由焊料材料形成。然而,可使用其它导电材料。
由于导电层250覆盖框架110的上表面和电子组件130的上表面,因此与未设置导电层250的示例相比,EMI屏蔽性能提高。换句话说,与设置EMC成型层的示例相比,当设置导电层250时,EMI屏蔽性能提高。此外,散热性能提高。
此外,导电层250形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中。因此,如上所述,导电层250将电子组件130固定在通孔112中。
此外,由于导电层250形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中,提高了EMI屏蔽性能。
此外,由于导电层250形成在形成于电子组件130的侧表面和金属层140的内表面之间的空间中,因此可更快速地执行从导电层250到金属层140的热传递,从而提高了散热性能。
结合辅助层260设置在导电层250的下面,以更容易地将导电层250结合到导体层118、电子组件130和金属层140。换句话说,在形成导电层250之前,除了金属层140和电子组件130的侧表面之外,结合辅助层260还形成在的框架110和电子组件130的上表面上。
通过示例的方式,结合辅助层260由容易地结合到导电层250(由焊料材料形成)的金属材料形成。例如,结合辅助层260由锡(Sn)、铅(Pb)或银(Ag)或者包含锡(Sn)、铅(Pb)或银(Ag)的合金形成。
如上所述,通过结合辅助层260,可容易地执行导电层250的形成。
此外,以与根据图1的示例的半导体封装件100相同的方式,通过导电层250,EMI屏蔽性能和散热性能提高。
图11至图15是示出根据示例的制造半导体封装件200的方法的示图。在下面对制造半导体封装件200的方法的描述中,在理解了图2至图9也适用于这样的操作的情况下,将省略与上述参照图2至图9的操作相同的操作。
首先,在制造半导体封装件200的方法中,执行与图2至图4中示出的工艺相同的工艺。
然后,如图11中所示,形成结合辅助层260,结合辅助层260形成为覆盖框架110的上表面和电子组件130的上表面。结合辅助层260还形成在金属层140和电子组件130的侧表面上。
结合辅助层260在随后形成导电层250时使得导电层250更容易地结合。
例如,结合辅助层260由锡(Sn)、铅(Pb)或银(Ag)或者包含锡(Sn)、铅(Pb)或银(Ag)的合金形成。
然后,如图12中所示,导电层250形成在结合辅助层260上。导电层250可由焊料材料形成。
如上所述,由于导电层250形成在结合辅助层260上,即使当导电层250由焊料材料形成时,也可容易地执行导电层250的堆叠。
然后,如图13中所示,在形成导电层250后去除载体10。
然后,如图14中所示,在框架110的下面形成重新分配部120。重新分配部120包括绝缘层122和布线层124,布线层124可电连接到接地电极。
电子组件130也电连接到布线层124。
当完成重新分配部120的形成时,如图15中所示,在重新分配部120的下表面中形成焊球102。
如上所述,由于形成了结合辅助层260,因此可容易地执行由焊料材料形成的导电层250的形成。
此外,导电层250的形成提高了EMI屏蔽性能和散热性能。
此外,电子组件130通过重新分配部120进一步固定。
图16是示出根据示例的电子装置模块300的示意性截面图。参照图16,在电子装置模块300中,至少一个电子装置310安装在图1中所示的半导体封装件100(如上所述)上。此外,电子装置310被密封部320密封。
如图16中所示,连接焊盘302设置在半导体封装件100的两侧(例如,顶侧和底侧)上。因此,主基板(未示出)可安装在两侧中的第一侧上,并且已分开制造的电子装置310安装在两侧中的第二侧上。
此外,电子装置310可以是有源装置或无源装置,密封部320可由EMC形成。
此外,如图16中所示,在半导体封装件100中,连接焊盘302基本上沿着整个第二侧形成。在该示例中,多个电子装置310安装在半导体封装件100上,使得集成度增大。
虽然图16的示例中描述了半导体封装件100,但其它构造是可行的。例如,可在电子装置模块300中使用图10的半导体封装件200。
图17是示出根据另一示例的电子装置模块400的示意性截面图。参照图17,在电子装置模块400中,叠层封装件(PoP)410安装在上述图1中所示的半导体封装件100上。
此外,在半导体封装件100中,连接焊盘402设置在半导体封装件100的两侧(例如,顶侧和底侧)中的每侧上。因此,主基板(未示出)可安装在两侧中的第一侧上,已分开制造的PoP 410安装在两侧中的第二侧上。
通过示例的方式,在PoP 410中,电子装置414安装在用于封装件的基板412上,并且电子装置414被密封部416密封。然而,PoP 410不限于该示例,并且将要安装的诸如散热构件(未示出)的所有组件可安装在半导体封装件100的第二侧上。
此外,在半导体封装件100中,连接焊盘402基本上沿着整个第二侧形成。因此,具有大量的I/O端子的封装件可安装在第二侧上。因此,与将要安装在第二侧上的PoP 410的结合可靠性提高。
虽然图17的示例中描述了半导体封装件100,但是其它构造是可行的。例如,可使用图10的半导体封装件200。
图18是示出根据另一示例的电子装置模块500的示意性截面图。参照图18,在电子装置模块500中,叠层封装件(PoP)510安装在半导体封装件600上。
半导体封装件600内部包括电子组件630。电子组件630可包括功率放大器或滤波器或IC,并可以以裸片的形式嵌入。除了电子组件630安装在半导体封装件600中之外,半导体封装件600可具有与根据图1的示例的半导体封装件100相同的构造。
由于图18中所示的包括芯616和导体层618的框架610、包括绝缘层622和布线层624的重新分配部620、金属层640、导电层650、通孔612、过孔614、焊球602与图1中所示的包括芯116和导体层118的框架110、包括绝缘层122和布线层124的重新分配部120、金属层140、导电层150、通孔112、过孔114、焊球102具有相同的构造,因此将省略其描述。
在PoP 510中,电子装置514安装在用于封装件的基板512上,并且每个电子装置514被密封部516密封。然而,PoP 510不限于该示例。
此外,盖构件520设置在电子装置模块500的表面上。
盖构件520被构造为屏蔽电磁波。因此,盖构件520沿着半导体封装件600和PoP510的表面形成。
半导体封装件600和叠层封装件510之间的间隙被绝缘材料530所填充。
盖构件520不限于上述构造,并可根据需要仅形成在半导体封装件600和PoP 510中的一个的表面上。此外,盖构件520插设在设置于PoP 510中的电子装置514之间,以阻断电子装置514之间的相互干扰。
如上所述,裸片形式的电子组件630嵌在半导体封装件600的内部,连接端子502设置在半导体封装件600的两侧(例如,顶侧和底侧)上。因此,在电子装置模块500的尺寸显著地减小的同时,电子装置模块500用于PoP的结构。
此外,因为由电子组件630产生的热通过块导体被有效地释放,所以可防止在操作电子装置514期间电子装置模块500的温度升高。
根据如上所述的示例,半导体封装件和电子装置模块中的散热性能和EMI屏蔽性能提高。
虽然本公开包括特定的实施例,但是在理解了本申请的公开内容后将显而易见的是,在不脱离权利要求及它们的等同物的精神和范围的情况下,可在这些示例中做出形式上和细节上的各种变化。在此所描述的示例将仅被理解为描述性含义,而非出于限制的目的。在每个示例中的特征或方面的描述将被认为是可适用于其它示例中的类似特征或方面。如果以不同的顺序执行描述的技术,和/或如果以不同的方式组合描述的系统、架构、装置或者电路中的组件和/或用其它组件或者它们的等同物进行替换或者补充描述的系统、架构、装置或者电路中的组件,则可获得适当的结果。因此,本公开的范围不由具体实施方式限定,而是由权利要求及它们的等同物限定,并且在权利要求及它们的等同物的范围内的所有变化将被解释为包含于本公开中。
Claims (20)
1.一种半导体封装件,包括:
框架,包括通孔;
电子组件,设置在所述通孔中;
重新分配部,设置在所述框架和所述电子组件的下面;
金属层,设置在所述框架的内表面上;以及
导电层,设置在所述金属层和所述电子组件之间,并覆盖所述框架的上表面和所述电子组件的上表面。
2.根据权利要求1所述的半导体封装件,其中,所述框架包括由绝缘材料形成的芯以及设置在所述芯的上表面和下表面中的任意一个或两者上的导体层。
3.根据权利要求2所述的半导体封装件,其中,
所述框架还包括过孔,所述过孔被构造为将所述导体层电连接到所述重新分配部,并且
所述金属层和所述导电层通过所述过孔连接到接地电极。
4.根据权利要求1所述的半导体封装件,其中,所述金属层包括铜、镍以及包含铜和镍中的任意一种的合金中的任意一种。
5.根据权利要求1所述的半导体封装件,其中,所述导电层包括导电环氧树脂和焊料材料中的一种。
6.根据权利要求5所述的半导体封装件,其中,所述导电环氧树脂为银环氧树脂。
7.根据权利要求1所述的半导体封装件,所述半导体封装件还包括:
结合辅助层,设置在所述导电层的下面,并被构造为帮助所述导电层结合。
8.根据权利要求7所述的半导体封装件,其中,所述导电层包括焊料材料,并且
所述结合辅助层包括锡、铅、银以及包含锡、铅和银中的任意一种的合金中的任意一种。
9.根据权利要求1所述的半导体封装件,其中,所述重新分配部的下表面具有设置在所述重新分配部中的焊球。
10.一种电子装置模块,包括:
如权利要求1-9中任一项所述的半导体封装件;以及
电子装置,安装在所述半导体封装件的侧部上。
11.一种电子装置模块,包括:
如权利要求1-9中任一项所述的半导体封装件;以及
叠层封装件,安装在所述半导体封装件的一侧上。
12.一种制造半导体封装件的方法,包括:
在框架的内表面上形成金属层;
在设置于所述框架中的导通孔中形成过孔;
在设置于所述框架中的通孔中设置电子组件;
在所述电子组件和所述金属层之间形成导电层,并且所述导电层覆盖所述电子组件的上表面和所述框架的上表面;
在所述框架和所述电子组件的下表面上形成重新分配部;以及
在所述重新分配部的下表面上形成焊球。
13.根据权利要求12所述的方法,所述方法还包括:在所述框架的所述内表面上形成所述金属层以及在所述导通孔中形成所述过孔之后,将载体构件结合到所述框架的下表面。
14.根据权利要求12所述的方法,其中,所述金属层包括铜、镍以及包含铜和镍中的任意一种的合金中的任意一种。
15.根据权利要求12所述的方法,其中,所述金属层和所述导电层通过所述过孔连接到接地电极。
16.根据权利要求12所述的方法,其中,所述导电层包括导电环氧树脂。
17.根据权利要求16所述的方法,其中,所述导电环氧树脂为银环氧树脂。
18.根据权利要求12所述的方法,所述方法还包括:在形成所述导电层之前,在所述框架和所述电子组件的上表面、所述金属层的内表面以及所述电子组件的侧表面上形成结合辅助层。
19.根据权利要求18所述的方法,其中,所述导电层包括焊料材料。
20.根据权利要求19所述的方法,其中,所述结合辅助层包括锡、铅、银以及包含锡、铅和银中的任意一种的合金中的任意一种。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010865083.6A CN111900139A (zh) | 2016-09-12 | 2017-07-21 | 半导体封装件、制造其的方法以及电子装置模块 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20160117253 | 2016-09-12 | ||
KR10-2016-0117253 | 2016-09-12 | ||
KR1020170025308A KR102041666B1 (ko) | 2016-09-12 | 2017-02-27 | 반도체 패키지 및 이의 제조방법, 전자소자 모듈 |
KR10-2017-0025308 | 2017-02-27 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010865083.6A Division CN111900139A (zh) | 2016-09-12 | 2017-07-21 | 半导体封装件、制造其的方法以及电子装置模块 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107818954A CN107818954A (zh) | 2018-03-20 |
CN107818954B true CN107818954B (zh) | 2020-09-18 |
Family
ID=61560949
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010865083.6A Pending CN111900139A (zh) | 2016-09-12 | 2017-07-21 | 半导体封装件、制造其的方法以及电子装置模块 |
CN201710599427.1A Active CN107818954B (zh) | 2016-09-12 | 2017-07-21 | 半导体封装件、制造其的方法以及电子装置模块 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010865083.6A Pending CN111900139A (zh) | 2016-09-12 | 2017-07-21 | 半导体封装件、制造其的方法以及电子装置模块 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10068855B2 (zh) |
CN (2) | CN111900139A (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20190075647A (ko) * | 2017-12-21 | 2019-07-01 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
KR102061564B1 (ko) | 2018-05-04 | 2020-01-02 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
KR102086361B1 (ko) | 2018-06-04 | 2020-03-09 | 삼성전자주식회사 | 반도체 패키지 |
US10790162B2 (en) | 2018-09-27 | 2020-09-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit package and method |
KR20200067462A (ko) * | 2018-12-04 | 2020-06-12 | 삼성전기주식회사 | 전자소자 내장 인쇄회로기판 |
CN114040571A (zh) * | 2021-10-13 | 2022-02-11 | 华为数字能源技术有限公司 | 基板及其制作方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1453858A (zh) * | 2002-04-22 | 2003-11-05 | Nec化合物半导体器件株式会社 | 半导体器件及其制造方法 |
US8432022B1 (en) * | 2009-09-29 | 2013-04-30 | Amkor Technology, Inc. | Shielded embedded electronic component substrate fabrication method and structure |
US20140062607A1 (en) * | 2012-08-31 | 2014-03-06 | Vijay K. Nair | Ultra slim rf package for ultrabooks and smart phones |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6221694B1 (en) * | 1999-06-29 | 2001-04-24 | International Business Machines Corporation | Method of making a circuitized substrate with an aperture |
JP3813402B2 (ja) * | 2000-01-31 | 2006-08-23 | 新光電気工業株式会社 | 半導体装置の製造方法 |
TWI225670B (en) * | 2003-12-09 | 2004-12-21 | Advanced Semiconductor Eng | Packaging method of multi-chip module |
TWI245388B (en) * | 2005-01-06 | 2005-12-11 | Phoenix Prec Technology Corp | Three dimensional package structure of semiconductor chip embedded in substrate and method for fabricating the same |
JP5188816B2 (ja) * | 2005-12-16 | 2013-04-24 | イビデン株式会社 | 多層プリント配線板およびその製造方法 |
US8178963B2 (en) * | 2007-01-03 | 2012-05-15 | Advanced Chip Engineering Technology Inc. | Wafer level package with die receiving through-hole and method of the same |
US8178964B2 (en) * | 2007-03-30 | 2012-05-15 | Advanced Chip Engineering Technology, Inc. | Semiconductor device package with die receiving through-hole and dual build-up layers over both side-surfaces for WLP and method of the same |
JP2008243966A (ja) | 2007-03-26 | 2008-10-09 | Toyota Industries Corp | 電子部品が実装されたプリント基板及びその製造方法 |
JP4752825B2 (ja) * | 2007-08-24 | 2011-08-17 | カシオ計算機株式会社 | 半導体装置の製造方法 |
US8237257B2 (en) * | 2008-09-25 | 2012-08-07 | King Dragon International Inc. | Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same |
US8350377B2 (en) * | 2008-09-25 | 2013-01-08 | Wen-Kun Yang | Semiconductor device package structure and method for the same |
KR101158213B1 (ko) | 2010-09-14 | 2012-06-19 | 삼성전기주식회사 | 전자부품 내장형 인쇄회로기판 및 이의 제조 방법 |
KR20120077872A (ko) | 2010-12-31 | 2012-07-10 | 하나 마이크론(주) | 반도체 칩 내장형 기판 및 이를 포함하는 반도체 패키지 |
CN103620776B (zh) * | 2012-01-30 | 2017-02-08 | 松下电器产业株式会社 | 半导体装置 |
JP6152254B2 (ja) * | 2012-09-12 | 2017-06-21 | 新光電気工業株式会社 | 半導体パッケージ、半導体装置及び半導体パッケージの製造方法 |
KR101391089B1 (ko) | 2012-09-24 | 2014-05-07 | 에스티에스반도체통신 주식회사 | 반도체 패키지 및 그 제조방법 |
US8736033B1 (en) * | 2013-03-13 | 2014-05-27 | Unimicron Technology Corp. | Embedded electronic device package structure |
US9396300B2 (en) * | 2014-01-16 | 2016-07-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging methods for semiconductor devices, packaged semiconductor devices, and design methods thereof |
US9601461B2 (en) * | 2015-08-12 | 2017-03-21 | Semtech Corporation | Semiconductor device and method of forming inverted pyramid cavity semiconductor package |
US9659878B2 (en) * | 2015-10-20 | 2017-05-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level shielding in multi-stacked fan out packages and methods of forming same |
US9607967B1 (en) * | 2015-11-04 | 2017-03-28 | Inotera Memories, Inc. | Multi-chip semiconductor package with via components and method for manufacturing the same |
US9666546B1 (en) * | 2016-04-28 | 2017-05-30 | Infineon Technologies Ag | Multi-layer metal pads |
-
2017
- 2017-05-18 US US15/598,497 patent/US10068855B2/en active Active
- 2017-07-21 CN CN202010865083.6A patent/CN111900139A/zh active Pending
- 2017-07-21 CN CN201710599427.1A patent/CN107818954B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1453858A (zh) * | 2002-04-22 | 2003-11-05 | Nec化合物半导体器件株式会社 | 半导体器件及其制造方法 |
US8432022B1 (en) * | 2009-09-29 | 2013-04-30 | Amkor Technology, Inc. | Shielded embedded electronic component substrate fabrication method and structure |
US20140062607A1 (en) * | 2012-08-31 | 2014-03-06 | Vijay K. Nair | Ultra slim rf package for ultrabooks and smart phones |
Also Published As
Publication number | Publication date |
---|---|
CN107818954A (zh) | 2018-03-20 |
US10068855B2 (en) | 2018-09-04 |
US20180076147A1 (en) | 2018-03-15 |
CN111900139A (zh) | 2020-11-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107818954B (zh) | 半导体封装件、制造其的方法以及电子装置模块 | |
US11222852B2 (en) | Method for fabricating electronic package | |
US20220320010A1 (en) | Semiconductor device and manufacturing method thereof | |
KR100714917B1 (ko) | 차폐판이 개재된 칩 적층 구조 및 그를 갖는 시스템 인패키지 | |
CN107768321B (zh) | 半导体封装件和使用半导体封装件的电子装置模块 | |
US8330267B2 (en) | Semiconductor package | |
JP2002170906A (ja) | 半導体装置及び半導体装置の製造方法 | |
US6713317B2 (en) | Semiconductor device and laminated leadframe package | |
KR101809521B1 (ko) | 반도체 패키지 및 그 제조방법 | |
EP3147942B1 (en) | Semiconductor package, semiconductor device using the same and manufacturing method thereof | |
KR101858954B1 (ko) | 반도체 패키지 및 이의 제조 방법 | |
KR20020061812A (ko) | 볼 그리드 어레이형 멀티 칩 패키지와 적층 패키지 | |
KR100838352B1 (ko) | 전자 부품 수용 구조물 | |
KR102656394B1 (ko) | 반도체 패키지 및 이를 이용한 전자소자 모듈 | |
KR102041666B1 (ko) | 반도체 패키지 및 이의 제조방법, 전자소자 모듈 | |
KR101837514B1 (ko) | 반도체 패키지, 이의 제조 방법 및 시스템 인 패키지 | |
KR101391089B1 (ko) | 반도체 패키지 및 그 제조방법 | |
US11546996B2 (en) | Electronic device module | |
KR101819558B1 (ko) | 반도체 패키지 및 그 제조방법 | |
US20240096725A1 (en) | Electronic devices and methods of manufacturing electronic devices | |
US10937710B2 (en) | Electronic component module | |
WO2021174395A1 (zh) | 封装结构及封装结构的制作方法 | |
CN118173508A (zh) | 半导体装置和利用包含石墨烯涂覆的芯的粘合剂层的管芯附着的方法 | |
WO2020057483A1 (zh) | 封装结构及堆叠式封装结构 | |
CN117727705A (zh) | 电子装置和制造电子装置的方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |