CN107527867A - 通过后栅极切割工序提高设备性能的设备及方法 - Google Patents
通过后栅极切割工序提高设备性能的设备及方法 Download PDFInfo
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Abstract
本发明涉及通过后栅极切割工序提高设备性能的设备及方法,其提供通过后栅极切割工艺以提高性能的集成电路设备的制造方法及其设备。一种方法包括,例如:获取一中间半导体设备,其具有包括多个鳍片的一基板,一STI层,一氧化层,以及该氧化层上方的一栅极材料,该鳍片延伸至该栅极材料中;移除该栅极材料以及该氧化层;沉积一高K材料于该STI层的一顶表面上并围绕该鳍片;沉积一栅极堆栈于该高K材料的上方;用一栅极接触金属填充该设备的该顶部;蚀刻该栅极接触金属,该金属栅极堆栈,以及该高K材料的一部分;以及用一层间介电质填充该部分。本发明还公开了由该方法形成的一中间设备。
Description
技术领域
本发明涉及一种半导体设备以及制造半导体设备的方法,更具体而言,涉及通过一后栅极切割工艺以提高设备性能的设备及方法。
背景技术
对于14纳米(nm)以及更小的设备而言,通常使用替代金属栅极(RMG)以及FinFET工艺的一结合。然而,当间距不断缩小并超过14nm设备时,于一栅极切割期间所形成的边缘,其是于该工艺的前期进行切割以形成或分离该栅极,会更接近于相邻的鳍片。这种切割通常是在该多晶硅栅极图案化的期间执行。导致一阻挡层以及金属填充位于该层间介电质(ILD)之间。其于该相邻鳍片附近生成一物理应力,并需要位于该鳍片与一层间介电质之间的该栅极切割边界处的一金属填充。这些因素可能导致整体设备性能的下降。
因此,可能需要开发出无阻挡层或金属填充于该设备的鳍片附近的设备制造方法。
发明内容
为克服现有技术的缺点,并通过条款提供额外的优点,于一方面,一方法包括,例如:获取一中间半导体设备,其具有包括多个鳍片的一基板,一STI层,一氧化层,以及该氧化层上方的一栅极材料,该鳍片延伸至该多晶硅栅极材料中;移除该栅极材料以及该氧化层;沉积一高K材料于该STI层的一顶表面上,并围绕该鳍片;沉积一栅极堆栈于该高K材料的上方;用一栅极接触金属填充该设备的该顶部;蚀刻该栅极接触金属,该金属栅极堆栈,以及该高K材料的一部分;以及用一层间介电质填充该部分。
于另一方面,提供一种设备,其包括,例如:一中间半导体互连设备,其具有包括多个鳍片的一基板,以及一STI层;一高K材料位于该STI层的一顶表面上,并围绕该鳍片;一栅极堆栈位于该高K材料的上方;一栅极接触金属位于该栅极堆栈的上方;以及一层间介电层位于该设备的一部分中,其中,该层间介电质直接接触该栅极接触金属。
附图说明
在说明书的结尾处,在权利要求中作为示例特别指出并明确地要求了本发明的一个或多个方面。从以下结合附图的详细描述中,本发明的前述和其它目的,特征和优点是显而易见的,其中:
图1为根据现有方法所示的一中间半导体结构的一实施例的一截面正视图,具有包括多个鳍片的一基板,一STI层,一高K层,一栅极堆栈,一栅极接触金属,以及一层间介电区域,其中,一间隔件位于该高K层与该栅极堆栈之间,且其中,位于该层间介电区域与一相邻鳍片之间的该栅极堆栈与高K层为双倍。
图2为根据本发明的一个或多个方面所示的形成一中间半导体结构的一方法的一实施例。
图3为根据本发明的一个或多个方面所示的一中间半导体结构的一实施例的一截面正视图,其具有包括多个鳍片的一基板,一STI层,一氧化层,以及位于该氧化层上方的一栅极材料,该鳍片延伸至该栅极材料中。
图4为根据本发明的一个或多个方面所示的图3的该结构于移除该栅极材料以及该氧化层之后的图示。
图5为根据本发明的一个或多个方面所示的图4的该结构于围绕该鳍片沉积一高K材料至该STI层的一顶表面上之后的图示。
图6为根据本发明的一个或多个方面所示的图5的该结构于沉积一栅极堆栈于高K材料的上方之后的图示。
图7为根据本发明的一个或多个方面所示的图6的该结构于使用一栅极接触金属填充该设备的该顶部之后的图示。
图8为根据本发明的一个或多个方面所示的图7的该结构于蚀刻该栅极接触金属,该金属栅极堆栈,以及该高K材料的一部分之后的图示;以及
图9为根据本发明的一个或多个方面所示的图8的该结构于使用一层间介电质填充该部分之后的图示。
具体实施方式
以下参照附图中所示的非限制性实施例更充分地说明本发明的各方面及其特征,优点和细节。省略了众所周知的材料,制造工具,加工技术等的描述,以免不必要地使本发明更为模糊。然而,应当理解的是,详细说明和具体实施例在指示本发明的各实施例时仅以说明的方式给出,而不是限制。在本发明构思的精神和/或范围内的各种替换,修改,添加和/或布置对于本领域技术人员来说将是显而易见的。还应注意以下参考附图,为了便于理解,这些附图未按比例绘制,其中在不同附图中使用的相同附图标记表示相同或相似的部件。
通常所述,本文揭露了某些集成电路,其提供优于现有半导体设备及制造工艺的优点。有利地,本文揭露的该集成电路设备制造工艺提供无金属填充以及于该栅极切割边界处无应力的半导体设备。
现有方法通常采用一先栅极切割方法,其中该栅极切割将发生在工艺中的早期。也就是说,一层间介电质将分离栅极的位置的一区域将首先被引入。在某种程度上,由于对这样小的尺寸采用替代金属栅极(RMG)方法,该栅极切割边界将变得越来越靠近该鳍片,而降低了设备性能。例如,转向图1,可以看到该栅极切割边界处的该应力。现有方法生产出具有包括多个鳍片120的一基板110的一中间半导体设备100。该基板的上方是一STI层130。层叠且围绕鳍片120的是一高K材料160以及一栅极堆栈170。然而,由于该先栅极切割工艺,该层间区域150已被提前切割,因此间隔件195,其往往是一氮化间隔件,已沉积于层间区域150中。因此,高K材料160与栅极堆栈170勾勒出该间隔件195的一垂直侧,生成位于相邻鳍片120与该填充层间介电质190之间的一应力区域(箭头显示)。此区域导致该栅极切割边界处(例如位于该相邻鳍片120以及该层间区域150之间的该区域)的应力,以及当施加该栅极接触金属180时,经常不完整的金属填充在该小间隔件中。由于靠近该栅极切割边界与远离该栅极切割边界之间的差异导致该设备100产生不匹配。
因此,已开发出一种新的方法,其导致一更好性能的中间半导体设备,不会有由该现有方法所产生的应力以及不匹配的问题。
如图2所示,在一实施例的一个方面中,根据本发明的一个或多个方面的一集成电路设备形成工艺可包括:例如:获得一中间半导体互连设备,具有包括多个鳍片的一基板,一STI层,一氧化层,以及位于该氧化层上方的一栅极材料,该鳍片延伸至该金属栅极200中;移除该栅极材料以及该氧化层210;围绕该鳍片220,沉积一高K材料于该STI层的一顶表面上;沉积一栅极堆栈于该高K材料230的上方;用一栅极接触金属240填充该设备的该顶部;蚀刻该栅极接触金属,该金属栅极堆栈,以及该高K材料250的一部分;以及用一层间介电质260填充该部分。
图3至图9为仅通过示例的方式,根据本发明的一个或多个方面所显示的一半导体设备形成工艺的一部分以及一中间半导体结构的一部分的一详细的实施例。请注意,为了便于理解,这些附图未按比例绘制,其中在不同附图中使用的相同附图标记表示相同或相似的部件。
图3显示了标注为300的一中间半导体设备的一部分,描述了一中间半导体制造阶段。根据被制造的该设备300的设计,该设备300可能已通过最初的设备处理步骤被处理。例如,该设备300可例如包括,具有多个鳍片320形成于其上的一基板310。该基板210可以是任何合适的材料,例如,硅。可以形成任何数量的鳍片320。此外,STI层330可被沉积于基板310上。STI层可以由对于浅沟槽隔离有用的任何材料形成,其可包括一个或多个介电材料,并且可以包括材料的一混合矩阵或多个材料层(未予图示)。一氧化层340,通常是用以移除的一虚拟氧化物,可形成于STI材料330的上方并围绕鳍片320,一栅极材料345位于该氧化层340上方,该鳍片320延伸至该栅极材料345中。于一些实施例中,该栅极材料345包括一多晶硅栅极材料。
图3还概述了层间区域350。在现有方法中,这个区域将在生产的这个阶段被蚀刻,而导致前面所详述的种种问题。然而,根据当前的实施例,这个区域将按照现在样子被留下并在后续处理。为了便于描述,在所有图示中将以层间区域350予以说明。
在其他的实施例(未予图示)中,该设备300的基板可例如为一绝缘体上硅(SOI)基板(未予图示)。例如,该SOI基板可包括与该栅极结构对准的一绝缘层(未予图示),其可为一局部埋入的氧化区域(BOX)或用于电性隔离晶体管的任何合适的材料。在一些实施例中,该设备是一集成电路(IC)的一前道工序(FEOL)部分的一部分。
如图4所示,使用标准光刻或蚀刻工艺,该氧化层340以及该栅极材料345被移除。该移除可包括蚀刻,其可由任何合适的蚀刻工艺来执行,例如,一定向反应离子蚀刻(RIE)。在现有方法的这个阶段,该间隔件295(图1)已经形成。虽然在该层间区域350不需要间隔件195,其应被理解为,类似的间隔件(未予图示)可以应用于其他区域,而不是设备300的该说明区域以外的该层间区域350。这些间隔件可包括位于设备300的相邻部分之间的作为一间隔件的氮化材料以及低K材料。
如图5所示,一高K材料360可沿该STI层330的一顶表面沉积,围绕并覆盖该鳍片320的该侧表面以及顶表面,也就是随后通过原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)、或任何其他合适的已知的或以后开发的沉积技术移除的该栅极材料345以及该氧化层340而暴露的地方。例如,该高K材料可以为任何与二氧化硅相比具有一高介电常数(K)的材料。在一些实施例中,该高K材料360可包括氧化铝、硅酸铪、硅酸锆、二氧化铪、二氧化锆或任何已知或以后开发的高K材料。
如图6所示,一栅极堆栈370也可通过上述列出的沉积技术沉积于该高K材料360的上方。该栅极堆栈370可包括一金属栅极堆栈,该金属栅极堆栈包括但不限于可用于一金属栅极中的任何材料,例如氮化钛(TiN)。
如图7所示,在沉积高K材料360以及栅极堆栈370之后,可以用包括钨或其他适合金属的一栅极接触金属380填充设备300的该剩余区域。可以看出,该栅极接触金属380将填充任何剩余间隔,包括该层间区域350。在一些实施例中,填充栅极接触金属380之后,目前可包括一栅极接触金属顶表面的该设备300的该顶部可使用化学机械抛光(CMP)或其他方法进行平坦化处理以铲平并抛光该顶表面。
如图8所示,该栅极接触金属380,栅极堆栈370,以及高K材料360的一部分被移除。该移除可包括现在已知或以后开发的任何光刻以及蚀刻技术。然而,该移除以及蚀刻最好是毗邻该栅极堆栈370以及栅极接触金属380并与鳍片组320隔开,如此,以移除该层间区域350的该部分中的该材料,留下一大致矩形的区域进行填充。该移除可包括使用一特别适合于一栅极切割的一掩膜。这一区域的目的是为了分离设备300的该多个栅极,但没有引入现有技术的应力诱导限制,通过剩余图示的描述可以更好的进行理解。在一些实施例中,该移除可包括一干蚀刻或一组干蚀刻步骤。例如,在一些实施例中,首先蚀刻该栅极接触金属380,然后同时蚀刻该栅极堆栈370以及该高K材料360。
如图9所示,该层间区域350,现在是一个空隙,可以填充一层间介电质(ILD)390。这可以包括任何介电材料用以分隔栅极。由于清洁蚀刻,该ILD 390可由一氧化填充物使用标准沉积技术进行沉积。在一些实施例中,在填充ILD 390之后,将包括一栅极接触金属顶表面以及一ILD部分的该设备300的该顶部可使用一化学机械抛光(CMP)或其他方法进行平坦化处理以铲平并抛光该顶表面。可以看出,现在的ILD 390直接连接并接触该栅极接触金属380,该栅极堆栈370,该高K材料360,以及该STI层330的一部分。例如,该ILD 390的一底表面可直接粘结该层间区域350内该STI层330的一顶表面。该底表面上方的ILD 390的一侧面的一第一部分直接连接该高K材料360。直接位于该第一部分的上方的该ILD 390的一第二部分则可直接连接该栅极堆栈370。ILD 390的该侧的一第三部分,特别是该剩余部分,可直接连接该栅极接触金属380。
因此,根据实施例,相较于该现有技术(图1)的设备100,ILD 390(图9)无需间隔件,因此层间区域350可完全填充ILD材料,以制作一更有效的设备。此外,高K材料360以及栅极堆栈370不会沿着层间区域350垂直延伸,移除在ILD 350与相邻鳍片320之间的该应力作为现有方法。由于用于填充的该区域变大了,因此栅极接触金属380的不完整的金属填充也有减少的可能性。由于设备300在尺寸上的持续缩小,导致利益的增加,而现有技术会导致这些问题的放大。
本文所使用的术语仅用于描述特定实施例的目的,而非用于限制本发明。如本文所使用的,该单数形成的“一”、“一个”、“该”也旨在包括复数形式,除非上下文另有明确指示。应进一步理解的是,该术语“包括”(以及任何形式的包括,如“包含”、“包含有”),“具有”(及任何形式的具有,如“有”、“含有”),“包括”(以及任何形式的包含,如“包含有”),“含有”(及任何形式的含有,如“包含有”)均为开放形式的连结动词。因此,“包含”、“具有”、“包括”或“含有”一个或多个步骤或元件的方法或设备具有那些一个或多个步骤组或元件组,但不限于仅具有那些一个或多个步骤组或元件组。类似的,“包含”、“具有”、“包括”或“含有”一个或多个特征组的一个方法的一个步骤或一个设备的一个元件具有这些一个或多个特征组,但不限于仅具有那些或更多特征组。此外,以某种方式配置的一个设备或结构至少以这种方式配置,但也可以以未列出的方式进行配置。
所附权利要求书中的所有手段或步骤附加功能元件的相应结构、材料、动作以及等同物(如果有的话)旨在包括与特别要求保护的其他要求保护的元件结合执行该功能的任何结构、材料或动作。已为了说明和描述的目的而呈现了本发明的描述,但并不旨在以所公开的形式穷举或限于本发明。在不脱离本发明的范围和精神的情况下,许多修改和变化对于本领域技术人员而言是显而易见的。所选择和描述的实施例是为了更好地解释本发明的一个或多个方面的原理和实际应用,并且使得本领域的普通技术人员能够了解本发明的各个实施例的一个或多个方面,其具有各种各样的实施例修改适合于预期的特定用途。
Claims (20)
1.一种方法,包括:
获得一中间半导体设备,其具有包括多个鳍片的一基板,一STI层,一氧化层,以及位于该氧化层上方的一栅极材料,该鳍片延伸至该栅极材料中;
移除该栅极材料以及该氧化层;
沉积一高K材料于该STI层的一顶表面上,并围绕该鳍片;
沉积一栅极堆栈于该高K材料的上方;
用一栅极接触金属填充该设备的该顶部;
蚀刻该栅极接触金属、该金属栅极堆栈,以及该高K材料的一部分;以及
用一层间介电质填充该部分。
2.根据权利要求1所述的方法,其中,该蚀刻还包括:
先蚀刻该栅极接触金属;以及
同时蚀刻该栅极堆栈以及该高K材料。
3.根据权利要求2所述的方法,其中,该蚀刻包括一干蚀刻。
4.根据权利要求1所述的方法,其中,该栅极堆栈包括一金属栅极堆栈。
5.根据权利要求4所述的方法,其中,该金属栅极堆栈包括TiN。
6.根据权利要求1所述的方法,其中,该高K材料包括TiAl。
7.根据权利要求1所述的方法,其中,该栅极材料包括一多晶硅栅极材料。
8.根据权利要求1所述的方法,还包括:
填充该栅极接触金属后,抛光该栅极接触金属的一顶表面。
9.根据权利要求1所述的方法,还包括:
填充一层间介电质之后,抛光该中间半导体互连设备的一顶表面。
10.根据权利要求1所述的方法,其中,该层间介电质直接接触该栅极接触金属,该栅极堆栈,该高K材料,以及该STI层的一部分。
11.根据权利要求10所述的方法,其中,该层间介电质的一底表面与该STI层粘结。
12.根据权利要求11所述的方法,其中,该层间介电质的一侧的一第一部分直接位于连接该高K材料的该底表面的上方。
13.根据权利要求12所述的方法,其中,该层间介电质的该侧的一第二部分,直接位于该第一部分的上方,并连接该栅极堆栈。
14.根据权利要求13所述的方法,其中,该层间介电质的该侧的一第三部分,直接位于该第二部分的上方,并连接该栅极接触金属。
15.一种设备,包括:
一中间半导体互连设备,其具有包括多个鳍片的一基板以及一STI层;
一高K材料,位于该STI层的一顶表面上并围绕该鳍片;
一栅极堆栈,位于该高K材料的上方;
一栅极接触金属,位于该栅极堆栈的上方;以及
一层间介电质,位于该设备的一部分中,其中,该层间介电质直接接触该栅极接触金属。
16.根据权利要求15所述的设备,其中,该栅极堆栈包括一金属栅极堆栈。
17.根据权利要求16所述的设备,其中,该金属栅极堆栈包括TiN。
18.根据权利要求15所述的设备,其中,该高K材料包括TiAl。
19.根据权利要求15所述的设备,其中,该层间介电质直接接触该金属栅极堆栈,该高K材料,以及该STI层。
20.根据权利要求19所述的设备,其中,该层间介电质的一底表面与该STI层粘结,该层间介电质的一侧的一第一部分直接位于连接该高K材料的该底表面的上方,直接位于该第一部分上方的该层间介电质的该侧的一第二部分连接该栅极堆栈,以及直接位于该第二部分上方的该层间介电质的该侧的一第三部分连接该栅极接触金属。
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US20170365676A1 (en) | 2017-12-21 |
TWI646587B (zh) | 2019-01-01 |
US10347729B2 (en) | 2019-07-09 |
TW201810391A (zh) | 2018-03-16 |
US9679985B1 (en) | 2017-06-13 |
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