CN107430883B - 使用串联磁性隧道结的多位自旋转移矩磁阻随机存取存储器stt-mram - Google Patents
使用串联磁性隧道结的多位自旋转移矩磁阻随机存取存储器stt-mram Download PDFInfo
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- CN107430883B CN107430883B CN201680014624.6A CN201680014624A CN107430883B CN 107430883 B CN107430883 B CN 107430883B CN 201680014624 A CN201680014624 A CN 201680014624A CN 107430883 B CN107430883 B CN 107430883B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5607—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using magnetic storage elements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/645,213 | 2015-03-11 | ||
| US14/645,213 US9437272B1 (en) | 2015-03-11 | 2015-03-11 | Multi-bit spin torque transfer magnetoresistive random access memory with sub-arrays |
| PCT/US2016/015932 WO2016144436A2 (en) | 2015-03-11 | 2016-02-01 | Multi-bit spin torque transfer magnetoresistive random access memory with sub-arrays |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107430883A CN107430883A (zh) | 2017-12-01 |
| CN107430883B true CN107430883B (zh) | 2021-03-12 |
Family
ID=55404805
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680014624.6A Active CN107430883B (zh) | 2015-03-11 | 2016-02-01 | 使用串联磁性隧道结的多位自旋转移矩磁阻随机存取存储器stt-mram |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9437272B1 (enExample) |
| EP (1) | EP3268966A2 (enExample) |
| JP (1) | JP2018513517A (enExample) |
| CN (1) | CN107430883B (enExample) |
| WO (1) | WO2016144436A2 (enExample) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150213867A1 (en) * | 2014-01-28 | 2015-07-30 | Qualcomm Incorporated | Multi-level cell designs for high density low power gshe-stt mram |
| US9672935B2 (en) | 2014-10-17 | 2017-06-06 | Lattice Semiconductor Corporation | Memory circuit having non-volatile memory cell and methods of using |
| USRE48570E1 (en) | 2014-10-17 | 2021-05-25 | Lattice Semiconductor Corporation | Memory circuit having non-volatile memory cell and methods of using |
| US10306008B2 (en) * | 2015-09-07 | 2019-05-28 | International Business Machines Corporation | Limiting client side data storage based upon client geo-location |
| DE102016112765B4 (de) * | 2016-07-12 | 2024-04-25 | Infineon Technologies Ag | Magnetspeicherbauelement und Verfahren zum Betreiben desselben |
| JP2018147916A (ja) | 2017-03-01 | 2018-09-20 | ソニーセミコンダクタソリューションズ株式会社 | 磁気記憶素子、磁気記憶装置、電子機器、および磁気記憶素子の製造方法 |
| US10534996B2 (en) | 2017-04-03 | 2020-01-14 | Gyrfalcon Technology Inc. | Memory subsystem in CNN based digital IC for artificial intelligence |
| US10331368B2 (en) | 2017-04-03 | 2019-06-25 | Gyrfalcon Technology Inc. | MLC based magnetic random access memory used in CNN based digital IC for AI |
| US10546234B2 (en) | 2017-04-03 | 2020-01-28 | Gyrfalcon Technology Inc. | Buffer memory architecture for a CNN based processing unit and creation methods thereof |
| US10296824B2 (en) | 2017-04-03 | 2019-05-21 | Gyrfalcon Technology Inc. | Fabrication methods of memory subsystem used in CNN based digital IC for AI |
| US10331367B2 (en) | 2017-04-03 | 2019-06-25 | Gyrfalcon Technology Inc. | Embedded memory subsystems for a CNN based processing unit and methods of making |
| US10331999B2 (en) * | 2017-04-03 | 2019-06-25 | Gyrfalcon Technology Inc. | Memory subsystem in CNN based digital IC for artificial intelligence |
| US20190066746A1 (en) | 2017-08-28 | 2019-02-28 | Qualcomm Incorporated | VARYING ENERGY BARRIERS OF MAGNETIC TUNNEL JUNCTIONS (MTJs) IN DIFFERENT MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM) ARRAYS IN A SEMICONDUCTOR DIE TO FACILITATE USE OF MRAM FOR DIFFERENT MEMORY APPLICATIONS |
| JP6829172B2 (ja) | 2017-09-20 | 2021-02-10 | キオクシア株式会社 | 半導体記憶装置 |
| US10403343B2 (en) * | 2017-12-29 | 2019-09-03 | Spin Memory, Inc. | Systems and methods utilizing serial configurations of magnetic memory devices |
| US10803916B2 (en) | 2017-12-29 | 2020-10-13 | Spin Memory, Inc. | Methods and systems for writing to magnetic memory devices utilizing alternating current |
| US11968843B2 (en) | 2018-06-28 | 2024-04-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Processing core and MRAM memory unit integrated on a single chip |
| US10559338B2 (en) * | 2018-07-06 | 2020-02-11 | Spin Memory, Inc. | Multi-bit cell read-out techniques |
| US10692569B2 (en) | 2018-07-06 | 2020-06-23 | Spin Memory, Inc. | Read-out techniques for multi-bit cells |
| US10559357B1 (en) * | 2018-08-06 | 2020-02-11 | Lattice Semiconductor Corporation | Memory circuit having non-volatile memory cell and methods of using |
| US10847198B2 (en) * | 2018-11-01 | 2020-11-24 | Spin Memory, Inc. | Memory system utilizing heterogeneous magnetic tunnel junction types in a single chip |
| KR102576209B1 (ko) * | 2018-12-03 | 2023-09-07 | 삼성전자주식회사 | 스핀-궤도 토크 라인을 갖는 반도체 소자 |
| US10971681B2 (en) * | 2018-12-05 | 2021-04-06 | Spin Memory, Inc. | Method for manufacturing a data recording system utilizing heterogeneous magnetic tunnel junction types in a single chip |
| US10868234B2 (en) * | 2018-12-12 | 2020-12-15 | Taiwan Semiconductor Manufacturing Company Ltd. | Storage device having magnetic tunnel junction cells of different sizes, and method of forming storage device |
| JP7211273B2 (ja) * | 2019-06-17 | 2023-01-24 | 株式会社アイシン | 半導体記憶装置 |
| US11514962B2 (en) * | 2020-11-12 | 2022-11-29 | International Business Machines Corporation | Two-bit magnetoresistive random-access memory cell |
| US11844284B2 (en) * | 2021-06-29 | 2023-12-12 | International Business Machines Corporation | On-chip integration of a high-efficiency and a high-retention inverted wide-base double magnetic tunnel junction device |
| CN116312669B (zh) * | 2021-12-20 | 2025-08-01 | 长鑫存储技术有限公司 | 存储阵列、存储单元及其数据读写方法 |
| US12437791B2 (en) | 2023-07-11 | 2025-10-07 | Honeywell International Inc. | Magneto resistive memory for monolithic data processing |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101711408A (zh) * | 2007-02-12 | 2010-05-19 | 亚达夫科技有限公司 | 改进的高容量低成本多态磁存储器 |
| CN102282621A (zh) * | 2009-01-30 | 2011-12-14 | 高通股份有限公司 | 自旋转移力矩磁阻随机存取存储器内的位线电压控制 |
| CN102334166A (zh) * | 2009-03-02 | 2012-01-25 | 高通股份有限公司 | 降低自旋力矩转移磁阻性随机存取存储器(stt-mram)中的源极负载效应 |
| CN102388358A (zh) * | 2011-09-30 | 2012-03-21 | 华为技术有限公司 | 在混合存储环境下配置存储设备的方法和系统 |
| CN103810118A (zh) * | 2014-02-28 | 2014-05-21 | 北京航空航天大学 | 一种新型的stt-mram缓存设计方法 |
| CN103858169A (zh) * | 2011-10-12 | 2014-06-11 | 国际商业机器公司 | 具有单个磁隧道结叠层的多位自旋动量转移磁阻随机存取存储器 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW578149B (en) | 2002-09-09 | 2004-03-01 | Ind Tech Res Inst | High density magnetic random access memory |
| US7286378B2 (en) * | 2003-11-04 | 2007-10-23 | Micron Technology, Inc. | Serial transistor-cell array architecture |
| US7102920B2 (en) * | 2004-03-23 | 2006-09-05 | Hewlett-Packard Development Company, L.P. | Soft-reference three conductor magnetic memory storage device |
| US20060039183A1 (en) | 2004-05-21 | 2006-02-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-sensing level MRAM structures |
| KR100962949B1 (ko) * | 2008-08-26 | 2010-06-09 | 주식회사 하이닉스반도체 | 멀티 비트 자기 메모리 셀 및 그 제조 방법 |
| WO2011087038A1 (ja) * | 2010-01-13 | 2011-07-21 | 株式会社日立製作所 | 磁気メモリ、磁気メモリの製造方法、及び、磁気メモリの駆動方法 |
| US8446753B2 (en) * | 2010-03-25 | 2013-05-21 | Qualcomm Incorporated | Reference cell write operations at a memory |
| US8750032B2 (en) * | 2010-04-28 | 2014-06-10 | Hitachi, Ltd. | Semiconductor recording device |
| US8279662B2 (en) | 2010-11-11 | 2012-10-02 | Seagate Technology Llc | Multi-bit magnetic memory with independently programmable free layer domains |
| KR101215951B1 (ko) | 2011-03-24 | 2013-01-21 | 에스케이하이닉스 주식회사 | 반도체 메모리 및 그 형성방법 |
| US8804413B2 (en) | 2012-02-07 | 2014-08-12 | Qualcomm Incorporated | Multi-free layer MTJ and multi-terminal read circuit with concurrent and differential sensing |
| US9196334B2 (en) | 2012-04-19 | 2015-11-24 | Qualcomm Incorporated | Hierarchical memory magnetoresistive random-access memory (MRAM) architecture |
| JP6069705B2 (ja) * | 2013-05-20 | 2017-02-01 | 富士通株式会社 | メモリ装置 |
-
2015
- 2015-03-11 US US14/645,213 patent/US9437272B1/en not_active Expired - Fee Related
-
2016
- 2016-02-01 WO PCT/US2016/015932 patent/WO2016144436A2/en not_active Ceased
- 2016-02-01 CN CN201680014624.6A patent/CN107430883B/zh active Active
- 2016-02-01 JP JP2017546972A patent/JP2018513517A/ja active Pending
- 2016-02-01 EP EP16705634.0A patent/EP3268966A2/en not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101711408A (zh) * | 2007-02-12 | 2010-05-19 | 亚达夫科技有限公司 | 改进的高容量低成本多态磁存储器 |
| CN102282621A (zh) * | 2009-01-30 | 2011-12-14 | 高通股份有限公司 | 自旋转移力矩磁阻随机存取存储器内的位线电压控制 |
| CN102334166A (zh) * | 2009-03-02 | 2012-01-25 | 高通股份有限公司 | 降低自旋力矩转移磁阻性随机存取存储器(stt-mram)中的源极负载效应 |
| CN102388358A (zh) * | 2011-09-30 | 2012-03-21 | 华为技术有限公司 | 在混合存储环境下配置存储设备的方法和系统 |
| CN103858169A (zh) * | 2011-10-12 | 2014-06-11 | 国际商业机器公司 | 具有单个磁隧道结叠层的多位自旋动量转移磁阻随机存取存储器 |
| CN103810118A (zh) * | 2014-02-28 | 2014-05-21 | 北京航空航天大学 | 一种新型的stt-mram缓存设计方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3268966A2 (en) | 2018-01-17 |
| US20160267957A1 (en) | 2016-09-15 |
| JP2018513517A (ja) | 2018-05-24 |
| US9437272B1 (en) | 2016-09-06 |
| WO2016144436A3 (en) | 2016-11-03 |
| WO2016144436A2 (en) | 2016-09-15 |
| CN107430883A (zh) | 2017-12-01 |
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