CN106997910A - P-type crystal silicon back contacts double-side cell structure and preparation method without front gate line - Google Patents
P-type crystal silicon back contacts double-side cell structure and preparation method without front gate line Download PDFInfo
- Publication number
- CN106997910A CN106997910A CN201710184594.XA CN201710184594A CN106997910A CN 106997910 A CN106997910 A CN 106997910A CN 201710184594 A CN201710184594 A CN 201710184594A CN 106997910 A CN106997910 A CN 106997910A
- Authority
- CN
- China
- Prior art keywords
- type crystal
- crystal silicon
- back side
- film
- gate line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 152
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 152
- 239000010703 silicon Substances 0.000 title claims abstract description 152
- 239000013078 crystal Substances 0.000 title claims abstract description 78
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 52
- 238000002161 passivation Methods 0.000 claims abstract description 52
- 238000000576 coating method Methods 0.000 claims abstract description 46
- 239000011248 coating agent Substances 0.000 claims abstract description 41
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910052709 silver Inorganic materials 0.000 claims abstract description 32
- 239000004332 silver Substances 0.000 claims abstract description 32
- 239000011148 porous material Substances 0.000 claims abstract description 30
- 239000006117 anti-reflective coating Substances 0.000 claims abstract description 27
- 239000011159 matrix material Substances 0.000 claims abstract description 15
- 230000008569 process Effects 0.000 claims abstract description 9
- 239000000203 mixture Substances 0.000 claims abstract description 7
- 239000010408 film Substances 0.000 claims description 151
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 28
- 239000002002 slurry Substances 0.000 claims description 21
- 238000007650 screen-printing Methods 0.000 claims description 19
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 18
- 239000004411 aluminium Substances 0.000 claims description 18
- 229910052782 aluminium Inorganic materials 0.000 claims description 18
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 18
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 18
- 238000009792 diffusion process Methods 0.000 claims description 14
- 239000000377 silicon dioxide Substances 0.000 claims description 14
- 238000007639 printing Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- 238000004544 sputter deposition Methods 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- 239000012188 paraffin wax Substances 0.000 claims description 11
- 239000002019 doping agent Substances 0.000 claims description 10
- 239000011521 glass Substances 0.000 claims description 9
- 238000003475 lamination Methods 0.000 claims description 9
- 238000007747 plating Methods 0.000 claims description 9
- 150000002500 ions Chemical class 0.000 claims description 8
- 238000000137 annealing Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 7
- 238000001039 wet etching Methods 0.000 claims description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 6
- 239000007921 spray Substances 0.000 claims description 6
- 238000005507 spraying Methods 0.000 claims description 6
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 5
- 239000012535 impurity Substances 0.000 claims description 5
- 238000003780 insertion Methods 0.000 claims description 5
- 230000037431 insertion Effects 0.000 claims description 5
- 238000001020 plasma etching Methods 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 230000003628 erosive effect Effects 0.000 claims description 4
- 229910021389 graphene Inorganic materials 0.000 claims description 4
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical group ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims description 4
- 238000007581 slurry coating method Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000010146 3D printing Methods 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 3
- 206010037660 Pyrexia Diseases 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 238000013021 overheating Methods 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910019213 POCl3 Inorganic materials 0.000 claims description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 230000003197 catalytic effect Effects 0.000 claims description 2
- 239000006258 conductive agent Substances 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000009713 electroplating Methods 0.000 claims description 2
- 238000010329 laser etching Methods 0.000 claims description 2
- 239000012528 membrane Substances 0.000 claims description 2
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 230000003667 anti-reflective effect Effects 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- 229910052719 titanium Inorganic materials 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 21
- 239000007888 film coating Substances 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 12
- 230000005611 electricity Effects 0.000 description 11
- 239000000758 substrate Substances 0.000 description 8
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 6
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 6
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 6
- 229940037003 alum Drugs 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical group ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000008020 evaporation Effects 0.000 description 3
- 238000001704 evaporation Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 235000008216 herbs Nutrition 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000002086 nanomaterial Substances 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 1
- KMWBBMXGHHLDKL-UHFFFAOYSA-N [AlH3].[Si] Chemical compound [AlH3].[Si] KMWBBMXGHHLDKL-UHFFFAOYSA-N 0.000 description 1
- PKKAOXZTGMDCJV-UHFFFAOYSA-N [P].[Si].[P] Chemical group [P].[Si].[P] PKKAOXZTGMDCJV-UHFFFAOYSA-N 0.000 description 1
- 238000006555 catalytic reaction Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002309 gasification Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 230000004446 light reflex Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
- H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Sustainable Development (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Sustainable Energy (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a kind of P-type crystal silicon back contacts double-side cell structure and preparation method without front gate line, nesa coating is located on front passivating film and antireflective coating, the pore electrod excessively for connecting battery front side and back side negative pole is provided with through hole on P-type crystal silicon chip, the top layer of N-type layer is provided with the local heavy doping N+ areas being distributed by regular figure, nesa coating penetrates antireflective coating and front passivating film and local heavy doping N+ areas and crosses the top electrical contact composition GND of pore electrod, nesa coating is used to the electronics that battery front side collects passing through the back side that pore electrod is directed at battery, the just superfine grid line in the back side penetrates the first backside passivation film and the second backside passivation film and forms local Ohmic contact with p-type matrix, and linked together composition anode with back side positive pole main gate line.Blocked this method avoids the light of anode, add power output, reduced the consumption of silver paste in cell fabrication processes, reduce production cost.
Description
Technical field
The invention belongs to technical field of solar batteries, more particularly to a kind of P-type crystal silicon back contacts without front gate line
Double-side cell structure and preparation method.
Background technology
From first piece of solar cell in 1954 since AT＆T Labs is born, crystal silicon solar energy battery has been obtained extensively
General application, conversion efficiency is constantly lifted, production cost continuous decrease.At present, crystal silicon solar energy battery accounts for solar cell
More than the 90% of overall global market, the producing line conversion efficiency of crystalline silicon battery plate has broken through 21% at present, and global year is newly equipped with
Machine capacity about 70GW and speedup substantially, constantly reduce with the electric cost of degree of thermal power generation, are expected to maintain an equal level therewith in the coming years.It is brilliant
Body silicon solar cell as a kind of important function of clean energy resource in terms of restructuring the use of energy, alleviating environmental pressure increasingly
Highlight.
P-type crystal silicon battery is low due to mature production technology, manufacturing cost, at present and from now on for quite a long time
Inside still occupy most market shares.P-type crystal silicon solar cell wants to continue to keep competitiveness, obtains bigger development
With application, it is necessary to further improve conversion efficiency, while reducing production cost.
PERC technologies are conceived to the back side of battery, the recombination velocity at the back side are greatly reduced using passivation, the technology is in recent years
Progressively to obtain large-scale application in P-type crystal silicon battery, the efficiency of polycrystalline and single crystal battery is set to lift 0.5% He respectively
More than 1%.As the improvement to P-type crystal silicon PERC batteries, have replace the full aluminium lamination at the back side with thin alum gate line at present, make electricity
Pond has the function of generating electricity on two sides.Although PERC technologies greatly improve the back side performance of battery, to the front of battery
Without significantly improving, the especially front electrode of battery, if it is main at present formed using silk-screen printing by the way of nearly hundred thin grid with
Dry bar main grid, this process causes the area on cell piece surface 5%~7% to be formed to block light, make p-type PERC double-side cells
Odds for effectiveness fails to give full play to.
What MWT battery technology was mainly solved is the light occlusion issue of battery front side, is punched on silicon chip, utilized pore electrod
The electric current that positive thin grid line is collected is directed at the back side of battery.Although MWT battery technology reduces battery front side primary gate electrode
Light shielded area, but battery front side thin grid line still have about 3% light shielded area, thin grid line is usually expensive silver,
Cost of manufacture for reduction cell piece is unfavorable.In addition the electrical leakage problems of MWT battery fail fine solution.Problem above causes
MWT does not obtain large-scale application always as the core technology for improving battery front side.
The content of the invention
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that there is provided one kind without front
The P-type crystal silicon back contacts double-side cell structure and preparation method of grid line, the battery combine P-type crystal silicon the back of the body passivation it is two-sided and
Metal electrode winding technique, and a kind of new electrode structure is devised in battery front side, solve well front gate line block,
The problems such as back side is leaked electricity.
The present invention uses following technical scheme：
A kind of P-type crystal silicon back contacts double-side cell structure without front gate line, P-type crystal silicon chip is wrapped successively from top to down
Include：Nesa coating, antireflective coating, front passivating film, N-type layer, p-type matrix, backside passivation film, the just superfine grid line in the back side and the back of the body
Face positive pole main gate line, the P-type crystal silicon chip is provided with through hole, be provided with the through hole for connect battery front side negative pole and
The pore electrod excessively of back side negative pole, the top layer of the N-type layer is provided with the local heavy doping N+ areas being distributed by regular figure, described transparent
Conducting film penetrates the antireflective coating and front passivating film and the local heavy doping N+ areas and crosses the top electrical contact of pore electrod
GND is constituted, the electronics that the nesa coating is used to collect battery front side is directed at battery by the pore electrod of crossing
The back side, the backside passivation film includes the first backside passivation film and the second backside passivation film, and the just superfine grid line in the back side is penetrated
First backside passivation film and the second backside passivation film and the p-type matrix form local Ohmic contact, and with back side positive pole
Main gate line links together composition anode.
Further, the hole size is identical, in P-type crystal silicon chip described in thickness direction insertion, wait line-spacing etc. row away from
Array arrangement, a diameter of 100~500um of the single through hole, quantity is 4 × 4~10 × 10.
Further, the just superfine grid line in the back side is one or more groups of line segments being parallel to each other, the length of the line segment
For 10~80mm, width is that the spacing between 30~300um, two neighboring line segment is 1~4mm.
Further, the just superfine grid line in the back side is aluminium, silver, copper, nickel, conductive agent or metal alloy.
Further, the local heavy doping N+ areas array arrangement is in the N-type layer, the local heavy doping N+ areas
Sheet resistance is 20~60 Ω/, and the array pattern in the local heavy doping N+ areas is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
The combination of shape and X-Y scheme.
Further, the kind one-dimensional figure is line segment, phantom line segments, camber line or grid line shape；The line of the kind one-dimensional figure
A width of 20~200um, length is 0.05~1.5mm；It is 0.5~2mm with two neighboring linear spacing in a line, in same row
Two neighboring linear spacing is 0.5~2mm；
The X-Y scheme is circle, ellipse, spindle, annular, polygon, polygonal or sector, and the two dimension is several
The size of what figure is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
Further, the thickness of the nesa coating is 50~500nm；The thickness of the antireflective coating be 50~
100nm；The thickness of the front passivating film is 5~50nm, and the thickness of first backside passivation film is 5~40nm；Described
The thickness of two backside passivation films is 50~150nm.
Further, the back side positive pole main gate line is parallel to each other and equidistantly arranged, and with the just superfine grid in the back side
Line intersects vertically, and the number of the back side positive pole main gate line is 3~15, and the width of the single back side positive pole main gate line is
0.5~5mm.
Further, the P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of silicon of many or multiple element of aluminium
Piece, the thickness of the P-type crystal silicon chip is 90~190um.
A kind of method for the P-type crystal silicon back contacts double-side cell structure for preparing no front gate line, comprises the following steps：
S1, on P-type crystal silicon chip the through holes of some formed objects formed using laser, the through hole is passed through in thickness direction
Lead to the P-type crystal silicon chip, wait the row such as line-spacing away from array arrangement；
S2, using chemical liquid burn into plasma etching, metal catalytic or laser etching method to the P-type crystal silicon
Piece carries out surface-texturing processing；
S3, spread using low pressure, normal pressure diffusion, ion implanting, laser doping or impurity slurry coating method carry out phosphorus doping
Processing, forms N-type layer, dopant is POCl on the front of the P-type crystal silicon chip and through-hole wall top layer3、PH3Or phosphorus slurry；
S4, using laser doping, secondary thermal diffusion, local ion implanting, mask anti-carve erosion or dopant local coating process
Local heavy doping is formed in the front of the P-type silicon piece, the figure of the heavy doping is kind one-dimensional figure, X-Y scheme or class one
Tie up the combination of figure and X-Y scheme；
S5, paraffin mask, protection hole wall and positive face made in the through hole and neighboring area using spraying or print process
The doped layer of neighboring area；
S6, be etched away using wet etching or dry etching the positive phosphorosilicate glass of P-type crystal silicon chip, back of the body knot and
Mask；
S7, the P-type crystal silicon chip after etching made annealing treatment in the lehr, in the P-type crystal silicon chip
One layer of fine and close thermal oxidation silicon of superficial growth, while the foreign atom of doped layer is redistributed；
S8, positive successively deposition 5~50nm front passivating film and subtracting for 50~100nm in the P-type crystal silicon chip
Reflectance coating, in 5~150nm of backside deposition of P-type silicon piece backside passivation film, the front passivating film is silicon nitride, oxygen
One or more laminations in SiClx, silicon oxynitride, non-crystalline silicon are constituted, and the antireflective coating is silicon nitride, silica, nitrogen oxidation
One or more laminations in silicon, titanium oxide, carborundum are constituted, and the backside passivation film includes the first backside passivation film and second
Backside passivation film, first backside passivation film be aluminum oxide, silica, one or more pellicular cascades of amorphous silicon membrane,
Second backside passivation film is silicon nitride, silica, one or more pellicular cascades of silicon oxynitride silicon thin film；
Film is opened in S9, the positive heavy doping figure progress by described in step S4 using laser in the P-type crystal silicon chip；
Carry out opening film in the backside passivation film of the P-type crystal silicon chip, open film pattern for one or more groups of line segments being parallel to each other, it is long
Spend for 10~80mm, width is that the spacing between 30~300um, two neighboring line segment is 1~4mm；
S10, first use vacuum assist silk-screen printing or electro-plating method overleaf to make pore electrod, and via slurry fills up whole
Individual through hole, via slurry is the silver paste that performance is worn without burn-through performance or low fever, is dried afterwards；Then using silk-screen printing, spray printing,
Plating or sputtering method make some back side positive pole main gate line electricity for being parallel to each other and equidistantly arranging at the back side of the P-type silicon piece
Pole, slurry is silver paste or silver/aluminium paste, is dried afterwards；It is finally brilliant in the p-type using silk-screen printing, spray printing, plating or sputtering method
The back side of body silicon chip opens film figure by laser and makes the just superfine grid line in the back side, and slurry is aluminium paste or silver/aluminium paste, is dried afterwards, is made
Make battery electrode；
S11, it is heat-treated at 300~900 DEG C, the just superfine grid line in the back side is formed ohm with p-type matrix and connect
Touch, while being welded together with the back side positive pole main gate line, constitute the positive pole of battery, while via slurry is through Overheating Treatment,
Formed pore electrod；
S12, on the positive antireflective coating of P-type crystal silicon chip, passivating film using sputtering, vapour deposition, 3D printing,
Printing or spraying coating process make front transparent conducting film, and the nesa coating is ito thin film, AZO films, GZO films, FTO
One or more laminations in film, IWO films and graphene film are constituted, the nesa coating and part heavy doping N+ areas
And the electrical contact of via electrode tip constitutes the negative pole of battery.
Compared with prior art, the present invention at least has the advantages that：
Double-side cell structure of the present invention is the two-dimentional combination electrode that local heavy doping/nesa coating is constituted, local heavily doped
Miscellaneous region by specific array figure be arranged in the front side emitter of battery extremely on, for collecting electronics, nesa coating is located at passivation
On film, antireflective coating, in regional area, nesa coating penetrates antireflective coating and passivating film and local heavily doped region and via
Electrode contact, the electronics that local heavily doped region is collected from silicon substrate was pooled to pore electrod by nesa coating, converged
The electronics of collection is directed at the GND of cell backside by crossing pore electrod again, by the two-sided PERC batteries of itself and P-type crystal silicon and MWT
Battery technology is combined, and forms a kind of P-type crystal silicon back contacts double-side cell without front gate line.The novel battery is not only complete
The full light for avoiding front metal electrode is blocked, and can also prevent that electrode roll, can be notable around rear electric leakage by the passivating film at the back side
The conversion efficiency of P-type crystal silicon battery is lifted, and reduces the consumption of silver paste in cell fabrication processes, production cost is reduced.
Further, expensive silver paste is saved using local heavy doping, making the Material Cost of battery reduces；Set
The light that nesa coating eliminates front gate line is blocked, and adds power output；Due to the presence of local front court, electricity is more beneficial for
Son is collected, and reduces the compound of photo-generated carrier.
Further, on the one hand the passivating film at the back side serves good passivation to P-type silicon matrix, on the other hand anti-
The electric leakage crossed between pore electrod bottom and silicon substrate is stopped.
Further, the first backside passivation film uses aluminum oxide, and the second backside passivation film uses silicon nitride, the lamination of formation
Film can be such that passivating back effect and dorsal light reflex reaches most preferably.
Further, film is opened by the enterprising line section shape of overleaf passivating film, and it is just superfine opening the diaphragm area making back side
Grid line, it is to avoid the all-metal layer covering at the back side, can be achieved the back side and generates electricity, delta power output.
Further, the just superfine grid line in the back side is alum gate line, can be more beneficial for hole receipts in aluminium silicon interface formation back surface field
Collection, reduces the compound of photo-generated carrier.
Further, back side positive pole is intersected vertically with main gate line by just superfine grid line and constituted, with traditional grid line graphics class
Seemingly, the silk-screen technology of main flow can be used, manufacture difficulty is reduced.
The invention also discloses a kind of method for the P-type crystal silicon back contacts double-side cell structure for preparing no front gate line,
First the laser beam drilling on silicon chip, sequentially passes through making herbs into wool, diffusion, local heavy doping, mask, cleaning, plated film, the positive back side of laser afterwards
Film, printing, sintering, making nesa coating are opened, the generating electricity on two sides passivating back p-type crystal silicon electricity of no front gate line is eventually fabricated
Pond, blocks this method avoids the light of anode, adds power output, reduces the consumption of silver paste in cell fabrication processes
Amount, reduces production cost.
Below by drawings and examples, technical scheme is described in further detail.
Brief description of the drawings
Partial cutaway schematics of the Fig. 1 for the present invention along back side positive pole main gate line direction；
Fig. 2 collects the schematic diagram of front electronics for the present invention using the local heavily doped region of point-like；
Fig. 3 collects the schematic diagram of front electronics for the present invention using the local heavily doped region of line segment shape；
Fig. 4 is a kind of backplate pictorial diagram of the invention.
Wherein：1. nesa coating；2. antireflective coating；3. front passivating film；4.N+ regions；5.N types layer；6.P mold bases；
7. backside passivation film；The backside passivation films of 7-1. first；The backside passivation films of 7-2. second；8. the just superfine grid line in the back side；9. the back side is just
Pole main gate line；10. cross pore electrod.
Embodiment
The invention provides a kind of P-type crystal silicon back contacts double-side cell structure without front gate line, the front electrode
The two-dimentional combination electrode constituted for local heavy doping/nesa coating, local heavily doped region is arranged in by specific array figure
The front side emitter of battery extremely on, for collecting electronics.Nesa coating is on passivating film, antireflective coating, in regional area,
Nesa coating penetrates antireflective coating and passivating film and made electrical contact with local heavily doped region and via electrode tip, by local heavy doping
The electronics that region is collected from silicon substrate was pooled to pore electrod by nesa coating, and the electronics collected is again by crossing pore electrod
It is directed at the GND of cell backside.
Referring to Fig. 1, P-type crystal silicon chip includes successively from top to down：Nesa coating 1, antireflective coating 2, front passivation
The just superfine grid line 8 in film 3, N-type layer 5, p-type matrix 6, backside passivation film 7, the back side and back side positive pole main gate line 9, the electrically conducting transparent
Film 1 is on the front passivating film 3, antireflective coating 2, and the P-type crystal silicon chip is provided with through hole, the through hole and set
There is the pore electrod 10 excessively for connecting battery front side and back side negative pole, the top layer of the N-type layer 5 is provided with what is be distributed by regular figure
Local heavy doping N+ areas 4, the nesa coating 1 penetrates the antireflective coating 2 and front passivating film 3 and the local heavy doping
N+ areas 4 and the top electrical contact composition GND for crossing pore electrod 10, the nesa coating 1 are used for collect battery front side
Electronics is directed at the back side of battery by the pore electrod 10 of crossing, and the backside passivation film 7 includes the first backside passivation film 7-1 and the
Two backside passivation film 7-2, the just superfine grid line 8 in the back side penetrates the first backside passivation film 7-1 and the second backside passivation film
7-2 and the p-type matrix 6 form local Ohmic contact, and are linked together composition anode with back side positive pole main gate line 9.
Wherein, hole size is identical, in P-type crystal silicon chip described in thickness direction insertion, waits the row such as line-spacing away from array arrangement,
A diameter of 100~500um of the single through hole, quantity is 4 × 4~10 × 10.
The local array arrangement of heavy doping N+ areas 4 is on the top layer of N-type layer 5, the sheet resistance in the local heavy doping N+ areas 4
For 20~60 Ω/, the array pattern in the local heavy doping N+ areas 4 is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
With the combination of X-Y scheme.
Wherein, kind one-dimensional figure is line segment, phantom line segments, camber line or grid line shape；The line width of the kind one-dimensional figure be 20~
200um, length is 0.05~1.5mm；It is 0.5~2mm with two neighboring linear spacing in a line, it is two neighboring in same row
Linear spacing is 0.5~2mm；
X-Y scheme is circle, ellipse, spindle, annular, polygon, polygonal or sector, the two-dimensional geometry figure
The size of shape is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
It is preferred that, the thickness of nesa coating 1 is 50~500nm；The thickness of antireflective coating 2 is 50~100nm；Front is blunt
The thickness for changing film 3 is 5~50nm, and the first backside passivation film 7-1 thickness is 5~40nm；The second backside passivation film 7-2 thickness
For 50~150nm；
Back side positive pole main gate line 9 is parallel to each other and equidistantly arranged, and number is 3~15, the single back side positive pole master
The width of grid line 9 is 0.5~5mm, and the just superfine grid line 8 in the back side intersects vertically with back side positive pole main gate line 9 at least one described.
The invention also discloses a kind of side for preparing the P-type crystal silicon back contacts double-side cell structure without front gate line
Method, first the laser beam drilling on silicon chip, is sequentially passing through making herbs into wool, diffusion, local heavy doping, mask, cleaning, plated film, laser just afterwards
Film, printing, sintering, making nesa coating are opened in the back side, and the generating electricity on two sides passivating back p-type crystal silicon electricity of no front gate line is made
Pond.The P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of silicon chip of many or multiple element of aluminium, the P-type crystal
The thickness of silicon chip is 90~190um.Comprise the following steps that：
(1) through hole of some formed objects is formed using laser on P-type crystal silicon chip, through hole is whole in thickness direction insertion
Individual silicon chip, refers to Fig. 1 to Fig. 4, and through hole, which is pressed, waits line-spacing etc. to arrange away from array arrangement, a diameter of 100~500um of single through hole,
Quantity is 4 × 4~10 × 10.
(2) surface-texturing processing is carried out to P-type crystal silicon chip, chemical liquid burn into plasma etching, gold can be used
Belong to the methods such as catalysis, laser ablation.
(3) phosphorus doping processing is carried out, N-type layer is formed on the front of silicon chip and through-hole wall top layer,
The method of doping can be using normal pressure diffusion, low pressure diffusion, ion implanting, impurity slurry coating etc., and dopant is
POCl3, PH3 or other phosphorous slurries etc..The method of doping can be using laser doping, low pressure diffusion, normal pressure diffusion, ion note
Enter or impurity slurry coating heat etc. mode.
(4) part heavy doping N+ areas, local heavy doping N+ areas array pattern are formed in the front of silicon chip by specific figure
It can be kind one-dimensional figure：Line segment, phantom line segments, camber line or grid line shape；Or X-Y scheme：Circle, ellipse, spindle, annular,
Polygon, polygonal or sector etc.；Or the combination of kind one-dimensional figure and X-Y scheme.
The line width of the kind one-dimensional geometric figure is 20~200um, and length is 0.05~1.5mm；Adjacent two with a line
Individual linear spacing is 0.5~2mm, and two neighboring linear spacing is 0.5~2mm in same row；
The size of the two-dimentional geometric figure is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
Film doping, local ion implanting, mask can be opened using secondary thermal diffusion, laser by forming the method for local heavy doping
Erosion or the coating of dopant local etc. are anti-carved, correspondingly, local heavy doping can be completed in the process for forming PN junction, can also
Completed in the processes such as etch cleaner, laser, printing.The sheet resistance of local heavily doped region is 20~60 Ω/.
(5) mask is made in through hole and neighboring area, to protect the doped layer of hole wall and positive face neighboring area.Use
Method is spraying or printing etc..Mask is the corrosion resistance chemical substances such as paraffin.
(6) phosphorosilicate glass, back of the body knot and mask of front side of silicon wafer are etched away, the method for etching can be using wet etching or dry
Method is etched.
(7) silicon chip after etching is made annealing treatment in the lehr, in one layer of fine and close heat of superficial growth of silicon chip
Silica, while the foreign atom of doped layer is redistributed.
(8) in the front of the P-type crystal silicon chip successively deposition 5~50nm front passivating film and subtracting for 50~100nm
Reflectance coating；Successively deposited at the back side of the P-type crystal silicon chip 5~40nm the first backside passivation film and 50~150nm the
Two backside passivation films.
Front passivating film can be one or more film stacks of the films such as silica, silicon nitride, silicon oxynitride, non-crystalline silicon
Layer；
Front surface antireflection film can be the films such as silicon nitride, silica, silicon oxynitride, titanium oxide, carborundum one kind or
A variety of pellicular cascades；
First backside passivation film can be one or more pellicular cascades of the films such as aluminum oxide, silica, non-crystalline silicon；
Second backside passivation film can be one or more film stacks of the films such as silicon nitride, silica, silicon oxynitride silicon
Layer.
(9) carry out opening film by the heavy doping figure described in step (4) in front using laser；On passivating film overleaf
Carry out opening film by special pattern, open film pattern for one or more groups of line segments being parallel to each other, length is 10~80mm, and width is 30
Spacing between~300um, two neighboring line segment is 1~4mm.
(10) following steps for manufacturing battery electrode：First the method such as silk-screen printing or plating is assisted overleaf to make using vacuum
Made pore electrod, via slurry fills up whole through hole, and via slurry is the silver paste that performance is worn without burn-through performance or low fever, is dried afterwards
It is dry；Then some back side positive pole main grid line electrodes for being parallel to each other and equidistantly arranging overleaf are made, preparation method can be used
Silk-screen printing, spray printing, plating or sputtering etc., the number of positive pole main gate line is 3~15, and the width of single positive pole main gate line is
0.5~5mm, the slurry that may be used is mainly silver paste or silver/aluminium paste, and pore electrod and back side positive pole main gate line electricity are crossed in production
Same silver paste extremely can be used, to simplify production technology, dries afterwards；Finally overleaf open film figure by laser and make the back side just
Superfine grid line, the just superfine grid line in each group of back side intersects vertically with least one back side positive pole main gate line, such as Fig. 4, preparation method
Can be using silk-screen printing, spray printing, plating or sputtering etc., the slurry that may be used is mainly aluminium paste or silver/aluminium paste, is dried afterwards.
(11) it is heat-treated at 300~900 DEG C, the just superfine grid line in the back side is formed good office with P-type silicon matrix
Portion's Ohmic contact, while being welded together with back side positive pole main gate line, constitutes the positive pole of battery.Via slurry through Overheating Treatment,
Formed pore electrod.
(12) sputtering, vapour deposition, 3D printing, printing or spraying coating process are used on positive antireflective coating/passivating film
Front transparent conducting film is made, the thickness control of nesa coating is in 50~500nm.
Nesa coating is one in ito thin film, AZO films, GZO films, FTO films, IWO films and graphene film
Plant or a variety of laminations are constituted.
Nesa coating constitutes the negative pole of battery with local heavily doped region and the electrical contact of via electrode tip.
Embodiment 1：
(1) on p type single crystal silicon piece using laser 5 × 5 through holes for equidistantly arranging of formation, single through hole it is a diameter of
300um。
(2) p type single crystal silicon piece incorgruous corrosion in 80 DEG C or so of KOH solution after through hole will be made, obtains surface gold
Word tower structure.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall top layer
Upper formation N-type layer, the sheet resistance after doping is 20 Ω/.
(4) paraffin is sprayed by array pattern and through hole in N-type layer using the method for ink-jet, is used as mask.Array pattern is
Spotted array, a diameter of 50um of a single point, spacing between points is 0.8mm.
(5) phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer are removed using wet etching.It is being sprayed with the array region of mask
Form heavy doping.
(6) silicon chip after etching is made annealing treatment at 650 DEG C in the lehr, in one layer of the superficial growth of silicon chip
Fine and close thermal oxidation silicon.
(7) 25nm aluminum oxide and 60nm silicon nitride are successively deposited using PECVD method at the back side of silicon chip；In silicon
The front deposition 80nm of piece silicon nitride.
(8) film is opened using array pattern of the laser in front as described in step (4)；Specific pattern is pressed on passivating film overleaf
Shape carries out opening film, and it is 5 groups of line segments for being parallel to each other to open film pattern, and length is 25mm, and width is 100um, two neighboring line segment it
Between spacing be 1.3mm.
(9) following steps for manufacturing battery electrode：1. the method for assisting silk-screen printing using vacuum overleaf makes via
Silver electrode, is dried afterwards；2. back side positive pole main gate line silver electrode, positive pole main gate line are overleaf made using the method for silk-screen printing
Number be 5, and the equidistant arrangement that is parallel to each other, the width of single positive pole main gate line is 2.5mm, is dried afterwards；3. use
The method of silk-screen printing overleaf opens film figure by laser and makes the just superfine alum gate line in the back side, dries afterwards.
(10) it is heat-treated at 300~900 DEG C, positive pole aluminium thin grid line in the back side is formed good with P-type silicon matrix
Ohmic contact, while being welded together with back side anode silver main gate line, constitutes the positive pole of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) sputtering method is used to make thickness on positive antireflective coating/passivating film conductive for 100nm transparent
Film, nesa coating is directly contacted at heavily doped region with silicon substrate, and local heavily doped region is connected to become into electronics collection
Assembly.
Embodiment 2：
(1) on p-type polysilicon piece using laser 6 × 6 through holes for equidistantly arranging of formation, single through hole it is a diameter of
200um。
(2) the p-type polysilicon piece after through hole will be made in dry plasma etching device, many shape micro-nano structures are obtained,
Surface modification is carried out in BOE solution afterwards.
(3) with PH3As impurity, it is doped, is made annealing treatment afterwards using the method for ion implanting, in silicon chip
N-type layer is formed on front and through-hole wall top layer, the sheet resistance after doping is 30 Ω/.
(4) paraffin is sprayed by array pattern and through hole in N-type layer using the method for ink-jet, is used as mask.Array pattern is
Line segment shape array, the length of line segment is 1.5mm, and width is 100um, and the spacing between line segment and line segment is 2mm.
(5) phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer are removed using wet etching.It is being sprayed with the array region of mask
Form heavy doping.
(6) silicon chip after etching is made annealing treatment at 650 DEG C in the lehr, in one layer of the superficial growth of silicon chip
Fine and close thermal oxidation silicon.
(7) 20nm silica and 60nm silicon nitride are successively deposited using PECVD method at the back side of silicon chip；In silicon
The front deposition 80nm of piece silicon nitride.
(8) film is opened using array pattern of the laser in front as described in step (4)；Specific pattern is pressed on passivating film overleaf
Shape carries out opening film, and it is 6 groups of line segments being parallel to each other to open film pattern, and length is 20mm, and width is 80um, between two neighboring line segment
Spacing be 1mm.
(9) following steps for manufacturing battery electrode：1. the method for assisting silk-screen printing using vacuum overleaf makes via
Silver electrode, is dried afterwards；2. back side positive pole main gate line silver electrode, positive pole main gate line are overleaf made using the method for silk-screen printing
Number be 6, and the equidistant arrangement that is parallel to each other, the width of single positive pole main gate line is 2mm, is dried afterwards；3. silk is used
The method of wire mark brush overleaf opens film figure by laser and makes the just superfine alum gate line in the back side, dries afterwards.
(10) it is heat-treated at 300~900 DEG C, positive pole aluminium thin grid line in the back side is formed good with P-type silicon matrix
Ohmic contact, while being welded together with back side anode silver main gate line, constitutes the positive pole of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) use the making thickness of vapour deposition transparent for 50nm graphene on positive antireflective coating/passivating film
Conducting film, nesa coating is directly contacted at heavily doped region with silicon substrate, and local heavily doped region is connected to become into electronics
The assembly of collection.
Embodiment 3：
(1) on p type single crystal silicon piece using laser 5 × 5 through holes for equidistantly arranging of formation, single through hole it is a diameter of
400um。
(2) the p type single crystal silicon piece after through hole will be made in 50 DEG C of Cu (NO3)2/H2O2Incorgruous corruption is carried out in/HF solution
Erosion, obtains surface inverted pyramid structure.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall top layer
Upper formation N-type layer.
(4) paraffin is sprayed in through hole using the method for ink-jet, is used as mask.
(5) phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer are removed using wet etching.
(6) 20nm aluminum oxide and 50nm silicon nitride are successively deposited using PECVD method at the back side of silicon chip；In silicon
The front of piece successively deposits 20nm silica and 60nm silicon nitride.
(7) phosphorus dopant that contains of array distribution is made using the method for silk-screen printing in front, array pattern is point-like battle array
Row, a diameter of 80um of a single point, spacing between points is 0.5mm.
(8) array pattern pressed in front in step (7) carries out INFRARED PULSE LASER IRRADIATION, in the region antireflective coating/passivation
Phosphorus atoms spread to silicon substrate while film gasification finish, in the local heavily doped region of front side of silicon wafer formation spotted array.
Film is opened by special pattern progress on the passivating film at the back side, it is 5 groups of line segments being parallel to each other to open film pattern, and length is 25mm, width
For 80um, the spacing between two neighboring line segment is 2mm.
(9) following steps for manufacturing battery electrode：
1. the method for assisting silk-screen printing using vacuum overleaf makes via silver electrode, dries afterwards；
2. back side positive pole main gate line silver electrode is overleaf made using the method for silk-screen printing, the number of positive pole main gate line is
5, and the equidistant arrangement that is parallel to each other, the width of single positive pole main gate line is 1.5mm, is dried afterwards；
3. film figure is overleaf opened by laser using the method for silk-screen printing and makes the just superfine alum gate line in the back side, dried afterwards
It is dry.
(10) it is heat-treated at 300~900 DEG C, positive pole aluminium thin grid line in the back side is formed good with P-type silicon matrix
Ohmic contact, while being welded together with back side anode silver main gate line, constitutes the positive pole of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) use the method for sputtering to make thickness on positive antireflective coating/passivating film to lead for 200nm AZO is transparent
Electrolemma, nesa coating is directly contacted at heavily doped region with silicon substrate, and local heavily doped region is connected to become into electronics receipts
The assembly of collection.
Embodiment 4：
(1) on p-type polysilicon piece using laser 6 × 6 through holes for equidistantly arranging of formation, single through hole it is a diameter of
350um。
(2) the p-type polysilicon piece after through hole will be made in dry plasma etching device, many shape micro-nano structures are obtained,
Surface modification is carried out in BOE solution afterwards.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall top layer
Upper formation N-type layer.
(4) PULSE HEATING is carried out by special pattern using laser on the phosphorosilicate glass that front is formed, makes the region phosphorus silicon
Phosphorus atoms in glass spread to silicon chip matrix, form heavy doping.The special pattern is line segment shape array, the length of single line segment
Spend for 3mm, width is 60um, the spacing between line segment and line segment is 0.8mm.
(5) paraffin is sprayed in through hole using the method for ink-jet, is used as mask.
(6) phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer are removed using wet etching.
(7) silicon chip after etching is made annealing treatment at 650 DEG C in the lehr, in one layer of the superficial growth of silicon chip
Fine and close thermal oxidation silicon.
(8) 20nm aluminum oxide and 60nm silicon nitride are successively deposited using PECVD method at the back side of silicon chip；In silicon
The front deposition 80nm of piece silicon nitride.
(9) anti-reflection on local heavily doped region is got rid of using array pattern of the laser in front as described in step (4)
Penetrate film/passivating film；Film is opened by special pattern progress on passivating film overleaf, it is 6 groups of line segments being parallel to each other to open film pattern, long
Spend for 20mm, width is 120um, the spacing between two neighboring line segment is 2mm.
(10) following steps for manufacturing battery electrode：
1. via silver electrode is made using electric plating method；
2. back side positive pole main gate line silver electrode is overleaf made using the method for evaporation, the number of positive pole main gate line is 6,
And the equidistant arrangement that is parallel to each other, the width of single positive pole main gate line is 2mm；
3. film figure is overleaf opened by laser using the method for evaporation and makes the just superfine alum gate line in the back side.
(11) it is heat-treated at 200~500 DEG C, improves the electric conductivity for the electrode that plating and evaporation make.
(12) use the method for sputtering to make thickness on positive antireflective coating/passivating film to lead for 200nm GZO is transparent
Electrolemma, nesa coating is directly contacted at heavily doped region with silicon substrate, and local heavily doped region is connected to become into electronics receipts
The assembly of collection.
Two-dimensional electrode is combined the invention provides a kind of local heavy doping/nesa coating of emitter stage, and it is brilliant with p-type
The two-sided PERC batteries of body silicon and MWT battery technology are combined, and form a kind of P-type crystal silicon back contacts without front gate line two-sided
Battery.The light that the novel battery not only completely avoid front metal electrode is blocked, and can also be prevented by the passivating film at the back side
Electrode roll can be obviously improved the conversion efficiency of P-type crystal silicon battery around rear electric leakage, and reduce silver paste in cell fabrication processes
Consumption, reduces production cost.
The technological thought of above content only to illustrate the invention, it is impossible to which protection scope of the present invention is limited with this, it is every to press
According to technological thought proposed by the present invention, any change done on the basis of technical scheme each falls within claims of the present invention
Protection domain within.
Claims (10)
1. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line, it is characterised in that P-type crystal silicon chip is from upper
And under include successively：Nesa coating (1), antireflective coating (2), front passivating film (3), N-type layer (5), p-type matrix (6), the back side
The just superfine grid line (8) in passivating film (7), the back side and back side positive pole main gate line (9), the P-type crystal silicon chip are provided with through hole, described
The pore electrod (10) excessively for connecting battery front side negative pole and back side negative pole is provided with through hole, the top layer of the N-type layer (5) is set
There are a local heavy doping N+ areas (4) being distributed by regular figure, the nesa coating (1) penetrates the antireflective coating (2) and just
Face passivating film (3) and the local heavy doping N+ areas (4) and the top electrical contact composition GND for crossing pore electrod (10), it is described
The electronics that nesa coating (1) is used to collect battery front side passes through the back side that the pore electrod (10) excessively is directed at battery, described
Backside passivation film (7) includes the first backside passivation film (7-1) and the second backside passivation film (7-2), the just superfine grid line in the back side
(8) first backside passivation film (7-1) and the second backside passivation film (7-2) are penetrated and forms local Europe with the p-type matrix (6)
Nurse is contacted, and is linked together composition anode with back side positive pole main gate line (9).
2. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 1, its feature exists
In：The hole size is identical, in P-type crystal silicon chip described in thickness direction insertion, waits the row such as line-spacing away from array arrangement, single institute
A diameter of 100~500um of through hole is stated, quantity is 4 × 4~10 × 10.
3. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 1, its feature exists
In, the just superfine grid line (8) in the back side is one or more groups of line segments being parallel to each other, and the length of the line segment is 10~80mm,
Width is that the spacing between 30~300um, two neighboring line segment is 1~4mm.
4. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 3, its feature exists
In：The just superfine grid line (8) in the back side is aluminium, silver, copper, nickel, conductive agent or metal alloy.
5. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 1, its feature exists
In：Local heavy doping N+ areas (4) array arrangement is in the N-type layer (5), the sheet resistance of the local heavy doping N+ areas (4)
For 20~60 Ω/, the array pattern of the local heavy doping N+ areas (4) is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
The combination of shape and X-Y scheme.
6. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 5, its feature exists
In the kind one-dimensional figure is line segment, phantom line segments, camber line or grid line shape；The line width of the kind one-dimensional figure is 20~200um,
Length is 0.05~1.5mm；It is 0.5~2mm with two neighboring linear spacing in a line, it is two neighboring linear in same row
Spacing is 0.5~2mm；
The X-Y scheme is circle, ellipse, spindle, annular, polygon, polygonal or sector, the two-dimensional geometry figure
The size of shape is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
7. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 1, its feature exists
In：The thickness of the nesa coating (1) is 50~500nm；The thickness of the antireflective coating (2) is 50~100nm；It is described just
The thickness of face passivating film (3) is 5~50nm, and the thickness of first backside passivation film (7-1) is 5~40nm；Second back of the body
The thickness of face passivating film (7-2) is 50~150nm.
8. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 1, its feature exists
In：The back side positive pole main gate line (9) is parallel to each other and equidistantly arranged, and phase vertical with the just superfine grid line (8) in the back side
Hand over, the number of the back side positive pole main gate line (9) is 3~15, the width of the single back side positive pole main gate line (9) is 0.5
~5mm.
9. a kind of P-type crystal silicon back contacts double-side cell structure without front gate line according to claim 8, its feature exists
In：The P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of silicon chip of many or multiple element of aluminium, the P-type crystal
The thickness of silicon chip is 90~190um.
10. a kind of method for preparing the P-type crystal silicon back contacts double-side cell structure without front gate line described in claim 1, its
It is characterised by, comprises the following steps：
S1, on P-type crystal silicon chip the through holes of some formed objects formed using laser, the through hole is in thickness direction insertion institute
P-type crystal silicon chip is stated, the row such as line-spacing are waited away from array arrangement；
S2, using chemical liquid burn into plasma etching, metal catalytic or laser etching method the P-type crystal silicon chip is entered
The processing of row surface-texturing；
S3, spread using low pressure, normal pressure diffusion, ion implanting, laser doping or impurity slurry coating method carry out phosphorus doping processing,
N-type layer is formed on the front of the P-type crystal silicon chip and through-hole wall top layer, dopant is POCl3、PH3Or phosphorus slurry；
S4, using laser doping, secondary thermal diffusion, local ion implanting, mask anti-carve erosion or dopant local coating process in institute
The front for stating P-type silicon piece forms local heavy doping, and the figure of the heavy doping is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
The combination of shape and X-Y scheme；
S5, paraffin mask, protection hole wall and positive face periphery made in the through hole and neighboring area using spraying or print process
The doped layer in region；
S6, it is etched away using wet etching or dry etching the positive phosphorosilicate glass of P-type crystal silicon chip, back of the body knot and covers
Film；
S7, the P-type crystal silicon chip after etching made annealing treatment in the lehr, in the table of the P-type crystal silicon chip
One layer of fine and close thermal oxidation silicon of length of looking unfamiliar, while the foreign atom of doped layer is redistributed；
S8, the antireflective in the front of the P-type crystal silicon chip successively 5~50nm of deposition front passivating film and 50~100nm
Film, in 5~150nm of backside deposition of P-type silicon piece backside passivation film, the front passivating film be silicon nitride, silica,
One or more laminations in silicon oxynitride, non-crystalline silicon are constituted, and the antireflective coating is silicon nitride, silica, silicon oxynitride, oxygen
The one or more laminations changed in titanium, carborundum are constituted, and the backside passivation film includes the first backside passivation film and second back side
Passivating film, first backside passivation film be aluminum oxide, silica, one or more pellicular cascades of amorphous silicon membrane, it is described
Second backside passivation film is silicon nitride, silica, one or more pellicular cascades of silicon oxynitride silicon thin film；
Film is opened in S9, the positive heavy doping figure progress by described in step S4 using laser in the P-type crystal silicon chip；Institute
State and carry out opening film in the backside passivation film of P-type crystal silicon chip, open film pattern for one or more groups of line segments being parallel to each other, length is
10~80mm, width is that the spacing between 30~300um, two neighboring line segment is 1~4mm；
S10, first use vacuum assist silk-screen printing or electro-plating method overleaf to make pore electrod, and via slurry fills up whole logical
Hole, via slurry is the silver paste that performance is worn without burn-through performance or low fever, is dried afterwards；Then silk-screen printing, spray printing, plating are used
Or sputtering method makes some back side positive pole main grid line electrodes for being parallel to each other and equidistantly arranging at the back side of the P-type silicon piece,
Slurry is silver paste or silver/aluminium paste, is dried afterwards；Finally using silk-screen printing, spray printing, plating or sputtering method in the P-type crystal
The back side of silicon chip opens film figure by laser and makes the just superfine grid line in the back side, and slurry is aluminium paste or silver/aluminium paste, is dried afterwards, is made
Battery electrode；
S11, it is heat-treated at 300~900 DEG C, makes the just superfine grid line in the back side and p-type matrix formation Ohmic contact, together
When be welded together with the back side positive pole main gate line, constitute battery positive pole, while via slurry was formed through Overheating Treatment
Pore electrod；
S12, on the positive antireflective coating of P-type crystal silicon chip, passivating film use sputtering, vapour deposition, 3D printing, printing
Or spraying coating process make front transparent conducting film, the nesa coating be ito thin film, AZO films, GZO films, FTO films,
One or more laminations in IWO films and graphene film are constituted, the nesa coating and local heavy doping N+ areas and mistake
The electrical contact of pore electrod top constitutes the negative pole of battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710184594.XA CN106997910B (en) | 2017-03-24 | 2017-03-24 | P-type crystal silicon back contacts double-side cell structure and production method without front gate line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710184594.XA CN106997910B (en) | 2017-03-24 | 2017-03-24 | P-type crystal silicon back contacts double-side cell structure and production method without front gate line |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106997910A true CN106997910A (en) | 2017-08-01 |
| CN106997910B CN106997910B (en) | 2018-07-06 |
Family
ID=59431387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710184594.XA Active CN106997910B (en) | 2017-03-24 | 2017-03-24 | P-type crystal silicon back contacts double-side cell structure and production method without front gate line |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106997910B (en) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107706246A (en) * | 2017-08-21 | 2018-02-16 | 无锡嘉瑞光伏有限公司 | The back of the body passivation solar cell and its manufacture method that a kind of back pastes directly burn |
| CN108133975A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium solar cell and preparation method thereof |
| CN108133976A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108133974A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium double-side solar cell and preparation method thereof |
| CN108172642A (en) * | 2018-01-29 | 2018-06-15 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium double-side solar cell and preparation method thereof |
| CN108172637A (en) * | 2018-01-29 | 2018-06-15 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108198905A (en) * | 2017-12-28 | 2018-06-22 | 南京日托光伏科技股份有限公司 | A kind of preparation method of the MWT solar cells of selection emitter |
| CN110112230A (en) * | 2019-03-29 | 2019-08-09 | 无锡日托光伏科技有限公司 | A kind of preparation method of MWT solar battery |
| CN111403306A (en) * | 2020-03-06 | 2020-07-10 | 泰州中来光电科技有限公司 | Method for testing contact resistivity of passivated contact structure |
| CN111403551A (en) * | 2020-03-24 | 2020-07-10 | 浙江爱旭太阳能科技有限公司 | Preparation method of high-efficiency monocrystalline silicon PERC solar cell |
| WO2022135543A1 (en) * | 2020-12-25 | 2022-06-30 | 通威太阳能（成都）有限公司 | Perc solar cell selective emitter, perc solar cell and manufacturing method therefor |
| CN115148837A (en) * | 2022-06-29 | 2022-10-04 | 浙江晶科能源有限公司 | Solar cell, preparation method thereof and photovoltaic module |
| WO2024152580A1 (en) * | 2023-01-16 | 2024-07-25 | 天合光能股份有限公司 | Solar cell |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080174028A1 (en) * | 2007-01-23 | 2008-07-24 | General Electric Company | Method and Apparatus For A Semiconductor Structure Forming At Least One Via |
| CN102132421A (en) * | 2009-03-25 | 2011-07-20 | Lg电子株式会社 | Solar cell and fabrication method thereof |
| CN102800740A (en) * | 2011-05-27 | 2012-11-28 | 苏州阿特斯阳光电力科技有限公司 | Manufacturing method of back contact crystalline silicon solar cell |
| CN103022174A (en) * | 2012-11-07 | 2013-04-03 | 浙江晶科能源有限公司 | Metal penetrated back emitter crystalline silicon solar cell based on n-type silicon chip and preparation method thereof |
| CN206672943U (en) * | 2017-03-24 | 2017-11-24 | 隆基乐叶光伏科技有限公司 | A kind of P-type crystal silicon back contacts double-side cell structure of no front gate line |
-
2017
- 2017-03-24 CN CN201710184594.XA patent/CN106997910B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080174028A1 (en) * | 2007-01-23 | 2008-07-24 | General Electric Company | Method and Apparatus For A Semiconductor Structure Forming At Least One Via |
| CN102132421A (en) * | 2009-03-25 | 2011-07-20 | Lg电子株式会社 | Solar cell and fabrication method thereof |
| CN102800740A (en) * | 2011-05-27 | 2012-11-28 | 苏州阿特斯阳光电力科技有限公司 | Manufacturing method of back contact crystalline silicon solar cell |
| CN103022174A (en) * | 2012-11-07 | 2013-04-03 | 浙江晶科能源有限公司 | Metal penetrated back emitter crystalline silicon solar cell based on n-type silicon chip and preparation method thereof |
| CN206672943U (en) * | 2017-03-24 | 2017-11-24 | 隆基乐叶光伏科技有限公司 | A kind of P-type crystal silicon back contacts double-side cell structure of no front gate line |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107706246A (en) * | 2017-08-21 | 2018-02-16 | 无锡嘉瑞光伏有限公司 | The back of the body passivation solar cell and its manufacture method that a kind of back pastes directly burn |
| CN108198905A (en) * | 2017-12-28 | 2018-06-22 | 南京日托光伏科技股份有限公司 | A kind of preparation method of the MWT solar cells of selection emitter |
| CN108133974A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium double-side solar cell and preparation method thereof |
| CN108133976A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108172642A (en) * | 2018-01-29 | 2018-06-15 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium double-side solar cell and preparation method thereof |
| CN108172637A (en) * | 2018-01-29 | 2018-06-15 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
| CN108133975A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of polycrystalline mixes gallium solar cell and preparation method thereof |
| CN108133975B (en) * | 2018-01-29 | 2024-06-07 | 泰州隆基乐叶光伏科技有限公司 | Polycrystalline gallium-doped solar cell and preparation method thereof |
| CN110112230A (en) * | 2019-03-29 | 2019-08-09 | 无锡日托光伏科技有限公司 | A kind of preparation method of MWT solar battery |
| CN111403306A (en) * | 2020-03-06 | 2020-07-10 | 泰州中来光电科技有限公司 | Method for testing contact resistivity of passivated contact structure |
| CN111403306B (en) * | 2020-03-06 | 2021-10-22 | 泰州中来光电科技有限公司 | Method for testing contact resistivity of passivated contact structure |
| CN111403551A (en) * | 2020-03-24 | 2020-07-10 | 浙江爱旭太阳能科技有限公司 | Preparation method of high-efficiency monocrystalline silicon PERC solar cell |
| WO2022135543A1 (en) * | 2020-12-25 | 2022-06-30 | 通威太阳能（成都）有限公司 | Perc solar cell selective emitter, perc solar cell and manufacturing method therefor |
| CN115148837A (en) * | 2022-06-29 | 2022-10-04 | 浙江晶科能源有限公司 | Solar cell, preparation method thereof and photovoltaic module |
| WO2024152580A1 (en) * | 2023-01-16 | 2024-07-25 | 天合光能股份有限公司 | Solar cell |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106997910B (en) | 2018-07-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106997910B (en) | P-type crystal silicon back contacts double-side cell structure and production method without front gate line | |
| CN106876491B (en) | The P-type crystal silicon back contact battery structure and production method of a kind of no front gate line | |
| CN106409956B (en) | A kind of N-type crystalline silicon double-sided solar battery structure and preparation method thereof | |
| CN105914249B (en) | All back-contact electrodes contact crystal silicon solar batteries structure and preparation method thereof | |
| CN105870215A (en) | Rear surface passivation contact battery electrode structure and preparation method thereof | |
| WO2023284771A1 (en) | Selective passivated contact cell and preparation method therefor | |
| CN105762205B (en) | A kind of P-type crystal silicon solar cell with transparency electrode and preparation method thereof | |
| CN106129133A (en) | A kind of all back-contact electrodes contact crystal silicon solar batteries structure and preparation method thereof | |
| CN102263159A (en) | Process for preparing n-type solar cell by utilizing boron-phosphorus coamplification | |
| CN109713065A (en) | A kind of passivation solar battery of type metal electrode and preparation method thereof | |
| CN106098807A (en) | A kind of N-type crystalline silicon solar battery structure and preparation method thereof | |
| CN109473492A (en) | It is suitble to the MWT hetero-junction silicon solar cell and preparation method thereof of scale volume production | |
| CN108666377A (en) | A kind of p-type back contacts solar cell and preparation method thereof | |
| CN209056507U (en) | A kind of MWT hetero-junction silicon solar cell | |
| CN206672943U (en) | A kind of P-type crystal silicon back contacts double-side cell structure of no front gate line | |
| CN107946408A (en) | A kind of preparation method of IBC solar cells | |
| CN208352305U (en) | A kind of p-type back contacts solar cell | |
| CN105870212B (en) | A kind of crystal silicon solar energy battery two-dimensional electrode and preparation method thereof | |
| CN205564766U (en) | P type crystalline silicon solar cells with two dimension electrode structure | |
| CN107046070A (en) | A kind of P-type crystal silicon battery structure and preparation method thereof | |
| CN105702757B (en) | A kind of crystal silicon solar energy battery electrically conducting transparent assembly and preparation method thereof | |
| CN103066135B (en) | Selective emitter solar battery that a kind of front electrode main grid line and silicon substrate are isolated and preparation method thereof | |
| CN206864480U (en) | A kind of P-type crystal silicon back contact battery structure of no front gate line | |
| CN105720114B (en) | A kind of quantum-cutting transparency electrode for crystal silicon solar energy battery | |
| CN206864485U (en) | A kind of P-type crystal silicon battery structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 710018 Shaanxi Province, Xi'an economic and Technological Development Zone is Jilu No. 8989 A block 6 layer Applicant after: Long base music Photovoltaic Technology Co., Ltd. Address before: 710199 No. 388, middle route, Xi'an, Shaanxi, Changan District Applicant before: LERRI SOLAR TECHNOLOGY CO., LTD. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190507 Address after: 239000 No. 19 Huaian Road, Chuzhou City, Anhui Province Patentee after: Chuzhou Longji Leye Photovoltaic Technology Co., Ltd. Address before: 710018 Six Floors of Block A, 898989 Shangji Road, Xi'an Economic and Technological Development Zone, Shaanxi Province Patentee before: Long base music Photovoltaic Technology Co., Ltd. |