CN106848012A - A kind of LED structure - Google Patents
A kind of LED structure Download PDFInfo
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- CN106848012A CN106848012A CN201710069331.4A CN201710069331A CN106848012A CN 106848012 A CN106848012 A CN 106848012A CN 201710069331 A CN201710069331 A CN 201710069331A CN 106848012 A CN106848012 A CN 106848012A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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Abstract
The invention discloses a kind of LED structure, including the second substrate, the 4th intrinsic semiconductor layer, the second N-type GaN layer, the second p-type GaN layer, the 5th intrinsic semiconductor layer, the second quantum well layer, the 6th intrinsic semiconductor layer and the 3rd N-type GaN layer for setting gradually from bottom to up.P-type GaN layer is placed in LED structure of the invention the inside of epitaxial wafer, and it is formed tunnel knot with the interface for setting N-type GaN layer thereunder, so then it is avoided that the contact of metal electrode and p-type GaN layer, the contact matching problem between electrode material and p-type conductance layer is solved, photoelectric transformation efficiency is improve.The present invention can be widely applied in semi-conductor electronic device field as a kind of LED structure.
Description
Technical field
The present invention relates to LED semi-conductor electronic devices, more particularly to a kind of LED structure.
Background technology
Semiconductor has strong influence as the basis of photoelectronic industry to the development of photoelectronic industry.And semiconductor
Effect of the electronic device played in social production practice is increasing, and development is also increasingly faster, wherein, GaN base semiconductor
It is referred to as the third generation semi-conducting material after first generation Si and second generation GaAs.The third generation semi-conducting material has forbidden band loose
Degree is big, electron drift velocity is fast, dielectric constant is small, good heat conductivity the advantages of, but with third generation semi-conductor photoelectronic device
Part technology it is increasingly mature, the problem for needing to be captured seems all the more difficult.
Now, the main flow structure of solid-state optoelectronic devices is still to be driven with electricity and comes real with epitaxial film P-N hetero-junctions
Existing various photoelectric functionals.For in terms of the electricity driving, it is still pursues point injection and delivery efficiency higher, and then improves
Photoelectricity（Electric light）Conversion efficiency, and this is just directly related to two kinds of important structural material researchs, one is the exploitation of P, N conductance layer
With the lifting of performance, it is another, be electrode material research and development and its with conductance layer contact matching.
At present, matched for the contact between electrode material and conductance layer, due between the P-type layer and electrode material of LED
Ohmic contact can not be formed, barrier layer is but formd, this greatly affected the migration in electronics and hole, substantially reduced photoelectricity and turn
Change efficiency.Although currently having employed one layer of ITO of plating in P-type layer（Tin indium oxide）Mode improved, but also not
Ohmic contact can fundamentally be solved the problems, such as.
The content of the invention
In order to solve the above-mentioned technical problem, it is an object of the invention to provide a kind of LED structure, fundamentally solve
Contact matching problem between electrode material and p-type conductance layer.
The technical solution adopted in the present invention is：A kind of LED structure, including second for setting gradually from bottom to up
Substrate, the 4th intrinsic semiconductor layer, the second N-type GaN layer, the second p-type GaN layer, the 5th intrinsic semiconductor layer, the second SQW
Layer, the 6th intrinsic semiconductor layer and the 3rd N-type GaN layer.
Further, second substrate is Sapphire Substrate.
Further, it is provided between the upper surface of second substrate and the lower surface of the 4th intrinsic semiconductor layer coarse
Layer.
Further, the growth temperature of the 4th intrinsic semiconductor layer is 1050 DEG C, the 4th intrinsic semiconductor layer
Growth time is 15 minutes.
Further, the thickness of the second N-type GaN layer is 2.3 microns ~ 2.6 microns.
Further, the growth temperature of the second N-type GaN layer is 1050 DEG C, the growth time of the second N-type GaN layer
It is 60 minutes.
Further, the growth temperature of the second p-type GaN layer is 950 DEG C, and the growth time of the second p-type GaN layer is
15 minutes.
Further, the growth temperature of the 5th intrinsic semiconductor layer is 1000 DEG C, the 5th intrinsic semiconductor layer
Growth time is 15 minutes.
Further, the growth temperature of the 6th intrinsic semiconductor layer is 900 DEG C, the life of the 6th intrinsic semiconductor layer
It is for a long time 15 minutes.
Further, the growth temperature of the 3rd N-type GaN layer is 1000 DEG C, the growth time of the 3rd N-type GaN layer
It is 20 minutes.
The beneficial effects of the invention are as follows：LED structure of the invention includes second for setting gradually from bottom to up
Substrate, the 4th intrinsic semiconductor layer, the second N-type GaN layer, the second p-type GaN layer, the 5th intrinsic semiconductor layer, the second SQW
Layer, the 6th intrinsic semiconductor layer and the 3rd N-type GaN layer, it can be seen that, LED structure of the invention is by p-type GaN layer
The inside of epitaxial wafer is placed in, and it is formed tunnel knot with the interface for setting N-type GaN layer thereunder, so can then kept away
Exempt from the contact of metal electrode and p-type GaN layer, and puncture carrier reverse tunnel after added electric field, form tunnel current, promote
The migration of electronics and hole, so as to improve photoelectric transformation efficiency.
Brief description of the drawings
Fig. 1 is the schematic diagram of traditional LED structure；
What Fig. 2 was directed to interface after P-type semiconductor in traditional LED is contacted with metal can band schematic diagram；
Fig. 3 is a kind of schematic diagram of LED structure of the invention.
1st, the second substrate；2nd, the 4th intrinsic semiconductor layer；3rd, the second N-type GaN layer；4th, the second p-type GaN layer；5th, the 5th
Levy semiconductor layer；6th, the second quantum well layer；7th, the 6th intrinsic semiconductor layer；8th, the 3rd N-type GaN types.
Specific embodiment
For the structure of traditional LED, as shown in figure 1, it includes setting gradually the first substrate, first from bottom to up
Intrinsic semiconductor layer, the first N-type GaN layer, the second intrinsic semiconductor layer, the first quantum well layer, the 3rd intrinsic semiconductor layer and
First p-type GaN layer.When needing to set electrode, in traditional LED, it will exposed after p-type GaN layer and etching
N-type GaN layer on electrode is set, wherein, the electrode uses ITO（Tin indium oxide）To realize.Now, because p-type GaN layer is set
Topmost, electrode and p-type GaN layer directly contact, as shown in Fig. 2 with electrode contact after p-type GaN layer interface energy band
There occurs bending, and because the work function of the work function always than p-type GaN material of front electrode material is small, the energy band of interface
Then can always be bent downwardly, cause the potential barrier in hole, form p-type barrier layer, i.e., resistance is formed between p-type GaN layer and electrode interface
Barrier, at this moment, direction of an electric field is pointed in vivo by surface, and applied field is also pointed in vivo, so by surface when LED works
Band can then be enabled more to bend, the potential barrier to hole is deeper, the migration of carrier is hindered to a greater degree, the performance to device is made
Into great harmful effect, make photoelectric transformation efficiency low.For this case, the present invention proposes a kind of new LED extensions
Chip architecture makes interface form barrier layer come the mismatch solved due to electrode material and p-type GaN material, so as to hinder current-carrying
The problem that son is transported.
As shown in figure 3, a kind of LED structure, the second substrate 1 that it includes setting gradually from bottom to up, the 4th
Levy semiconductor layer 2, the second N-type GaN layer 3, the second p-type GaN layer 4, the 5th intrinsic semiconductor layer 5, the second quantum well layer the 6, the 6th
The N-type GaN layer 8 of intrinsic semiconductor layer 7 and the 3rd；
For the second above-mentioned substrate 1, it is preferably Sapphire Substrate, i.e. alundum (Al2O3) crystal；
For the 4th above-mentioned intrinsic semiconductor layer 2, the 5th intrinsic semiconductor layer 5 and the 6th intrinsic semiconductor layer 7, they are non-
Doped gan layer, i.e., the GaN crystal do not adulterated；
For above-mentioned second N-type GaN layer 3 and the 3rd N-type GaN layer 8, they are the GaN layer of n-type doping, are with the Si that adulterates currently
Main flow is adulterated, and electronics is more sub, and hole is few son；
For above-mentioned second p-type GaN layer 4, it is the GaN layer of p-type doping, and currently with the Mg that adulterates as main flow is adulterated, hole is many
Son, electronics is few son；
For above-mentioned second quantum well layer 6, it includes 5 week that relatively thin GaN layer is arranged alternately with InGaN layer into periodicity
The SQW of phase, a GaN layer and InGaN layer are a cycle, wherein, the place of electronics and hole-recombination is active in quantum well layer
The luminous region in area, i.e. LED.
As the preferred embodiment of the present embodiment, the upper surface and the 4th intrinsic semiconductor layer 2 of second substrate 1 it
Between be provided with rough layer.
For above-mentioned LED structure, it is prepared using this growth apparatus of MOCVD, and it specifically grew
Cheng Wei：Grow on a sapphire substrate, be first nucleation process, 650 DEG C are grown 3 minutes in temperature, and temperature then is raised into 950
DEG C, growth rough layer 15 minutes；Then, temperature is raised to 1050 DEG C, carries out the growth of the 4th intrinsic semiconductor layer 2 of 15 minutes
（The growth temperature of i.e. described 4th intrinsic semiconductor layer 2 is 1050 DEG C, and the growth time of the 4th intrinsic semiconductor layer is 15
Minute）；And then, temperature is maintained into 1050 DEG C of second N-type GaN layers 3 of growth 60 minutes, thickness is about 2.5 microns（I.e. described
The growth temperature of two N-type GaN layers 3 is 1050 DEG C, and the growth time of the second N-type GaN layer 3 is 60 minutes）；Then, lower the temperature
The growth of the second p-type GaN layer 4 of 15 minutes is carried out to 950 DEG C（The growth temperature of i.e. described second p-type GaN layer 4 is 950 DEG C,
The growth time of the second p-type GaN layer 4 is 15 minutes）；Next, being warmed up to 1000 DEG C carries out 15 minutes the 5th intrinsic
The growth of semiconductor layer 5（The growth temperature of i.e. described 5th intrinsic semiconductor layer 5 is 1000 DEG C, the 5th intrinsic semiconductor
The growth time of layer 5 is 15 minutes）；Then for the growth of the second quantum well layer 6, it includes 5 SQWs in cycle
Growth, first cools to 700 DEG C and grows InGaN layer 3 minutes, is then warmed up to 850 DEG C and grows GaN7 minutes, and this is a cycle；Connect
, the growth of the 6th intrinsic semiconductor layer 7 of 15 minutes is carried out at 900 DEG C（The growth temperature of i.e. described 6th intrinsic semiconductor layer 7
It is 900 DEG C to spend, and the growth time of the 6th intrinsic semiconductor layer 7 is 15 minutes）；Finally, 1000 DEG C are warmed up to and grow 20 points
3rd N-type GaN layer 8 of clock（The growth temperature of i.e. described 3rd N-type GaN layer 8 is 1000 DEG C, the life of the 3rd N-type GaN layer 8
It is for a long time 20 minutes）.
Obtained by above-mentioned, LED structure of the present invention is built-in by p-type GaN layer, make it there is no any connecing with electrode material
Touch, solve is made interface form barrier layer and hindered the defeated of carrier due to electrode material and the mismatch of p-type GaN material
Fortune problem, and tunnel knot is formd with N-type GaN layer, puncture carrier reverse tunnel after added electric field, form tunnel electricity
Stream, promotes the migration in electronics and hole, so as to improve photoelectric transformation efficiency.
Above is preferable implementation of the invention is illustrated, but the invention is not limited to the implementation
Example, those of ordinary skill in the art can also make a variety of equivalent variations or replace on the premise of without prejudice to spirit of the invention
Change, these equivalent deformations or replacement are all contained in the application claim limited range.
Claims (10)
1. a kind of LED structure, it is characterised in that：Including the second substrate, the 4th intrinsic half that set gradually from bottom to up
Conductor layer, the second N-type GaN layer, the second p-type GaN layer, the 5th intrinsic semiconductor layer, the second quantum well layer, the 6th intrinsic semiconductor
Layer and the 3rd N-type GaN layer.
2. a kind of LED structure according to claim 1, it is characterised in that：Second substrate is Sapphire Substrate.
3. a kind of LED structure according to claim 1, it is characterised in that：The upper surface of second substrate and the
Rough layer is provided between the lower surface of four intrinsic semiconductor layers.
4. a kind of LED structure according to claim any one of 1-3, it is characterised in that：Described 4th intrinsic partly leads
The growth temperature of body layer is 1050 DEG C, and the growth time of the 4th intrinsic semiconductor layer is 15 minutes.
5. a kind of LED structure according to claim any one of 1-3, it is characterised in that：The second N-type GaN layer
Thickness be 2.3 microns ~ 2.6 microns.
6. a kind of LED structure according to claim 4, it is characterised in that：The growth temperature of the second N-type GaN layer
It is 1050 DEG C to spend, and the growth time of the second N-type GaN layer is 60 minutes.
7. a kind of LED structure according to claim any one of 1-3, it is characterised in that：The second p-type GaN layer
Growth temperature be 950 DEG C, the growth time of the second p-type GaN layer is 15 minutes.
8. a kind of LED structure according to claim any one of 1-3, it is characterised in that：Described 5th intrinsic partly leads
The growth temperature of body layer is 1000 DEG C, and the growth time of the 5th intrinsic semiconductor layer is 15 minutes.
9. a kind of LED structure according to claim any one of 1-3, it is characterised in that：Described 6th intrinsic partly leads
The growth temperature of body layer is 900 DEG C, and the growth time of the 6th intrinsic semiconductor layer is 15 minutes.
10. a kind of LED structure according to claim any one of 1-3, it is characterised in that：The 3rd N-type GaN layer
Growth temperature be 1000 DEG C, the growth time of the 3rd N-type GaN layer is 20 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710069331.4A CN106848012A (en) | 2017-02-08 | 2017-02-08 | A kind of LED structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710069331.4A CN106848012A (en) | 2017-02-08 | 2017-02-08 | A kind of LED structure |
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| Publication Number | Publication Date |
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| CN106848012A true CN106848012A (en) | 2017-06-13 |
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| CN201710069331.4A Pending CN106848012A (en) | 2017-02-08 | 2017-02-08 | A kind of LED structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109378367A (en) * | 2018-10-30 | 2019-02-22 | 广东工业大学 | A kind of light emitting diode and preparation method thereof |
| CN109449263A (en) * | 2018-10-30 | 2019-03-08 | 广东工业大学 | A kind of light emitting diode and preparation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1353466A (en) * | 2000-11-10 | 2002-06-12 | 晶元光电股份有限公司 | LED with reverse tunnel layer |
| CN101140974A (en) * | 2007-09-17 | 2008-03-12 | 周瓴 | Semi-conductor solid-state light source device |
| CN103489975A (en) * | 2013-10-08 | 2014-01-01 | 东南大学 | Nitrogen polar surface light emitting diode with tunnel junction structure |
-
2017
- 2017-02-08 CN CN201710069331.4A patent/CN106848012A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1353466A (en) * | 2000-11-10 | 2002-06-12 | 晶元光电股份有限公司 | LED with reverse tunnel layer |
| CN101140974A (en) * | 2007-09-17 | 2008-03-12 | 周瓴 | Semi-conductor solid-state light source device |
| CN103489975A (en) * | 2013-10-08 | 2014-01-01 | 东南大学 | Nitrogen polar surface light emitting diode with tunnel junction structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109378367A (en) * | 2018-10-30 | 2019-02-22 | 广东工业大学 | A kind of light emitting diode and preparation method thereof |
| CN109449263A (en) * | 2018-10-30 | 2019-03-08 | 广东工业大学 | A kind of light emitting diode and preparation method thereof |
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Application publication date: 20170613 |
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