CN106847829A - 一种阵列基板及阵列基板的制作方法 - Google Patents
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- 239000002184 metal Substances 0.000 claims abstract description 163
- 229910052751 metal Inorganic materials 0.000 claims abstract description 163
- 230000004888 barrier function Effects 0.000 claims abstract description 65
- 239000000758 substrate Substances 0.000 claims abstract description 61
- 230000003071 parasitic effect Effects 0.000 claims abstract description 16
- 239000010409 thin film Substances 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 9
- 238000000059 patterning Methods 0.000 claims description 9
- 229910010272 inorganic material Inorganic materials 0.000 claims description 4
- 239000011147 inorganic material Substances 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 3
- 239000012774 insulation material Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 16
- 230000000694 effects Effects 0.000 abstract description 10
- 238000010586 diagram Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000024241 parasitism Effects 0.000 description 1
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Abstract
本发明提供一种阵列基板及阵列基板的制作方法,包括:衬底基板、第一金属层、第一绝缘层、有源层、第二金属层以及阻隔层;其中,阻隔层,设置在所述第一绝缘层与所述第二金属层之间,用以增加所述第一金属层与所述第二金属层交叠处的所述第一金属层与所述第二金属层之间的距离,降低所述第一金属层与所述第二金属层形成的寄生电容的电容值。本发明的阵列基板及阵列基板的制作方法通过设置阻隔层,从而增加在第一金属层与第二金属层交叠处的第一金属层与第二金属层之间的距离,降低第一金属层与第二金属层形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
Description
技术领域
本发明涉及液晶显示器的制造领域,尤其涉及一种阵列基板及阵列基板的制作方法。
背景技术
液晶显示器是目前使用最广泛的一种平板显示器,可为各种电子设备如移动电话、个人数字助理(PDA)、数字相机、计算机或笔记本等提供具有高分辨率的彩色屏幕。
液晶显示面板是液晶显示器最主要的组成配件,其包括第一基板、第二基板、设置在两者之间的液晶层。其中,第一基板为阵列基板,参阅图1,图1为现有的液晶显示面板的阵列基板的俯视结构示意图,其包括:第一金属层、第一绝缘层、有源层、第二金属层以及像素电极层;第一金属层用于形成扫描线102以及薄膜晶体管103的栅极1033;第一绝缘层(图中未标示),设置在第一金属层上,用以隔离第一金属层以及有源层;有源层,设置在第一绝缘层上,用以形成薄膜晶体管103的导电沟道1034;第二金属层,设置在有源层上,用以形成数据线101、薄膜晶体管103的源极1031以及薄膜晶体管103的漏极1032;像素电极层设置在第二金属层上,用于形成像素电极104,其通过一通孔与薄膜晶体管103的漏极1032连接。
然而,由于第一金属层与第二金属层之间的距离较短,在第一金属层与第二金属层重叠处105容易形成寄生电容,从而降低像素的充电率,进而影响液晶显示器的显示效果和品质。
故,有必要提供一种阵列基板及阵列基板的制作方法,以解决现有技术所存在的问题。
发明内容
本发明的目的在于提供一种阵列基板及阵列基板的制作方法,以解决现有的阵列基板由于第一金属层与第二金属层之间的距离较短,在第一金属层与第二金属层交叠区域容易形成寄生电容,从而降低像素的充电率,进而影响液晶显示器的显示效果和品质的技术问题。
本发明提供一种阵列基板,包括:
衬底基板;
第一金属层,设置在所述衬底基板上,用以形成扫描线以及薄膜晶体管的栅极;
第一绝缘层,设置在所述第一金属层上,用以隔离所述第一金属层以及有源层;
所述有源层,设置在所述第一绝缘层上,用以形成所述薄膜晶体管的导电沟道;
第二金属层,设置在所述有源层上,用以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极;以及,
阻隔层,设置在所述第一绝缘层与所述第二金属层之间,用以增加所述第一金属层与所述第二金属层交叠处的所述第一金属层与所述第二金属层之间的距离,降低所述第一金属层与所述第二金属层形成的寄生电容的电容值。
在本发明的阵列基板中,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影位于所述阻隔层在所述衬底基板的投影内。
在本发明的阵列基板中,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影与所述阻隔层在所述衬底基板上的投影重合。
在本发明的阵列基板中,所述衬底基板包括第一区域以及第二区域,所述薄膜晶体管在所述衬底基板上的投影与所述第一区域重合,所述阻隔层在所述衬底基板上的投影与所述第二区域重合。
在本发明的阵列基板中,所述阻隔层的厚度介于3微米至5微米之间。
在本发明的阵列基板中,所述阻隔层为无机材料或有机绝缘材料。
依据上述目的,本发明还提供一种阵列基板的制作方法,包括:
在衬底基板上沉积第一金属层,并通过构图工艺形成扫描线以及薄膜晶体管的栅极;
在所述第一金属层上沉积第一绝缘层;
在所述第一绝缘层沉积有源层,并通过构图工艺形成所述薄膜晶体管的导电沟道;
在所述有源层上沉积第二金属层,并通过构图工艺形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极;以及,
在所述第一绝缘层与所述第二金属层之间形成一阻隔层,用以增加所述第一金属层与所述第二金属层交接区域的距离,降低所述第一金属层与所述第二金属层形成的寄生电容的电容值。
在本发明的阵列基板的制作方法中,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影位于所述阻隔层在所述衬底基板的投影内。
在本发明的阵列基板的制作方法中,所述第一金属层与所述第二金属层交接区域在所述衬底基板上的投影区域与所述阻隔层在所述衬底基板上的投影区域重合。
在本发明的阵列基板的制作方法中,所述衬底基板包括第一区域以及第二区域,所述薄膜晶体管在所述衬底基板上的投影与所述第一区域重合,所述阻隔层在所述衬底基板上的投影与所述第二区域重合。
本发明的阵列基板及阵列基板的制作方法通过设置阻隔层,从而增加在第一金属层与第二金属层交叠处的第一金属层与第二金属层之间的距离,降低第一金属层与第二金属层形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合所附图式,作详细说明如下:
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
图1为现有的液晶显示面板的阵列基板的俯视结构示意图;
图2为本发明的阵列基板的第一优选实施例的结构示意图;
图3为本发明的阵列基板的第二优选实施例的结构示意图;
图4为本发明的阵列基板的制作方法的工艺流程示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。在图中,结构相似的单元是以相同标号表示。需要说明的是,本发明的目的在于在第一金属层和第二金属层之间设置一阻隔层,用以增加第一金属层与第二金属层交叠处的第一金属层与第二金属层之间的距离,降低第一金属层与第二金属层形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
参阅图2,图2为本发明的阵列基板的第一优选实施例的结构示意图。如图2所示,本优选实施例的阵列基板包括:衬底基板201、第一金属层202、第一绝缘层203、有源层204、第二金属层205以及阻隔层206。
第一金属层202设置在衬底基板201上,用以形成扫描线2081以及薄膜晶体管207的栅极2071;第一绝缘层203,设置在第一金属层202上,用以隔离第一金属层202以及有源层204;有源层204,设置在第一绝缘层203上,用以形成薄膜晶体管207的导电沟道2072;第二金属层205,设置在有源层204上,用以形成数据线2082、薄膜晶体管207的源极2073以及薄膜晶体管207的漏极2074;阻隔层206,设置在第一绝缘层203与第二金属层205之间,用以增加第一金属层202与第二金属层205交叠处208的第一金属层202与第二金属层205之间的距离,从而降低第一金属层202与第二金属层205形成的寄生电容的电容值。
优选的,该阵列基板上的阻隔层206的厚度介于3微米至5微米之间;该阵列基板上的阻隔层206为无机材料或有机绝缘材料。
进一步的,该阵列基板上的第一金属层202与第二金属层205交叠处208在衬底基板201上的投影位于阻隔层206201上在衬底基板的投影内。
优选的,该阵列基板上的第一金属层202与第二金属层205交叠处208在衬底基板201上的投影与阻隔层206在衬底基板201上的投影重合。
因此,本优选实施例的阵列基板通过设置阻隔层206,从而增加第一金属层202与第二金属层205交叠处208的第一金属层202与第二金属层205之间的距离,降低第一金属层202与第二金属层205形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
参阅图3,图3为本发明的阵列基板的第二优选实施例的结构示意图。如图3所示,本优选实施例的阵列基板包括:衬底基板301、第一金属层302、第一绝缘层303、有源层304、第二金属层305以及阻隔层306。
第一金属层302设置在衬底基板301上,用以形成扫描线3081以及薄膜晶体管307的栅极3071;第一绝缘层303,设置在第一金属层302上,用以隔离第一金属层302以及有源层304;有源层304,设置在第一绝缘层303上,用以形成薄膜晶体管307的导电沟道3072;第二金属层305,设置在有源层304上,用以形成数据,3082、薄膜晶体管307的源极3073以及薄膜晶体管307的漏极3074;阻隔层306,设置在第一绝缘层303与第二金属层305之间,用以增加第一金属层302与第二金属层305交叠处308的第一金属层302与第二金属层305之间的距离,从而降低第一金属层302与第二金属层305形成的寄生电容的电容值。
优选的,该阵列基板上的阻隔层306的厚度介于3微米至5微米之间;该阵列基板上的阻隔层306为无机材料或有机绝缘材料。
进一步的,该阵列基板上的第一金属层302与第二金属层305交叠处308在衬底基板上的投影位于阻隔层306在衬底基板301上的投影内。
优选的,衬底基板301包括第一区域以及第二区域,薄膜晶体管307在衬底基板301上的投影与第一区域重合,阻隔层306在衬底基板302上的投影与第二区域重合。
因此,本优选实施例的阵列基板通过设置阻隔层,从而增加第一金属层302与第二金属层305交叠处308的第一金属层302与第二金属层305之间的距离,降低第一金属层302与第二金属层305形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
参阅图4,图4为本发明的阵列基板的制作方法的工艺流程示意图。本发明实施例还提供上述阵列基板的制作方法,包括:
步骤S401,在衬底基板上沉积第一金属层,并通过构图工艺形成扫描线以及薄膜晶体管的栅极;
步骤S402,在第一金属层上沉积第一绝缘层;
步骤S403,在第一绝缘层沉积有源层,并通过构图工艺形成薄膜晶体管的导电沟道;
步骤S404,在所有源层上沉积第二金属层,并通过构图工艺形成数据线、薄膜晶体管的源极以及薄膜晶体管的漏极;以及,
步骤S405,在所第一绝缘层与所述第二金属层之间形成一阻隔层,用以增加第一金属层与第二金属层交接区域的距离,降低第一金属层与第二金属层形成的寄生电容的电容值。
优选的,第一金属层与第二金属层交叠处在衬底基板上的投影位于阻隔层在衬底基板的投影内。
优选的,第一金属层与所述第二金属层交接区域在衬底基板上的投影区域与阻隔层在衬底基板上的投影区域重合。
优选的,衬底基板包括第一区域以及第二区域,薄膜晶体管在衬底基板上的投影与第一区域重合,阻隔层在所述衬底基板上的投影与第二区域重合。
本优选实施例的阵列基板的制作方法通过设置阻隔层,从而增加在第一金属层与第二金属层交叠处的第一金属层与第二金属层之间的距离,降低第一金属层与第二金属层形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
本发明的阵列基板及阵列基板的制作方法通过设置阻隔层,从而增加在第一金属层与第二金属层交叠处的第一金属层与第二金属层之间的距离,降低第一金属层与第二金属层形成的寄生电容的电容值,从而提升像素的充电率,进而提高液晶显示器的显示效果和品质。
综上,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。
Claims (10)
1.一种阵列基板,其特征在于,包括:
衬底基板;
第一金属层,设置在所述衬底基板上,用以形成扫描线以及薄膜晶体管的栅极;
第一绝缘层,设置在所述第一金属层上,用以隔离所述第一金属层以及有源层;
所述有源层,设置在所述第一绝缘层上,用以形成所述薄膜晶体管的导电沟道;
第二金属层,设置在所述有源层上,用以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极;以及,
阻隔层,设置在所述第一绝缘层与所述第二金属层之间,用以增加所述第一金属层与所述第二金属层交叠处的所述第一金属层与所述第二金属层之间的距离,降低所述第一金属层与所述第二金属层形成的寄生电容的电容值。
2.根据权利要求1所述的阵列基板,其特征在于,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影位于所述阻隔层在所述衬底基板的投影内。
3.根据权利要求2所述的阵列基板,其特征在于,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影与所述阻隔层在所述衬底基板上的投影重合。
4.根据权利要求2所述的阵列基板,其特征在于,所述衬底基板包括第一区域以及第二区域,所述薄膜晶体管在所述衬底基板上的投影与所述第一区域重合,所述阻隔层在所述衬底基板上的投影与所述第二区域重合。
5.根据权利要求1所述的阵列基板,其特征在于,所述阻隔层的厚度介于3微米至5微米之间。
6.根据权利要求1所述的阵列基板,其特征在于,所述阻隔层为无机材料或有机绝缘材料。
7.一种阵列基板的制作方法,其特征在于,包括:
在衬底基板上沉积第一金属层,并通过构图工艺形成扫描线以及薄膜晶体管的栅极;
在所述第一金属层上沉积第一绝缘层;
在所述第一绝缘层沉积有源层,并通过构图工艺形成所述薄膜晶体管的导电沟道;
在所述有源层上沉积第二金属层,并通过构图工艺形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极;以及,
在所述第一绝缘层与所述第二金属层之间形成一阻隔层,用以增加所述第一金属层与所述第二金属层交接区域的距离,降低所述第一金属层与所述第二金属层形成的寄生电容的电容值。
8.根据权利要求7所述的阵列基板的制作方法,其特征在于,所述第一金属层与所述第二金属层交叠处在所述衬底基板上的投影位于所述阻隔层在所述衬底基板的投影内。
9.根据权利要求8所述的阵列基板的制作方法,其特征在于,所述第一金属层与所述第二金属层交接区域在所述衬底基板上的投影区域与所述阻隔层在所述衬底基板上的投影区域重合。
10.根据权利要求8所述的阵列基板的制作方法,其特征在于,所述衬底基板包括第一区域以及第二区域,所述薄膜晶体管在所述衬底基板上的投影与所述第一区域重合,所述阻隔层在所述衬底基板上的投影与所述第二区域重合。
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