CN106505092B - 一种垂直型半导体器件的双面终端结构 - Google Patents

一种垂直型半导体器件的双面终端结构 Download PDF

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CN106505092B
CN106505092B CN201610685489.XA CN201610685489A CN106505092B CN 106505092 B CN106505092 B CN 106505092B CN 201610685489 A CN201610685489 A CN 201610685489A CN 106505092 B CN106505092 B CN 106505092B
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温家良
崔磊
徐哲
金锐
王耀华
赵哿
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Global Energy Interconnection Research Institute
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
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Abstract

本发明提供一种垂直型半导体器件的双面终端结构,所述垂直型半导体器件为双极型晶体管、晶闸管、MOSFET、IGBT、MOSFET派生器件、IGBT派生器件或晶闸管派生器件;所述双面终端结构包括元胞区、终端区、阴极、门极和阳极;所述终端区包括正面终端和背面终端;所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和门极沉积在所述元胞区的正面,所述阳极沉积在所述元胞区的背面。本发明提供的垂直型半导体器件的双面终端结构,在传统的正面终端基础上增加了背面终端结构,形成了双面终端结构,在不增加终端面积的前提下,提高了终端的整体耐压能力,提高了终端结构的效率。

Description

一种垂直型半导体器件的双面终端结构
技术领域
本发明涉及一种半导体器件,具体涉及一种垂直型半导体器件的双面终端结构。
背景技术
终端结构的设计是半导体器件的关键技术之一,与器件的击穿电压密切相关。
在半导体器件反偏耐压时,器件内部的pn结扩展延伸致表面,使表面的峰值电场高于体内,导致击穿发生在表面,同时,当碰撞电离在表面发生时,电离过程产生的热载流子易进入钝化层,在钝化层内部形成固定电荷,改变电场分布,使器件性能不稳定,可靠性下降。
终端技术是降低表面电场、提高终端耐压的直接方法,目前,对于垂直型半导体器件来讲,终端区的结构设计主要集中在芯片的正面,芯片的背面整体为同电位的阳极,而终端的耐压主要指阳极和阴极之间的电位差,由于垂直型器件芯片边缘通常不完全耗尽,因此,在芯片正表面的边缘与底部阳极同电位,随着耐压等级的提高,终端的尺寸逐渐增大,在芯片总面积一定的情况下,芯片通流区的面积随之减小。
并且,传统的晶闸管器件仅仅在硅晶圆的最外环设计终端结构,其整体的面积占比非常小,而新型功率器件如IGBT器件通常采用多芯片并联形式,每个芯片都包含元胞区和终端区,如一个6英寸硅片上通常制作60个左右的IGBT芯片,其终端区占有的面积较高,直接影响整体晶圆的通流效率。因此,减少终端区的面积,提高其终端效率,是目前功率器件技术发展的重要方向之一。
发明内容
为了提高终端结构的效率,增加相同面积情况下的耐压能力,本发明提供一种垂直型半导体器件的双面终端结构,在传统的正面终端基础上增加了背面终端结构,形成了双面终端结构,在不增加终端面积的前提下,提高了终端的整体耐压能力,提高了终端结构的效率。
为了实现上述发明目的,本发明采取如下技术方案:
本发明提供一种垂直型半导体器件的双面终端结构,所述垂直型半导体器件为双极型晶体管、晶闸管、MOSFET、IGBT、MOSFET派生器件、IGBT派生器件或晶闸管派生器件;
所述双面终端结构包括元胞区、终端区、阴极、门极和阳极;所述终端区包括正面终端和背面终端;
所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和门极沉积在所述元胞区的正面,所述阳极沉积在所述元胞区的背面。
所述双极型晶体管和晶闸管的门极与半导体直接接触,经退火处理后形成欧姆接触电极。
所述门极采用金属-氧化层-半导体结构。
所述阴极和门极交替排列;
所述阴极和阳极分别经退火处理后形成欧姆接触电极。
所述背面终端为平面结终端结构、带浮空场环的平面结终端结构、带场板的平面结终端结构、带场板与场环的平面结终端结构、结终端扩展结构或半导体绝缘多晶硅结构。
所述元胞区采用SiC、GaN或Ge半导体单晶材料构成。
本发明还提供一种垂直型半导体器件的双面终端结构,所述垂直型半导体器件为二极管,所述双面终端结构包括包括元胞区、终端区、阴极和阳极;
所述终端区包括正面终端和背面终端;
所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和阳极分别沉积在所述元胞区的正面和背面。
所述背面终端为平面结终端结构、带浮空场环的平面结终端结构、带场板的平面结终端结构、带场板与场环的平面结终端结构、结终端扩展结构或半导体绝缘多晶硅结构。
所述元胞区采用SiC、GaN或Ge半导体单晶材料构成。
与最接近的现有技术相比,本发明提供的技术方案具有以下有益效果:
1)本发明提出的背面终端结构设计,是在不改变正面终端耐压和面积的前提下,增加了背面的终端结构设计,形成双面终端;该结构的背面终端设计可以设计为场环、场板及其复合机构等多种终端结构类型,与正面终端结构不存在设计上的矛盾,主要取决于器件的耐压参数需求和背面工艺兼容性,由于阳极金属缩小至有源区,正面终端和背面终端结构等价于串联在器件的阳极和阴极之间,增加的背面终端结构的耐压就体现为器件整体耐压的提高。因此,双面终端结构可以在不改变正面有源区和终端区占比的情况下,提高半导体器件的整体耐压,即提高了其终端结构的效率;
2)垂直型半导体器件的背面沉积阳极金属,经退火工艺形成整面的欧姆接触电极,阳极与背面终端不直接相连,与传统结构相比,背面终端结构替代了该处的阳极电极;
3)该双面终端结构将正面终端区域对应的背面阳极部分替换成终端结构,大幅度降低该处的电流流入和载流子注入,减小了有源区边缘元胞的电流不均匀性,提高了器件整体的动静态均匀性。
附图说明
图1是本发明实施例1中垂直型半导体器件的双面终端结构图;
其中,1-阴极,2-门极,3-阳极,4-正面终端,5-背面终端,6-元胞区。
具体实施方式
下面结合附图对本发明作进一步详细说明。
对于垂直型半导体器件来说,终端区的结构设计主要目的是降低元胞区边缘外侧材料表面的电场,避免发生器件边缘表面电场过高而出现局部击穿,目前的垂直型半导体器件的通常只在正面设计有终端结构。由于芯片的整体尺寸有限,终端面积减小有利于有源区面积的增大,有源区是器件电流通断的主要区域,降低终端面积、提高有源区的占比是提高器件电流特性直接有效的办法。但是经过相关研究学者的多年设计和优化,器件正面终端结构已经逐渐接近理论极限,提升空间很小。本发明在传统的背面阳极金属结构基础上增加了背面终端结构设计,阳极电极缩小至有源区。一方面可以在不改变终端区面积的情况下提高半导体器件的整体耐压,另一方面降低了器件元胞区边缘部分的载流子不均匀性,提高了器件的动静态均匀性。由于器件在反偏时,耗尽区由正面反偏的主PN结逐渐向下扩展,只有在耗尽区扩展到背面终端结构时该结构才会起到分担部分耐压、提高整体耐压的作用。
本发明提供的垂直型半导体器件的双面终端结构,在传统的正面终端基础上增加了背面终端结构,形成了双面终端结构,在不增加终端面积的前提下,提高了终端的整体耐压能力,提高了终端结构的效率。
实施例1
以双极型晶体管、晶闸管、MOSFET、IGBT、MOSFET派生器件、IGBT派生器件或晶闸管派生器件等垂直型半导体器件为例,说明垂直型半导体器件的双面终端结构。
双面终端结构包括元胞区、终端区、阴极、门极和阳极;所述终端区包括正面终端和背面终端;
所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和门极沉积在所述元胞区的正面,所述阳极沉积在所述元胞区的背面。
所述双极型晶体管和晶闸管的门极与半导体直接接触,经退火处理后形成欧姆接触电极。
所述门极采用金属-氧化层-半导体结构。
所述阴极和门极交替排列;
所述阴极和阳极分别经退火处理后形成欧姆接触电极。
所述背面终端为平面结终端结构、带浮空场环的平面结终端结构、带场板的平面结终端结构、带场板与场环的平面结终端结构、结终端扩展结构或半导体绝缘多晶硅结构。
所述元胞区采用SiC、GaN或Ge半导体单晶材料构成。
终端区采用本发明提出的双面终端结构,可以在不增大终端面积的前提下增加垂直型半导体器件的耐受电压。
实施例2
以垂直型半导体器件为二极管,说明垂直型半导体器件的双面终端结构。
所述双面终端结构包括包括元胞区、终端区、阴极和阳极;
所述终端区包括正面终端和背面终端;
所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和阳极分别沉积在所述元胞区的正面和背面。
所述背面终端为平面结终端结构、带浮空场环的平面结终端结构、带场板的平面结终端结构、带场板与场环的平面结终端结构、结终端扩展结构或半导体绝缘多晶硅结构。
所述元胞区采用SiC、GaN或Ge半导体单晶材料构成。
终端区采用本发明提出的双面终端结构,可以在不增大终端面积的前提下增加二极管的耐受电压。
最后应当说明的是:以上实施例仅用以说明本发明的技术方案而非对其限制,所属领域的普通技术人员参照上述实施例依然可以对本发明的具体实施方式进行修改或者等同替换,这些未脱离本发明精神和范围的任何修改或者等同替换,均在申请待批的本发明的权利要求保护范围之内。

Claims (4)

1.一种垂直型半导体器件的双面终端结构,其特征在于,所述双面终端结构包括元胞区、终端区、阴极、门极和阳极;
所述终端区包括正面终端和背面终端;
所述正面终端和背面终端环绕在所述元胞区周围,所述阴极和门极沉积在所述元胞区的正面,所述阳极沉积在所述元胞区的背面;
所述背面终端为带浮空场环的平面结终端结构、带场板的平面结终端结构、带场板与场环的平面结终端结构、结终端扩展结构或半导体绝缘多晶硅结构;
所述垂直型半导体器件为MOSFET。
2.根据权利要求1所述的垂直型半导体器件的双面终端结构,其特征在于,所述门极采用金属-氧化层-半导体结构。
3.根据权利要求1所述的垂直型半导体器件的双面终端结构,其特征在于,所述阴极和门极交替排列;
所述阴极和阳极分别经退火处理后形成欧姆接触电极。
4.根据权利要求1所述的垂直型半导体器件的双面终端结构,其特征在于,所述元胞区采用SiC、GaN或Ge半导体单晶材料构成。
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1427014A (en) * 1972-04-20 1976-03-03 Sony Corp Semiconductor devices
US4003072A (en) * 1972-04-20 1977-01-11 Sony Corporation Semiconductor device with high voltage breakdown resistance
JPS5289473A (en) * 1976-01-21 1977-07-27 Hitachi Ltd Transistor
US4377816A (en) * 1978-10-10 1983-03-22 Bbc Brown, Boveri & Company Limited Semiconductor element with zone guard rings
EP0387721A2 (de) * 1989-03-14 1990-09-19 Siemens Aktiengesellschaft Thyristor mit verbessertem Abschaltverhalten
EP0600241A2 (de) * 1992-11-28 1994-06-08 Asea Brown Boveri Ag MOS-gesteuerte Diode
US6459102B1 (en) * 1998-12-18 2002-10-01 Centre National De La Recherche Scientifique Peripheral structure for monolithic power device
EP2463913A1 (en) * 2010-12-13 2012-06-13 ABB Technology AG Bipolar reverse-blocking non-punch-through power semiconductor device
JP2012227419A (ja) * 2011-04-21 2012-11-15 Yoshitaka Sugawara ワイドギャップ半導体装置
CN205984993U (zh) * 2016-08-18 2017-02-22 全球能源互联网研究院 一种垂直型半导体器件的双面终端结构

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6856520B2 (en) * 2002-05-20 2005-02-15 The United States Of America As Represented By The Secretary Of The Navy Double sided IGBT phase leg architecture and clocking method for reduced turn on loss
JP2007173418A (ja) * 2005-12-20 2007-07-05 Toshiba Corp 半導体装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1427014A (en) * 1972-04-20 1976-03-03 Sony Corp Semiconductor devices
US4003072A (en) * 1972-04-20 1977-01-11 Sony Corporation Semiconductor device with high voltage breakdown resistance
JPS5289473A (en) * 1976-01-21 1977-07-27 Hitachi Ltd Transistor
US4377816A (en) * 1978-10-10 1983-03-22 Bbc Brown, Boveri & Company Limited Semiconductor element with zone guard rings
EP0387721A2 (de) * 1989-03-14 1990-09-19 Siemens Aktiengesellschaft Thyristor mit verbessertem Abschaltverhalten
EP0600241A2 (de) * 1992-11-28 1994-06-08 Asea Brown Boveri Ag MOS-gesteuerte Diode
US6459102B1 (en) * 1998-12-18 2002-10-01 Centre National De La Recherche Scientifique Peripheral structure for monolithic power device
EP2463913A1 (en) * 2010-12-13 2012-06-13 ABB Technology AG Bipolar reverse-blocking non-punch-through power semiconductor device
JP2012227419A (ja) * 2011-04-21 2012-11-15 Yoshitaka Sugawara ワイドギャップ半導体装置
CN205984993U (zh) * 2016-08-18 2017-02-22 全球能源互联网研究院 一种垂直型半导体器件的双面终端结构

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