CN106435663B - 自含有咪唑和双环氧化物化合物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法 - Google Patents

自含有咪唑和双环氧化物化合物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法 Download PDF

Info

Publication number
CN106435663B
CN106435663B CN201610621009.3A CN201610621009A CN106435663B CN 106435663 B CN106435663 B CN 106435663B CN 201610621009 A CN201610621009 A CN 201610621009A CN 106435663 B CN106435663 B CN 106435663B
Authority
CN
China
Prior art keywords
height
copper
column
plating
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610621009.3A
Other languages
English (en)
Chinese (zh)
Other versions
CN106435663A (zh
Inventor
M·托尔塞斯
Z·尼亚齐姆贝托瓦
Y·秦
J·沃尔特英克
J·狄茨维斯泽柯
E·爱丁顿
M·列斐伏尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dow Global Technologies LLC
DuPont Electronic Materials International LLC
Original Assignee
Dow Global Technologies LLC
Rohm and Haas Electronic Materials LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Global Technologies LLC, Rohm and Haas Electronic Materials LLC filed Critical Dow Global Technologies LLC
Publication of CN106435663A publication Critical patent/CN106435663A/zh
Application granted granted Critical
Publication of CN106435663B publication Critical patent/CN106435663B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • CCHEMISTRY; METALLURGY
    • C07ORGANIC CHEMISTRY
    • C07DHETEROCYCLIC COMPOUNDS
    • C07D233/00Heterocyclic compounds containing 1,3-diazole or hydrogenated 1,3-diazole rings, not condensed with other rings
    • C07D233/54Heterocyclic compounds containing 1,3-diazole or hydrogenated 1,3-diazole rings, not condensed with other rings having two double bonds between ring members or between ring members and non-ring members
    • C07D233/56Heterocyclic compounds containing 1,3-diazole or hydrogenated 1,3-diazole rings, not condensed with other rings having two double bonds between ring members or between ring members and non-ring members with only hydrogen atoms or radicals containing only hydrogen and carbon atoms, attached to ring carbon atoms
    • CCHEMISTRY; METALLURGY
    • C07ORGANIC CHEMISTRY
    • C07DHETEROCYCLIC COMPOUNDS
    • C07D303/00Compounds containing three-membered rings having one oxygen atom as the only ring hetero atom
    • C07D303/02Compounds containing oxirane rings
    • C07D303/04Compounds containing oxirane rings containing only hydrogen and carbon atoms in addition to the ring oxygen atoms
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking
    • G03F7/405Treatment with inorganic or organometallic reagents after imagewise removal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/034Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0346Plating
    • H01L2224/03462Electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/114Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1146Plating
    • H01L2224/11462Electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Electroplating And Plating Baths Therefor (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
CN201610621009.3A 2015-08-06 2016-08-01 自含有咪唑和双环氧化物化合物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法 Active CN106435663B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201562201881P 2015-08-06 2015-08-06
US62/201881 2015-08-06

Publications (2)

Publication Number Publication Date
CN106435663A CN106435663A (zh) 2017-02-22
CN106435663B true CN106435663B (zh) 2019-03-26

Family

ID=56567495

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610621009.3A Active CN106435663B (zh) 2015-08-06 2016-08-01 自含有咪唑和双环氧化物化合物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法

Country Status (6)

Country Link
US (1) US10100421B2 (enExample)
EP (1) EP3128042B1 (enExample)
JP (1) JP6275212B2 (enExample)
KR (1) KR101779403B1 (enExample)
CN (1) CN106435663B (enExample)
TW (1) TWI600803B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10508349B2 (en) * 2016-06-27 2019-12-17 Rohm And Haas Electronic Materials Llc Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of pyrazole compounds and bisepoxides
US10718059B2 (en) * 2017-07-10 2020-07-21 Rohm And Haas Electronic Materials Llc Nickel electroplating compositions with cationic polymers and methods of electroplating nickel
TWI762731B (zh) * 2017-11-08 2022-05-01 美商羅門哈斯電子材料有限公司 銅電鍍組合物及在基板上電鍍銅之方法
TWI703148B (zh) * 2017-11-08 2020-09-01 美商羅門哈斯電子材料有限公司 銅電鍍組合物及在基板上電鍍銅之方法
US20190136397A1 (en) * 2017-11-08 2019-05-09 Rohm And Haas Electronic Materials Llc Electroplated copper
US20190259722A1 (en) * 2018-02-21 2019-08-22 Rohm And Haas Electronic Materials Llc Copper pillars having improved integrity and methods of making the same
JPWO2022172823A1 (enExample) 2021-02-15 2022-08-18

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102939339A (zh) * 2010-06-01 2013-02-20 巴斯夫欧洲公司 包含流平试剂的金属电镀用组合物

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0997791A (ja) 1995-09-27 1997-04-08 Internatl Business Mach Corp <Ibm> バンプ構造、バンプの形成方法、実装接続体
US6578754B1 (en) 2000-04-27 2003-06-17 Advanpack Solutions Pte. Ltd. Pillar connections for semiconductor chips and method of manufacture
US6610192B1 (en) 2000-11-02 2003-08-26 Shipley Company, L.L.C. Copper electroplating
JP4392168B2 (ja) 2001-05-09 2009-12-24 荏原ユージライト株式会社 銅めっき浴およびこれを用いる基板のめっき方法
US7128822B2 (en) 2003-06-04 2006-10-31 Shipley Company, L.L.C. Leveler compounds
US7276801B2 (en) 2003-09-22 2007-10-02 Intel Corporation Designs and methods for conductive bumps
US7462942B2 (en) 2003-10-09 2008-12-09 Advanpack Solutions Pte Ltd Die pillar structures and a method of their formation
TW200613586A (en) 2004-07-22 2006-05-01 Rohm & Haas Elect Mat Leveler compounds
EP1741804B1 (en) 2005-07-08 2016-04-27 Rohm and Haas Electronic Materials, L.L.C. Electrolytic copper plating method
US7829380B2 (en) 2006-10-31 2010-11-09 Qimonda Ag Solder pillar bumping and a method of making the same
EP2199315B1 (en) 2008-12-19 2013-12-11 Basf Se Composition for metal electroplating comprising leveling agent
US8262894B2 (en) 2009-04-30 2012-09-11 Moses Lake Industries, Inc. High speed copper plating bath
US8592995B2 (en) 2009-07-02 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump
JP5471276B2 (ja) 2009-10-15 2014-04-16 上村工業株式会社 電気銅めっき浴及び電気銅めっき方法
EP2504396B1 (en) 2009-11-27 2021-02-24 Basf Se Composition for copper electroplating comprising leveling agent
US8268157B2 (en) * 2010-03-15 2012-09-18 Rohm And Haas Electronic Materials Llc Plating bath and method
US20110220512A1 (en) 2010-03-15 2011-09-15 Rohm And Haas Electronic Materials Llc Plating bath and method
TWI500823B (zh) 2010-03-18 2015-09-21 Basf Se 包含整平劑之金屬電鍍用組合物
US8546254B2 (en) 2010-08-19 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming copper pillar bumps using patterned anodes
US8669137B2 (en) 2011-04-01 2014-03-11 International Business Machines Corporation Copper post solder bumps on substrate
US8454815B2 (en) 2011-10-24 2013-06-04 Rohm And Haas Electronics Materials Llc Plating bath and method
TWI637467B (zh) 2012-05-24 2018-10-01 欣興電子股份有限公司 中介基材及其製作方法
US10204876B2 (en) 2013-03-07 2019-02-12 Maxim Integrated Products, Inc. Pad defined contact for wafer level package
US9598787B2 (en) 2013-03-14 2017-03-21 Rohm And Haas Electronic Materials Llc Method of filling through-holes
US8957524B2 (en) 2013-03-15 2015-02-17 Globalfoundries Inc. Pillar structure for use in packaging integrated circuit products and methods of making such a pillar structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102939339A (zh) * 2010-06-01 2013-02-20 巴斯夫欧洲公司 包含流平试剂的金属电镀用组合物

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
A Novel High Coplanarity Lead Free Copper Pillar Bump Fabrication Process;Hou-Jun Hsu et al.;《Proceedings of the 2009 IEEE Internation》;20090630;第169-170页

Also Published As

Publication number Publication date
EP3128042B1 (en) 2019-01-02
KR101779403B1 (ko) 2017-09-18
US20170037526A1 (en) 2017-02-09
JP2017036500A (ja) 2017-02-16
US10100421B2 (en) 2018-10-16
TWI600803B (zh) 2017-10-01
KR20170017737A (ko) 2017-02-15
CN106435663A (zh) 2017-02-22
JP6275212B2 (ja) 2018-02-07
TW201715086A (zh) 2017-05-01
EP3128042A1 (en) 2017-02-08

Similar Documents

Publication Publication Date Title
CN106435663B (zh) 自含有咪唑和双环氧化物化合物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法
CN106435661B (zh) 自含有α氨基酸和双环氧化物的反应产物的铜电镀浴电镀光致抗蚀剂限定的特征的方法
TWI600804B (zh) 自含有咪唑化合物、雙環氧化物及鹵基苄基化合物的反應產物的銅電鍍浴電鍍光致抗蝕劑限定的特徵之方法
TWI608132B (zh) 自含有吡啶基烷基胺及雙環氧化物之反應產物的銅電鍍覆浴液電鍍覆光阻劑限定之特徵的方法
TWI649461B (zh) 能夠電鍍大尺寸化經光阻限定之特徵的銅電鍍浴及電鍍方法
CN107541757B (zh) 自含有吡唑化合物和双环氧化物的反应产物的铜电镀浴液电镀光致抗蚀剂限定的特征的方法
KR102241086B1 (ko) 구리 전기도금 조성물 및 기판상에 구리를 전기도금하는 방법들
CN109750332B (zh) 铜电镀组合物和在衬底上电镀铜的方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant