CN106058028B - 具有重新分布用于倒装芯片安装的垂直接触件的led - Google Patents

具有重新分布用于倒装芯片安装的垂直接触件的led Download PDF

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CN106058028B
CN106058028B CN201610671712.5A CN201610671712A CN106058028B CN 106058028 B CN106058028 B CN 106058028B CN 201610671712 A CN201610671712 A CN 201610671712A CN 106058028 B CN106058028 B CN 106058028B
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led
metal
layer
conducting shell
copper
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CN106058028A (zh
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J.雷
K-H.H.肖
Y.魏
S.施亚菲诺
D.A.斯泰格瓦德
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Lumileds Holding BV
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Abstract

一种发光二极管（LED）结构具有半导体层，其包括p‑型层、有源层和n‑型层。p‑型层具有底表面，并且n‑型层具有通过其发射光的顶表面。铜层具有电连接到p‑型层的底表面并与之相对的第一部分。电介质壁延伸通过铜层以将铜层的第二部分与第一部分隔离。金属分流器将铜层的第二部分电连接到n‑型层的顶表面。P‑金属电极电连接到第一部分，并且n‑金属电极电连接到第二部分，其中LED结构形成倒装芯片。还描述了方法和结构的其他实施例。

Description

具有重新分布用于倒装芯片安装的垂直接触件的LED
本申请是申请号为2012800132103，申请日为2012年2月28日，发明名称为“用于重新分布用于倒装芯片安装的垂直接触件的LED”的分案申请。
技术领域
本发明涉及发光二极管（LED），并且特别地涉及用于将LED形成为倒装芯片的技术，该倒装芯片具有在底表面上的用于直接结合到基座（submount）电极的两个电极。
背景技术
倒装芯片LED在许多应用中是所期望的，因为它们不使用导线结合。两个电极位于LED的底表面上用于直接结合到基座上的金属垫。结合可以通过超声结合、焊接、传导粘合剂或其他手段来完成。光离开LED的与电极相对的表面。
在典型的LED倒装芯片中，外延的p-型层是底层并且被底阳极电极接触。p-型层和有源层的一部分必须被蚀刻掉以暴露外延n-型层的下侧用于被底阴极电极接触。该蚀刻创建通过p-型层的分布式通孔，其暴露了n-型层的底表面。所述通孔开口于是被绝缘，并且金属沉积在开口中用于接触n-型层。
这样的形貌典型地通过在具有活性离子种类的等离子体环境中对半导体材料的干法蚀刻来实现。在薄膜设备内这样的结构的存在需要等离子体蚀刻的精确控制。而且，要与接触金属接口的干法蚀刻的外延表面对由等离子体内精力充沛的离子种类的撞击造成的破坏是敏感的。从热和机械的观点来看，这样的阶梯式结构的角落易于变成故障发起中心，这是由夹在中间的膜内的应力分布造成的。在台面（mesa）上或通孔结构上的膜生长典型地需要最小的阶梯覆盖，导致更高的装备成本和更紧的内嵌（in-line）工艺控制的需求。
因此，期望的是避免通孔的这种蚀刻以形成倒装芯片LED。
发明内容
在本发明的一个实施例中，LED具有在蓝宝石生长衬底上形成的n-型层，随后生长有源层和p-型层。每种层可以是多个层。许多LED生长在同一衬底晶片上并且随后将被单独分开（singulate）。本文描述的工艺是晶片级工艺。下面的概要描述了一个实施例。实现本发明的其他方式也被设想。
铜种子层覆盖在p-型层的顶表面上而形成。
第一电介质壁围绕锯线将所处于的晶片中的每个LED而形成。同时，内电介质壁沿着每个LED的一个边缘形成。这些壁之间的区域最终将用铜填充以在底阴极电极与到每个LED的n-型层的顶接触件之间提供电连接。
种子层被镀覆第一铜层，其覆盖p-型层和在所述电介质壁之间的区域。
然后，电介质层部分在从内电介质壁延伸的铜层的底表面上形成。该电介质层部分将最终支撑电连接到n-型层的金凸块（bump）。
然后，蓝宝石衬底被移除，并且暴露的n-型层变薄。
然后，在两个电介质壁上或周围蚀刻n-型层，以在电介质壁之间暴露第一铜层，其中第一铜层作为优秀的蚀刻停止。铜层然后可以通过湿法蚀刻而被移除以电隔离p接触件。n-型层的蚀刻也将晶片上的各种LED的n-型层分离，形成跨越晶片的隔离的LED设备单元。
然后，电介质层将被图案化以保护侧壁并且完全覆盖每个LED单元的暴露的p-接触件金属。
适当的n-接触件金属（例如，TiN）和粘合层以及铜种子层在晶片的顶表面上形成以覆盖暴露的n-型层、电介质部分以及在电介质壁之间的铜，并且在n-型层的中心发光区域上而非在其边缘和电介质部分上形成光刻胶。暴露的种子层（形成围绕每个LED区域的环）然后被镀覆第二铜层，以形成n-接触件，所以在电介质壁之间隔离的底表面上的第一铜层的部分接触第二铜层，该第二铜层接触n-层的顶部边缘。
使暴露的n-型层变粗糙，以增加光提取，并且磷光体层沉积在n-型层之上。
底部第一铜层因此被分成接触p-型层的节段和接触n-型层的节段。金凸块然后在用于结合到基座电极的n和p-铜节段上形成。
然后，晶片沿着环绕每个LED区域的外电介质壁被划线并且被折断或被锯。
因此，与其中n-金属电极接触通过蚀刻经过p-型层的通孔暴露的n-型层的下侧的现有技术的LED倒装芯片形成对照，本发明中的n-金属电极接触n-型层的顶表面，如垂直LED。
多个LED可以通过按照每一个LED仅形成一个电介质壁而串联连接，以使得接触一个LED的n-型层的第二铜层形成到接触邻近LED的p-型层的第一铜层的电连接。
也描述了用于通过电接触n-型层的顶表面而非通过p-型层中的蚀刻的开口接触n-型层形成倒装芯片的其他制造技术。取决于用于生长LED层的技术，这些层的传导类型可以反转。
还描述了方法和结构的其他实施例。
附图说明
图1-19是经历根据本发明的一个实施例的用于形成倒装芯片LED的工艺的同一LED晶片部分的截面图，其中这些图图示了一个LED的右边缘和邻近LED的左边缘。
图20图示了晶片的较大部分。
图21是示出两个LED的晶片的部分的简化的自顶向下图（top down）。
图22图示了图20的结构的变体，其中在一个LED的阴极与邻近LED的阳极之间存在传导路径以串联连接LED。
图23-25是在制造的各个阶段晶片中倒装芯片LED的另一个实施例的截面图。
图26-28类似于图23-25，但是电介质图案变体被用来串联连接邻近的LED。
在各个图中用相同数字标记的元素可以是相同的或等价的。
具体实施方式
这些图总体上是LED晶片的部分的截面，其示出了一个LED的右边缘和邻近LED的左边缘的形成。图20-22图示了晶片的较大部分。这些图仅图示了本发明的一个实施例，并且某些步骤可以被删除。
图1图示了外延地生长在蓝宝石衬底12上的常规LED半导体GaN层10，并且以生长的层的顺序表示成核层、应力消除层、n-层、有源层（发射光），随后是p-层和用来形成LED的任何其他半导体层。为了简化起见，所述多个GaN层将下文中被称为单个半导体GaN层10。与蓝宝石衬底12接触的层10的顶部是LED的n表面。层10的底表面（与顶侧相对）是LED的p表面。电流在LED的n表面与p表面之间流动以操作LED。LED可以是AlInGaN LED，这取决于期望的峰值波长。可替换地，LED不需要是基于GaN的并且可以是使用任意类型的生长衬底的任何其他类型的LED。本发明适用于使任何LED形成为倒装芯片。
图2图示了沉积在GaN层10的p-表面上的金属p-接触件14。p-接触件14优选地是反射性的，比如金或其他高传导性的反射层。p-接触件14形成到下面的p-层的欧姆接触。然后，使用常规的光刻技术图案化p-接触件14，以便在邻近的LED区域之间暴露GaN层10。
图3图示了沉积在p-接触件14上以减轻Au电子从p-接触件14的迁移的金属护片层18。这样的护片材料是公知的。在一个实施例中，护片层18包含镍并且可以由多个层形成。护片层18图案可以通过沉积和蚀刻或通过镀覆工艺形成。
图4图示了使用诸如CVD、溅射等之类的若干公知技术中的任一种沉积在整个晶片上的铜种子层20。种子层20接触并覆盖介于由金属p-接触件14覆盖的区域之间的GaN层10的p-表面的区。
图5图示了在暴露的GaN层10上形成的电介质壁21/22。内壁21至少沿着晶片上每个LED区域的一侧形成，其中铜互连将接触GaN层10中n-层的顶表面。外壁22被形成以沿着锯线环绕每个LED区域。电介质壁21/22可以被沉积为氧化物、光刻胶或任何其他类型的有机电介质，并且可以以常规方式图案化。电介质壁21/22的高度稍高于下面描述的铜板层的预期高度。电介质壁21/22之间的区域最终将用铜填充以提供到GaN层10的顶部n-表面的传导路径。
图6图示了镀覆铜24的种子层20，其厚度小于电介质壁21/22的厚度。可以使用各种公知的电镀技术。铜24对于p-接触件14上的热扩散和电流扩散是有利的。可以使用其他金属和沉积技术。
图7图示了被图案化以提供用于n-金属电极的铜24上的绝缘垫的第二电介质层26。电介质层26可以是与用来形成电介质壁21/22的材料相同的材料。电介质层26可以沿着方形LED区域的仅一个边缘延伸。在另一个实施例中，用于支撑n-金属电极的电介质层26形成在底表面中或多或少的表面上，这取决于期望的LED电流和其他因素。
图8图示了蓝宝石衬底12已被移除，并且GaN层10变薄。衬底12可以通过激光剥离、机械抛光、蚀刻或任何其他适当技术来移除。类似地，可以通过机械抛光、蚀刻或任何其他适当技术来使GaN层10变薄。
图9图示了使用常规技术在电介质壁21/22上蚀刻掉的GaN层10。这隔离了每个LED的GaN层10。种子层20和任何阻挡层保持在开口中并且需要蚀刻。
图10图示了使用常规技术蚀刻掉的暴露的种子层20和任何阻挡层，使得电介质壁21/22将电介质壁21/22之间的铜24与经由护片层18电接触p-接触件14的铜24绝缘。铜40是铜24的一部分，该部分现在被隔离在电介质壁21/22之间。
图11图示了在电接触p-接触件14的暴露的铜24部分上沉积和图案化的SiNx 30的电介质层。SiNx 30在铜n-金属将在其中形成的所有区域上延伸。对于方形LED，针对均匀电流传播，优选的是n-金属围绕LED芯片的整个外围延伸。因此，SiNx 30将形成围绕LED区域的外围的狭窄的方形。在其他实施例中，n-金属可以是用于电流传播的其他图案。
图12图示了在GaN层10、SiNx 30、电介质壁21/22和暴露的铜24的n-表面上形成的铜种子层32（包括任何适当的金属阻挡层）。
图13图示了被图案化以覆盖不镀覆铜的所有区域的光刻胶层34，所述所有区域为不是n-金属的部分的所有区域。
图14图示了镀覆了铜38层的暴露的种子层32，以使得铜38形成在左侧LED的GaN层10的n-表面与在电介质壁21/22之间的铜40之间的连接。在晶片中的每个LED周围形成方形铜环，其中该环沿着其右侧电连接到电介质壁21/22之间的铜40。在镀覆之后，光刻胶34被剥去，并且GaN层10上的暴露的种子层32被往回蚀刻以允许光经过。
图15图示了通过光电化学（PEC）蚀刻变粗糙以改进光提取的GaN层10表面42的n-表面的暴露部分以及例如通过电泳或任何其他沉积技术沉积在晶片上的磷光体44。
图16图示了在晶片的底部p-表面上（包括在电解质材料上）形成的金属阻挡层/种子层48。
图17图示了在种子层48上图案化以用于限定金凸块电极图案的光刻胶50的层。光刻胶50覆盖电介质层26的边缘以防止后续的铜镀覆使p和n-电极短路，并且覆盖最右边的电介质壁22以防止铜镀覆沿着锯线/分离线定位。
图18图示了镀覆金（或各种金属的多层）以形成用于连接到基座的金属垫的金凸块54的阵列的暴露的种子层48。
图19图示了剥去的光刻胶50和在电介质层26的左边缘附近的种子层48，其被刻蚀掉以将在电介质层26上的形成n-电极的金凸块54与形成p-电极的金凸块54电绝缘。最右边的电介质壁22（其限制每个LED区域）上的种子层48也被蚀刻以避免沿着锯线的任何金属（避免金属撕裂和杂散的金属边缘）。
图20图示了LED晶片的更大部分，其示出穿过环绕每个LED的电介质壁22的划线/锯线58。图20也示出p-接触件/电极区域60和n-接触件/电极区域62。n-接触件/电极区域62可以仅沿着LED的一侧延伸，因为限制GaN层10的铜具有非常高的传导性。
图21是用于两个LED的晶片的部分的简化的自顶而下图，其示出形成围绕GaN层10的n-表面的外围的环的铜38，其电接触LED的n-型GaN层10。沿着LED的至少一侧的互连铜40（在铜38下面）将“顶部”铜38电连接到底侧上的n-接触件/电极金凸块54。在单个晶片上可能形成数千个相同的LED，其中每个LED可以在大约1mm2上。
图22图示了图20的结构的变体，其中图5-20中的右电介质壁22没有形成，因此在一个LED的连接到该LED的n-型GaN层10的顶部铜38与邻近LED的连接到该邻近LED的p-型GaN层10的底部铜24之间存在传导路径，以便将LED串联连接。电子的流动由虚线66示出。任意数量的LED可以串联连接。串联连接的LED然后被单独分开为单个组。该组可选地可以被类似于图20中壁22的电介质壁环绕，其中该电介质壁限定了锯线，其上不形成金属以避免锯切通过金属。
图23图示了芯片中倒装芯片LED的不同实施例。在芯片中示出一个LED和邻近的LED的一部分。各种工艺步骤与先前描述的那些相同，并且这样的细节不再重复。GaN n-型层70、GaN 有源层72和GaN p-型层74外延生长在蓝宝石衬底（未示出）上。该衬底已被移除。反射性的金属p-接触件76（例如金）形成在p-型层74上，并且金属护层78形成在p-接触件76之上。然后，晶片被蚀刻以在LED区域之间形成沟槽80用于隔离LED。
诸如氮化硅之类的电介质层82沉积在晶片表面上并被图案化以暴露传导护层78的部分。铜种子层86形成在电介质层82和暴露的护层78之上。
然后，在铜层随后被沉积之后，为了隔离p-型层和n-型层的目的，形成电介质壁88。与每个LED关联的壁88被形成为方形，假设LED是方形的。
种子层86被镀覆铜90达到稍小于电介质壁88的高度的厚度。铜90的底表面具有在其上形成的金属阻挡层（未示出）。金属接触件/电极垫94和96或金属凸块被沉积在阻挡层上以便分别用于p和n倒装芯片接触件。垫94和96可以直接结合到基座的垫。
图24图示了在电介质层82被蚀刻以暴露环绕n-型层70的铜90之后并且在铝层98被沉积和图案化以将n-型层70连接到铜90之后图23的结构。图案化的铝层98充当分流器以在n-电极垫96与n-型层70之间传导电流。因此，底部铜90提供到p-型层74和n-型层70的倒装芯片连接，而没有在p-型层74中形成任何有机会访问n-型层70的下侧的通孔。因而，避免了与在p-型层74中形成通孔关联的问题。
图25图示了具有在LED的发光表面上形成的磷光体100的层的图24的结构。
图26-28与图23-25相同，除了电介质壁102没有完全隔离每个LED的n-型层和p-型层，而是仅仅隔离邻近LED的p-型层74。铝层98和铜90在一个LED的n-型层70与邻近LED的p-型层74之间形成串联路径。图案化的铝层98可以沿着LED的邻近串联的下一个LED的任意侧形成带。晶片中的任意数量的倒装芯片LED可以以这种方式串联连接。然后，串联连接的LED被单独分开为组。串联连接的LED可以处于任意布置中，比如处于方形组或带中。
因此，已经描述了在无需形成通过p-型层以有机会访问n-型层的下侧的通孔的情况下形成倒装芯片LED的各种技术。在各种实施例中对n-型层的访问是通过电连接到n-型层的底电极的金属分流器经由n-型层的顶表面来完成。
已经详细描述了本发明，本领域技术人员将领会，给定本公开，可以在不脱离本文所描述的本发明思想的精神的情况下对本发明进行修改。因此，并不预期本发明的范围被限于所图示和描述的特定实施例。

Claims (8)

1.一种LED结构，包括：
多个半导体层，其包括第一类型半导体的第一传导层、有源层和第二类型半导体的第二传导层，第一传导层具有邻近有源层的内表面和外表面，并且第二传导层具有邻近有源层的内表面和光通过其发射的外表面；
沉积在第一传导层的外表面之上的第一金属部分和第二金属部分，第一金属部分电连接到第一传导层的外表面，第二金属部分与第一传导层和第一金属部分电绝缘；
与LED结构一体形成并且位于第二传导层的外表面的顶部部分上面的第一金属分流部分，所述第一金属分流部分电接触第二传导层的外表面，并且形成围绕第二传导层的外表面的外围的环；
与LED结构一体形成并且包括邻近LED结构的至少一个外边缘沉积的金属层的第二金属分流部分，第二金属分流部分将第二金属部分电连接到第一金属分流部分使得第二金属部分电连接到第二传导层的外表面；
一个或多个第一电极，其电连接到第一金属部分；以及
一个或多个第二电极，其电连接到第二金属部分以使得该LED结构形成倒装芯片，其中一个或多个第二电极中的至少一些位于多个半导体层下面。
2.权利要求1的结构，进一步包括第一电介质部分，其将第一金属部分与第二金属部分电隔离；以及第二电介质部分，其将第二金属分流部分与第二传导层的外表面以外的其他部分电隔离。
3.权利要求2的结构，进一步包括：
第三电介质部分，其沿着第一金属部分的节段延伸；以及
第二电极中的所述一个或多个在第三电介质之上形成并且与第二金属部分电接触。
4.权利要求1的结构，其中第一金属部分是第一镀铜层。
5.权利要求4的结构，其中第二金属分流部分是第二镀铜层。
6.权利要求1的结构，进一步包括第二电介质部分，其沿着第二传导层的至少一个边缘形成并且将第一金属分流部分与第二传导层的外表面以外的其他部分隔离。
7.权利要求1的结构，其中第一传导层是p-型层，并且第二传导层是n-型层。
8.权利要求7的结构，其中LED结构是基于GaN的LED结构。
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