CN105917470A - 碳化硅沟槽晶体管以及用于制造碳化硅沟槽晶体管的方法 - Google Patents

碳化硅沟槽晶体管以及用于制造碳化硅沟槽晶体管的方法 Download PDF

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CN105917470A
CN105917470A CN201480073301.5A CN201480073301A CN105917470A CN 105917470 A CN105917470 A CN 105917470A CN 201480073301 A CN201480073301 A CN 201480073301A CN 105917470 A CN105917470 A CN 105917470A
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layer
compensation
carborundum
transistor
trench
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渠宁
T·雅克
M·格里布
M·兰巴赫
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Robert Bosch GmbH
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Abstract

本发明描述了一种碳化硅沟槽晶体管(1),其具有第一连接端(2)、竖直地在栅极沟槽(3)与第二连接端(5)之间布置的外延层(4),其中,在该外延层(4)中设置有水平延伸的补偿层(6),该补偿层(6)具有与该外延层(4)的掺杂类型相反的有效掺杂。还提出一种用于制造碳化硅沟槽晶体管(1)的方法,其中,将外延层(4)设置在所述碳化硅沟槽晶体管(1)的第二连接端(5)上;将水平延伸的补偿层(6)植入到所述外延层(4)中,该补偿层(6)具有与所述外延层(4)的掺杂类型相反的有效掺杂;将第一连接端(2)和栅极沟槽(3)设置在所述补偿层(6)上方。

Description

碳化硅沟槽晶体管以及用于制造碳化硅沟槽晶体管的方法
技术领域
本发明涉及一种碳化硅沟槽晶体管以及一种用于制造碳化硅沟槽晶体管的方法。
背景技术
基于硅(Si)的功率半导体在一些应用期间处于其物理极限范围外。例如复合半导体材料碳化硅(SiC)对此提供弥补。
在基于碳化硅的组件中,栅极氧化物在导带(Leitungsband)中原则上具有比由硅制成的可类比的组件更小的能带偏移,使得在较低的栅极场强时就由于隧道电流出现退化(Degradation)。对于碳化硅晶体管、尤其MOSFET(金属氧化物半导体场效应晶体管),在栅极氧化物中有意义的场强将处于3MV/cm处。这个极值的遵守尤其在截止运行时是紧要的并且使得尤其在沟槽器件中需要设计措施。
现有科学与技术是由Rohm在2011年提出的双沟槽碳化硅器件的概念,该器件在0.79mOhm*cm2情况下在600V电压等级达到导通电阻率Ron的最佳值。
例如通过引入具有低的p植入(p-Implantation)的双沟槽能够降低栅极氧化物上的场强。在此,处于更低的p区域代表一个JFET(截止层场效应晶体管),所述JEFT屏蔽真正的沟槽MOSFET结构。
也能够通过在所述栅极氧化物下方引入p掺杂区域(p-Bubbles:p泡)将栅极氧化物上的场强降低到大约4MV/cm(J.Tan等人的High-VoltageAccumulation-Layer,UMOSFETs in 4H-SiC,IEEE ELECTRON DEVICELETTERS,卷19,NO.12,1998年12月)。
替代地,可以将上面提到的两个措施(双沟槽,p泡)组合(来源4:Shinsuke Harada等人的“Determination of optimum structure of 4H-SiC trenchMOSFET”,2012年第24期会议记录International Symposium on PowerSemiconductor Devices and ICs,253页及后续页)。
至今已知的用于降低栅极氧化物场强的措施部分地上仅仅有条件地有效或者具有显著的缺点,例如更高的面积需求、电阻和/或工艺复杂度。尤其所述“双沟槽”结构需要巨大的占用面积,因为所需要的沟槽结构布置在沟槽栅极的旁边。因此表面电阻率Ron*A升高,并且由于更高的集成密度限制技术进步。除了更高的面积需求之外,由于双沟槽的JFET效应,电流路径中的电阻也部分地明显提高。
发明内容
根据本发明提供一种碳化硅沟槽晶体管,该碳化硅沟槽晶体管具有第一连接端、竖直地在栅极沟槽与第二连接端之间布置的外延层,其中,在该外延层中设置有水平延伸的补偿层,该补偿层具有与该外延层的掺杂类型相反的有效掺杂。所述补偿层实现在不提高面积需求的情况下降低栅极电场强度。这个附加的层在竖直的场分布(Feldprofil)中引起梯级,其中,较低的能级(Niveau)处于本体与补偿层之间(接近栅极的区域),高的场能级处于所述补偿层下方(外延层或漂移区域)。因此,在所述栅极氧化物的导带中能够补偿尤其在基于碳化硅(SiC)的组件中的更小的能带偏移。
本发明的核心是一种半导体结构,该半导体结构降低所述栅极场强并且竖直地插入碳化硅沟槽结构中。通过所述竖直的集成能够显著更紧密地封装所述沟槽结构,并且在漏极与源极之间的表面电阻率Rdson*A相应地下降。其次,通过掺杂和距离的相应选择能够调节栅极区域中的场强。通过接近栅极的电场区域与外延层或漂移区域的脱耦,可以在接近通道的漂移区域中使用更高的n掺杂,而对于漂移区的电压接收性能没有本质性的缺点。这里有利的是在接近通道的区域中的欧姆损耗的降低(“currentspreading”:电流扩展)。
所述补偿层的掺杂的算术平均值可以相应于相反类型的掺杂。这允许所述补偿层的多种多样的掺杂构型,因为仅需使所述平均值相应于一个确定的掺杂值。因此不规则的掺杂是可能的。
在一种特别的实施方式中,设有:所述晶体管是碳化硅沟槽MOSFET,所述第一连接端是源极连接端,所述第二连接端是漏极结构,所述外延层是漂移区。尤其在MOSFET中,根据本发明的栅极场强的匹配或调节是重要的。
所述补偿层可以具有一些通路,这些通路具有所述漂移区的类型的掺杂。这些通路实现了用于MOSFET的电流通路,使得所述MOSFET的工作方式或工作性能不受限制。所述通路可以具有圆形的或有角的轮廓并且以规则的或不规则的距离或样式布置。
有利地设有:所述补偿层在所述补偿层的表面方向上具有交替顺序的p掺杂区域与n掺杂区域。这种变形方案可以简单地制造并且实现良好的电流通路以及对所述补偿层的掺杂的简单的计算和制造,尤其是所述掺杂的算术平均值的计算和转换。
替代地,有利地设有:所述补偿层在所述补偿层的两个表面方向上具有交替样式的p掺杂区域与n掺杂区域。这些区域的这种二维布置与先前提到的一维布置相比还实现对掺杂和电流通路的更精细的调节,因此还实现对栅极场强的更精细的调节。
还可能的是:所述晶体管是碳化硅沟槽IGBT(绝缘栅双极型晶体管),所述第一连接端是阴极连接端,所述第二连接端是阳极连接端,所述外延层是基区。这里,所述补偿层实现所述栅极氧化物中的场强的下降,这为IGBT开辟了新的应用领域。
所述补偿层可以具有与所述基区的掺杂类型相反的、低的、均匀的掺杂。这种掺杂能够简单地被制造。
所述补偿层到栅极通道的距离优选最大是漂移区厚度的25%。已表明,这个距离范围实现栅极氧化物中的最优场强。
根据本发明的用于制造碳化硅沟槽晶体管的方法原则上包括以下步骤:
将外延层设置到所述碳化硅沟槽晶体管的第二连接端上;
将水平延伸的补偿层植入到所述外延层中,该补偿层具有与所述外延层的掺杂类型相反的有效掺杂;
将第一连接端和栅极沟槽设置在所述补偿层上方。
根据本发明引进所述补偿层有利地实现对所述栅极沟槽中的和/或所述外延层中的电场变化过程的控制,使得能够准确地针对所述晶体管的应用调节所述晶体管。
本发明的有利的扩展方案在从属权利要求中说明并且在说明书中描述。
附图说明
借助附图和以下描述更详细地阐述本发明的实施例。附图示出:
图1示出具有补偿层的碳化硅沟槽MOSFET和所属电场变化过程的示意性截面图;
图2示出所述补偿层在表面方向上的一个实施例;
图3示出所述补偿层在表面方向上的另一个实施例;
图4示出所述补偿层在另一个表面方向上的另一个实施例;
图5示出所述补偿层在两个表面方向上的另一个实施例;
图6示出具有补偿层的碳化硅沟槽IGBT和所属的电场变化过程的示意性截面图。
具体实施方式
图1以横截面示出具有源极连接端2和栅极沟槽3的碳化硅沟槽晶体管1。在源极连接端2和栅极沟槽3下方布置有漂移区4形式的外延层。在漂移区4下方有漏极连接端或漏极结构5。
在布置在栅极3与漏极结构5之间的漂移区4中设置有补偿层6,该补偿层6水平延伸。这里做出的方向说明、例如下方或水平参照在图中的图示。如果晶体管1与在图1中的指向不同,则这些相关概念相应地应重新定义。另一方面,也能够参照栅极沟槽3更确切地说参照栅极沟槽3的在这里从上向下的主延伸来定义方向参照。因此,补偿层6垂直于栅极沟槽3延伸。
在图1中示出的碳化硅沟槽晶体管1的示例中,漂移区4是n掺杂的并且补偿层6是有效p掺杂的,即具有与漂移区4相反的类型或电荷类型。显然,也可以颠倒地选择所述掺杂。所述有效掺杂例如可以定义为在补偿层6中的掺杂的算术平均值。补偿层6在平面内、例如x方向和y方向的空间延伸通常被限制到晶体管1的单元(Zelle)或区域。
在晶体管1的右边绘出电场强度E的模关于晶体管1的竖直延伸的曲线图。以虚线显示的第一曲线7示出已知的不具有补偿层的碳化硅沟槽晶体管的场强变化过程。这里,所述电场强度的最大值处于所述源极区域与漂移区4之间的pn结区域中,这导致高的栅极场强。反之,第二曲线8示出根据本发明的碳化硅沟槽晶体管1的场强变化过程。如所见那样,补偿层6在竖直的场分布中引起梯级,其中,所述电场变化过程的较低的能级处于栅极3与补偿层6之间,而高的场能级处于补偿层6下方,更确切地说处于补偿层6与漂移区4之间的pn结的区域中。
通过补偿层6的有效掺杂的高度、补偿层6的竖直布置,也就是说尤其通过补偿层6与栅极沟槽3之间的距离和/或补偿层6在竖直方向上的厚度,能够使晶体管1的场强分布针对相应的使用目的来个性化地匹配或调节。
在图2中示出补偿层6的第一实现方式。这里,所述补偿层由交替顺序的n掺杂区域6a和p掺杂区域6b组成。n掺杂区域6a在此构成用于晶体管1的电流的通路。这些单个的区域之间的距离或者他们的宽度或长度大于空间电荷区,并且比漂移区长度、也就是栅极3与漏极结构5之间的距离小(理想地小于1/10)。因此得到典型的0.1...5μm的结构大小。掺杂区域6a和6b在带状的栅极沟槽3的方向上带状地延伸,这里即延伸到叶层(Blattebene)中。
对于补偿层6在晶体管1导通的情况下的导电性,应在这样的边界条件下力求尽可能高的掺杂能级:相应于包括制造公差在内的竖直场强目标变化过程地遵守有效掺杂或平均掺杂或换言之在n掺杂浓度与p掺杂浓度之间的体积加权的差。
补偿层6的pn结的构型可以很大程度上自由进行,也就是说针对导通特性或制造可能性进行优化。补偿层6的周期性、也就是说n掺杂区域6a和p掺杂区域6b的交替顺序应选择为小于所述漂移区或者与所述漂移区在同一数量级(典型地1...10μm)。
在图3中示出具有补偿层6的碳化硅沟槽晶体管1,该补偿层6具有更大的周期性,也就是说,层6相比于图2每个单元(Zelle)具有更多的pn结。在这里示出的条带型栅极设计中,补偿层6也具有平行于栅极定向、即平行于补偿层6的表面方向的条带型设计。在此,补偿层6的n区域6a有利地在通道区域下面对准。
在图4中示出具有补偿层6的碳化硅沟槽晶体管1的另一个示例。这里,沿着补偿层6的表面方向,补偿层6也由交替顺序的p掺杂区域6b和n掺杂区域6a组成。与图2和3不同,这里掺杂区域6a和6b横向于或垂直于条带状栅极3的延伸。掺杂区域6a和6b也可以布置成另一个角度。
在图5中示出一种具有补偿层6的碳化硅沟槽晶体管,其中,在补偿层6的两个表面方向上设置有交替样式的p掺杂区域6b和n掺杂区域6a。所述样式在此是二维的、周期的栅格,这种样式特别适合于二维MOS设计、例如六边形的单元结构。棋盘式设计也是可能的。这里,补偿层6的n区域6a也是有利地在所述通道区域下对准,至少相对于栅极沟槽3的纵向延伸对准。
在图6中示出碳化硅沟槽IGBT 10,其具有阴极连接端12和栅极沟槽13。在栅极沟槽13与阴极连接端12下方以外延层形式布置有基区14。再在基区14下方设置有阳极连接端15。在基区14中设置有水平延伸的补偿层16,以便减弱栅极氧化物中的电场强度。如先前那样,补偿层16具有与基区14的掺杂类型相反的有效掺杂。在这种情况下,基区14是n掺杂的,而补偿层16是p掺杂的。因为在IGBT中不需要单极的通路电流,所以补偿层16可以构造为低掺杂的均匀的层。在图6右边示出的场强变化过程相应于在图1中示出的变化过程。曲线17示出已知的没有补偿层16的IGBT的所述场强的变化过程。在此,所述场强的模在所述栅极氧化物的区域中最高。曲线18示出通过补偿层16优化的场强变化过程,其在所述栅极氧化物的区域中具有明显较小的场强。
晶体管10在基区14下方包括一个可选的n强掺杂的层19,用于限界或阻挡电场。在层19与阳极15之间布置有p掺杂层20。在这个区域中,补偿层16也改变场强的变化过程。因此,场强变化过程通过补偿层16继续朝着阳极15的方向延伸。
以上示出的呈碳化硅沟槽晶体管1、10形式的组件在科技上的实施或制造通过两个外延步骤进行,其中,在向第二连接端(漏极5、阳极15)上施加所述外延层(漂移区4、基区14)的第一外延之后,植入或者结构化地植入补偿层6或16。在第二外延步骤中或其他步骤中,随后制造栅极区域(本体、源极或阴极)。

Claims (10)

1.一种碳化硅沟槽晶体管,其具有第一连接端(2;12)、竖直地在栅极沟槽(3;13)与第二连接端(5;15)之间布置的外延层(4;14),其特征在于,在该外延层(4;14)中设置有水平延伸的补偿层(6;16),该补偿层(6;16)具有与该外延层(4;14)的掺杂类型相反的有效掺杂。
2.根据权利要求1所述的碳化硅沟槽晶体管,其中,所述补偿层(6;16)的掺杂的算术平均值相当于所述相反类型的掺杂。
3.根据权利要求1或2所述的碳化硅沟槽晶体管,其中,该晶体管(1)是碳化硅沟槽金属氧化物半导体场效应晶体管,所述第一连接端是源极连接端(2),所述第二连接端是漏极结构(5),所述外延层是漂移区(4)。
4.根据权利要求3所述的碳化硅沟槽晶体管,其中,所述补偿层(6)具有一些通路(6a),这些通路(6a)具有所述漂移区的掺杂类型。
5.根据权利要求3或4所述的碳化硅沟槽晶体管,其中,所述补偿层(6)在所述补偿层(6)的表面方向上具有交替顺序的p掺杂区域(6b)和n掺杂区域(6a)。
6.根据权利要求3至5中任一项所述的碳化硅沟槽晶体管,其中,所述补偿层(6)在所述补偿层(6)的两个表面方向上具有交替样式的p掺杂区域(6b)和n掺杂区域(6a)。
7.根据权利要求1或2所述的碳化硅沟槽晶体管,其中,所述晶体管(10)是碳化硅沟槽绝缘栅双极型晶体管,所述第一连接端是阴极连接端(12),所述第二连接端是阳极连接端(15),所述外延层是基区(14)。
8.根据权利要求7所述的碳化硅沟槽晶体管,其中,所述补偿层(16)具有低的、均匀的、相反类型的掺杂。
9.根据权利要求3或7或8所述的碳化硅沟槽晶体管,其中,所述补偿层(16)到栅极沟槽(13)的距离最大为漂移区厚度(4;14)的25%。
10.一种用于制造碳化硅沟槽晶体管(1;10)的方法,该方法具有以下步骤:
将外延层(4;14)设置到所述碳化硅沟槽晶体管(1;10)的第二连接端(5;15)上;
将水平延伸的补偿层(6;16)植入到所述外延层(4;14)中,该补偿层(6;16)具有与所述外延层(4;14)的掺杂类型相反的有效掺杂;
将第一连接端(2;12)和栅极沟槽(3;13)设置在所述补偿层(6;16)上方。
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