CN105810573A - 薄膜晶体管的制作方法 - Google Patents

薄膜晶体管的制作方法 Download PDF

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CN105810573A
CN105810573A CN201610147135.XA CN201610147135A CN105810573A CN 105810573 A CN105810573 A CN 105810573A CN 201610147135 A CN201610147135 A CN 201610147135A CN 105810573 A CN105810573 A CN 105810573A
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film transistor
layer
tft
thin film
metal
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卢马才
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201610147135.XA priority Critical patent/CN105810573A/zh
Priority to PCT/CN2016/078761 priority patent/WO2017156808A1/zh
Priority to US15/121,928 priority patent/US10340365B2/en
Publication of CN105810573A publication Critical patent/CN105810573A/zh
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Abstract

本发明提供一种薄膜晶体管的制作方法,其包括:提供一衬底基板;在衬底基板上沉积缓冲层,并对缓冲层进行图形化处理,以形成薄膜晶体管的有源区;在衬底基板上依次沉积绝缘层以及第一金属层;在第一金属层的栅极区以及低掺杂区上涂布光阻;对第一金属层的栅极区以及低掺杂区之外的区域进行金属刻蚀,以露出绝缘层;对光阻进行灰化处理,以露出第一金属层的低掺杂区;对低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;对有源区进行离子注入,以形成薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;对光阻进行去除操作。

Description

薄膜晶体管的制作方法
技术领域
本发明涉及晶体管制作领域,特别涉及一种薄膜晶体管的制作方法。
背景技术
低温多晶硅薄膜晶体管(LTPSTFT)基板可以应用于LCD(液晶显示器)及AMOLED(主动矩阵有机发光二极管)等高阶显示器。低温多晶硅薄膜晶体管相较于其他TFT拥有较高的载流子迁移率,较高的载流子迁移率容易导致出现热载流子效应,甚至可能会造成薄膜晶体管的失效。
为了避免热载流子效应的产生,制作低温多晶硅薄膜晶体管时,会通过离子注入的方式在低温多晶硅薄膜晶体管的源极和漏极形成浅掺杂过渡区。但是对低温多晶硅薄膜晶体管的源极和漏极进行离子注入操作时,难以在源极和漏极两侧形成对称的浅掺杂过渡区,从而容易导致掺杂偏差或栅极区域的偏移。
故,有必要提供一种薄膜晶体管的制作方法,以解决现有技术所存在的问题。
发明内容
有鉴于此,本发明提供一种可在源极和漏极两侧形成对称的低掺杂区,且制作流程简单的薄膜晶体管的制作方法;以解决现有的薄膜晶体管的制作方法的难以在源极和漏极两侧形成对称的浅掺杂过渡区,从而容易导致掺杂偏差或栅极区域的偏移的技术问题。
本发明实施例提供一种薄膜晶体管的制作方法,其包括:
提供一衬底基板;
在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理,以形成所述薄膜晶体管的有源区;
在所述衬底基板上依次沉积绝缘层以及第一金属层;
在所述第一金属层的栅极区以及低掺杂区上涂布光阻,其中所述有源区在所述第一金属层上的投影覆盖所述栅极区和所述低掺杂区;
对所述第一金属层的栅极区以及低掺杂区之外的区域进行金属刻蚀,以露出所述绝缘层;
对所述光阻进行灰化处理,以露出所述第一金属层的低掺杂区;
对所述低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
对所述有源区进行离子注入,以形成所述薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;以及
对所述光阻进行去除操作。
在本发明所述的薄膜晶体管的制作方法中,所述对所述光阻进行去除操作的步骤之后还包括:
对所述金属半透掩膜进行刻蚀处理。
在本发明所述的薄膜晶体管的制作方法中,所述对所述光阻进行去除操作的步骤之后还包括:
在所述衬底基板上沉积介质层,并在所述介质层上形成源极通孔以及漏极通孔;
在所述衬底基板上沉积第二金属层,并对所述第二金属层进行图形化处理,以通过所述源极通孔以及所述漏极通孔,形成所述薄膜晶体管的源极以及漏极;
在所述衬底基板上沉积有机平坦层,并在所述有机平坦层上形成像素电极通孔;以及
在所述衬底基板上沉积像素电极层,并对所述像素电极层进行图形化处理,以通过所述像素电极通孔,形成相应的像素电极。
在本发明所述的薄膜晶体管的制作方法中,所述在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理的步骤包括:
在所述衬底基板上沉积非晶硅缓冲层;
对所述非晶硅缓冲层进行退火处理,以形成多晶硅缓冲层;以及
对所述多晶硅缓冲层进行图形化处理。
在本发明所述的薄膜晶体管的制作方法中,所述第一金属层为由钼和铝中至少一种金属构成的单层金属层或多层叠加金属层。
在本发明所述的薄膜晶体管的制作方法中,如所述薄膜晶体管为N型金属-氧化物-半导体薄膜晶体管,则注入离子为磷离子或砷离子;如所述薄膜晶体管为P型金属-氧化物-半导体薄膜晶体管,则注入离子为硼离子。
本发明实施例还提供一种薄膜晶体管的制作方法,其包括:
提供一衬底基板;
在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理,以形成第一薄膜晶体管的第一有源区和第二薄膜晶体管的第二有源区;
在所述衬底基板上依次沉积绝缘层以及第一金属层;
在所述第一金属层的第一栅极区、低掺杂区以及第二栅极区上涂布第一光阻,其中所述第一有源区在所述第一金属层上的投影覆盖所述第一栅极区和所述低掺杂区,所述第二有源区在所述第一金属层上的投影覆盖所述第二栅极区;
对所述第一金属层的第一栅极区、低掺杂区以及第二栅极区之外的区域进行金属刻蚀,以露出所述绝缘层;
在所述第二薄膜晶体管的区域涂布第二光阻;
对所述第一光阻进行灰化处理,以露出所述第一金属层的低掺杂区;
对所述低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
对所述第一有源区进行离子注入,以形成所述第一薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;
对所述第一光阻和所述第二光阻进行去除操作;
在所述第一薄膜晶体管的区域涂布第三光阻;
对所述第二有源区进行离子注入,以形成所述第二薄膜晶体管的源极区、沟道区、以及漏极区;以及
对所述第三光阻进行去除操作。
在本发明所述的薄膜晶体管的制作方法中,所述对所述第一光阻和所述第二光阻进行去除操作的步骤之后还包括:
对所述金属半透掩膜进行刻蚀处理。
在本发明所述的薄膜晶体管的制作方法中,所述对所述第三光阻进行去除操作的步骤之后还包括:
在所述衬底基板上沉积介质层,并在所述介质层上形成源极通孔以及漏极通孔;
在所述衬底基板上沉积第二金属层,并对所述第二金属层进行图形化处理,以通过所述源极通孔以及所述漏极通孔,形成所述第一薄膜晶体管的源极以及漏极,和所述第二薄膜晶体管的源极以及漏极;
在所述衬底基板上沉积有机平坦层,并在所述有机平坦层上形成像素电极通孔;以及
在所述衬底基板上沉积像素电极层,并对所述像素电极层进行图形化处理,以通过所述像素电极通孔,形成相应的像素电极。
在本发明所述的薄膜晶体管的制作方法中,所述在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理的步骤包括:
在所述衬底基板上沉积非晶硅缓冲层;
对所述非晶硅缓冲层进行退火处理,以形成多晶硅缓冲层;以及
对所述多晶硅缓冲层进行图形化处理。
本发明的薄膜晶体管的制作方法通过金属半透掩膜实现对低掺杂区的掺杂操作,保证了在源极和漏极两侧形成对称的低掺杂区,且制作流程简单;解决了现有的薄膜晶体管的制作方法的难以在源极和漏极两侧形成对称的浅掺杂过渡区,从而容易导致掺杂偏差或栅极区域的偏移的技术问题。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面对实施例中所需要使用的附图作简单的介绍。下面描述中的附图仅为本发明的部分实施例,对于本领域普通技术人员而言,在不付出创造性劳动的前提下,还可以根据这些附图获取其他的附图。
图1为本发明的薄膜晶体管的制作方法的第一优选实施例的流程图;
图2A至图2H为本发明的薄膜晶体管的制作方法的第一优选实施例的具体制作流程图;
图3为本发明的薄膜晶体管的制作方法的第二优选实施例的流程图;
图4A至图4M为本发明的薄膜晶体管的制作方法的第二优选实施例的具体制作流程图。
具体实施方式
请参照附图中的图式,其中相同的组件符号代表相同的组件。以下的说明是基于所例示的本发明具体实施例,其不应被视为限制本发明未在此详述的其它具体实施例。
请参照图1,图1为本发明的薄膜晶体管的制作方法的第一优选实施例的流程图。本优选实施例的薄膜晶体管的制作方法包括:
步骤S101,提供一衬底基板;
步骤S102,在衬底基板上沉积缓冲层,并对缓冲层进行图形化处理,以形成薄膜晶体管的有源区;
步骤S103,在衬底基板上依次沉积绝缘层以及第一金属层;
步骤S104,在第一金属层的栅极区以及低掺杂区上涂布光阻;
步骤S105,对第一金属层的栅极区以及低掺杂区之外的区域进行金属刻蚀,以露出绝缘层;
步骤S106,对光阻进行灰化处理,以露出第一金属层的低掺杂区;
步骤S107,对低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
步骤S108,对有源区进行离子注入,以形成薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;
步骤S109,对光阻进行去除操作;
步骤S110,在衬底基板上沉积介质层,并在介质层上形成源极通孔以及漏极通孔;
步骤S111,在衬底基板上沉积第二金属层,并对第二金属层进行图形化处理,以通过源极通孔以及漏极通孔,形成薄膜晶体管的源极以及漏极;
步骤S112,在衬底基板上沉积有机平坦层,并在有机平坦层上形成像素电极通孔;
步骤S113,在衬底基板上沉积像素电极层,并对像素电极层进行图形化处理,以通过像素电极通孔,形成相应的像素电极。
下面详细说明本优选实施例的薄膜晶体管的制作方法的各步骤的具体流程。
在步骤S101中,提供一衬底基板21,随后转到步骤S102。
在步骤S102中,在衬底基板21上沉积非晶硅缓冲层;该非晶硅缓冲层的材料可为氮化硅以及氧化硅中的至少一种;随后对该非晶硅缓冲层进行准分子激光退火,使得非晶硅转换为多晶硅,以形成多晶硅缓冲层。然后经过光阻涂布、曝光显影以及刻蚀等图形化处理,形成薄膜晶体管的有源层22。接着对光阻进行剥离后转到步骤S103。
在步骤S103中,在衬底基板21上依次沉积绝缘层23以及第一金属层24;绝缘层23的材料可为氮化硅以及氧化硅中的至少一种,第一金属层24为由钼和铝中至少一种金属构成的单层金属层或多层叠加金属层。随后转到步骤S104。
在步骤S104中,在第一金属层24的栅极区241以及低掺杂区242上涂布光阻25,有源区22在第一金属层24上的投影覆盖栅极区241和低掺杂区242;涂布后的薄膜晶体管的结构具体请参照图2A。随后转到步骤S105。
在步骤S105中,对第一金属层24的栅极区241以及低掺杂区242之外的区域进行金属刻蚀,以露出绝缘层23;金属刻蚀后的薄膜晶体管的结构具体请参照图2B。随后转到步骤S106。
在步骤S106中,对光阻25进行灰化处理,以露出第一金属层24的低掺杂区242;由于对光阻25两侧的灰化处理的效果是相同的,这样在第一金属层24两侧露出的低掺杂区242的面积是相同的。灰化处理后的薄膜晶体管的结构具体请参照图2C。随后转到步骤S107。
在步骤S107中,对低掺杂区242的第一金属层24进行金属刻蚀,即刻蚀掉部分低掺杂区242的第一金属层24,剩下的低掺杂区242的第一金属层24构成金属半透掩膜。金属刻蚀后的薄膜晶体管的结构具体请参照图2D。随后转到步骤S108。
在步骤S108中,对有源区22进行离子注入,没有金属层遮挡的有源区注入离子后形成薄膜晶体管的源极区221以及漏极区222;具有金属半透掩膜遮挡的有源层22注入离子后形成薄膜晶体管的源极低掺杂区223以及漏极低掺杂区224;具有光阻层和金属层阻挡的有源层22未注入离子,该区域的有源层22形成薄膜晶体管的沟道区225。
如薄膜晶体管为N型金属-氧化物-半导体薄膜晶体管,则注入离子为磷离子或砷离子;如薄膜晶体管为P型金属-氧化物-半导体薄膜晶体管,则注入离子为硼离子。具体请参照图2E。随后转到步骤S109。
在步骤S109中,对光阻25进行去除操作;去除操作后的薄膜晶体管的结构具体请参照图2F。当然这里也可将金属半透掩膜进行刻蚀处理,刻蚀处理后的薄膜晶体管的结构具体请参照图2G。随后转到步骤S110。
在步骤S110中,在衬底基板21上沉积介质层26,经过光阻涂布、曝光显影以及刻蚀挖孔等操作在介质层26上形成源极通孔261以及漏极通孔262;随后转到步骤S111。
在步骤S111中,在衬底基板21上沉积第二金属层,并对第二金属层进行图形化处理,以通过源极通孔261以及漏极通孔262,形成薄膜晶体管的源极271以及漏极272;随后转到步骤S112。
在步骤S112中,在衬底基板21上沉积有机平坦层28,并在有机平坦层28上形成像素电极通孔281;随后转到步骤S113。
在步骤S113中,在衬底基板21上沉积像素电极层,并对像素电极层进行图形化处理,以通过像素电极通孔281,形成相应的像素电极29。制作完成后的薄膜晶体管的结构具体请参照图2H。
这样即完成了本优选实施例的薄膜晶体管的制作以及使用过程。
本优选实施例的薄膜晶体管的制作方法通过金属半透掩膜实现对低掺杂区的掺杂操作,保证了在源极和漏极两侧形成对称的低掺杂区,且制作流程简单。
请参照图3,图3为本发明的薄膜晶体管的制作方法的第二优选实施例的流程图。本优选实施例的薄膜晶体管的制作方法包括:
步骤S201,提供一衬底基板;
步骤S202,在衬底基板上沉积缓冲层,并对缓冲层进行图形化处理,以形成第一薄膜晶体管的第一有源区和第二薄膜晶体管的第二有源区;
步骤S203,在衬底基板上依次沉积绝缘层以及第一金属层;
步骤S204,在第一金属层的第一栅极区、低掺杂区以及第二栅极区上涂布第一光阻;
步骤S205,对第一金属层的第一栅极区、低掺杂区以及第二栅极区之外的区域进行金属刻蚀,以露出绝缘层;
步骤S206,在第二薄膜晶体管的区域涂布第二光阻;
步骤S207,对第一光阻进行灰化处理,以露出第一金属层的低掺杂区;
步骤S208,对低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
步骤S209,对第一有源区进行离子注入,以形成第一薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;
步骤S210,对第一光阻和第二光阻进行去除操作;
步骤S211,在第一薄膜晶体管的区域涂布第三光阻;
步骤S212,对第二有源区进行离子注入,以形成第二薄膜晶体管的源极区、沟道区、以及漏极区;
步骤S213,对第三光阻进行去除操作;
步骤S214,在衬底基板上沉积介质层,并在介质层上形成源极通孔以及漏极通孔;
步骤S215,在衬底基板上沉积第二金属层,并对第二金属层进行图形化处理,以通过源极通孔以述漏极通孔,形成第一薄膜晶体管的源极以及漏极,和第二薄膜晶体管的源极以及漏极;
步骤S216,在衬底基板上沉积有机平坦层,并在有机平坦层上形成像素电极通孔;
步骤S217,在衬底基板上沉积像素电极层,并对像素电极层进行图形化处理,以通过像素电极通孔,形成相应的像素电极。
下面详细说明本优选实施例的薄膜晶体管的制作方法的各步骤的具体流程。
在步骤S201中,提供一衬底基板41,随后转到步骤S202。
在步骤S202中,在衬底基板41上沉积非晶硅缓冲层42;该非晶硅缓冲层的材料可为氮化硅以及氧化硅中的至少一种;随后对该非晶硅缓冲层进行准分子激光退火,使得非晶硅转换为多晶硅,以形成多晶硅缓冲层,具体如图4A所示。然后对多晶硅缓冲层进行光阻涂布、曝光显影以及刻蚀等图形化处理,形成第一薄膜晶体管的第一有源区421和第二薄膜晶体管的第二有源区422,具体如图4B所示。随后转到步骤S203。
在步骤S203中,在衬底基板41上依次沉积绝缘层43以及第一金属层44;绝缘层43的材料可为氮化硅以及氧化硅中的至少一种,第一金属层44为由钼和铝中至少一种金属构成的单层金属层或多层叠加金属层。随后转到步骤S204。
在步骤S204中,在第一金属层44的第一栅极区441、低掺杂区442以及第二栅极区443上涂布第一光阻45,其中第一有源区421在第一金属层22上的投影覆盖第一栅极区441和低掺杂区442。第二有源层422在第一金属层22上的投影覆盖第二栅极区443。涂布后的薄膜晶体管的结构具体请参照图4C,随后转到步骤S205。
在步骤S205中,对第一金属层44的第一栅极区441、低掺杂区442以及第二栅极区443之外的区域进行金属刻蚀,以露出绝缘层43;金属刻蚀后的薄膜晶体管的结构具体请参照图4D。随后转到步骤S207。
在步骤S206中,在第二薄膜晶体管的区域涂布第二光阻46,涂布后的薄膜晶体管的结构具体请参照图4E,随后转到步骤S207。
在步骤S207中,对第一光阻45进行灰化处理,以露出第一金属层44的低掺杂区442;由于对光阻两侧的灰化处理的效果是相同的,这样在第一金属层44两侧露出的低掺杂区442的面积是相同的。涂布后的薄膜晶体管的结构具体请参照图4F,随后转到步骤S208。
在步骤S208中,对低掺杂区442的第一金属层44进行金属刻蚀,即刻蚀掉部分低掺杂区442的第一金属层44,剩下的低掺杂区442的第一金属层44构成金属半透掩膜。随后转到步骤S209。
在步骤S209中,对第一有源区421进行离子注入,没有金属层遮挡的第一有源区注入离子后形成第一薄膜晶体管的源极区4211以及漏极区4212;具有金属半透掩膜遮挡的第一有源层注入离子后形成第一薄膜晶体管的源极低掺杂区4213以及漏极低掺杂区4214;具有光阻层和金属层阻挡的第一有源层未注入离子,该区域的有源层形成第一薄膜晶体管的沟道区4215。
如第一薄膜晶体管为N型金属-氧化物-半导体薄膜晶体管,则注入离子为磷离子或砷离子;如第一薄膜晶体管为P型金属-氧化物-半导体薄膜晶体管,则注入离子为硼离子。具体请参照图4G。随后转到步骤S210。
在步骤S210中,对第一光阻45和第二光阻46进行去除操作,去除操作后的薄膜晶体管的结构具体请参照图4H。当然这里也可将金属半透掩膜进行刻蚀处理,刻蚀处理后的薄膜晶体管的结构具体请参照图4L。随后转到步骤S211。
在步骤S211中,在第一薄膜晶体管的区域涂布第三光阻47;涂布后的薄膜晶体管的结构具体请参照图4I。随后转到步骤S212。
在步骤S212中,对第二有源区422进行离子注入,没有金属层遮挡的第二有源区422注入离子后形成第二薄膜晶体管的源极区4221以及漏极区4222,具有光阻层和金属层阻挡的第二有源层422未注入离子,该区域的有源层形成第二薄膜晶体管的沟道区4223。随后转到步骤S213。
在步骤S213中,对第三光阻47进行去除操作;去除操作后的薄膜晶体管的结构具体请参照图4J。随后转到步骤S214。
在步骤S214中,在衬底基板41上沉积介质层48,经过光阻涂布、曝光显影以及刻蚀挖孔等操作在介质层48上形成源极通孔481以及漏极通孔482;随后转到步骤S215。
在步骤S215中,在衬底基板41上沉积第二金属层,并对第二金属层进行图形化处理,以通过源极通孔481以及漏极通孔482,形成第一薄膜晶体管的源极491以及漏极492,和第二薄膜晶体管的源极493以及漏极494。随后转到步骤S216。
在步骤S216中,在衬底基板41上沉积有机平坦层410,并在有机平坦层410上形成像素电极通孔411;随后转到步骤S217。
在步骤S217中,在衬底基板41上沉积像素电极层,并对像素电极层进行图形化处理,以通过像素电极通孔411,形成相应的像素电极412;制作完成后的薄膜晶体管的结构具体请参照图4K。如在步骤S210中对金属半透掩膜进行了刻蚀处理;则制作完成后的薄膜晶体管的结构具体请参照图4M。
这样即完成了本优选实施例的薄膜晶体管的制作以及使用过程。
在第一优选实施例的基础上,本优选实施例的薄膜晶体管的制作方法可对同一基板上的多个薄膜晶体管选择进行低掺杂区的制作,因此进一步提高了薄膜晶体管以及相应的液晶显示面板的工作稳定性。
本发明的薄膜晶体管的制作方法通过金属半透掩膜实现对低掺杂区的掺杂操作,保证了在源极和漏极两侧形成对称的低掺杂区,且制作流程简单;解决了现有的薄膜晶体管的制作方法的难以在源极和漏极两侧形成对称的浅掺杂过渡区,从而容易导致掺杂偏差或栅极区域的偏移的技术问题。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种薄膜晶体管的制作方法,其特征在于,包括:
提供一衬底基板;
在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理,以形成所述薄膜晶体管的有源区;
在所述衬底基板上依次沉积绝缘层以及第一金属层;
在所述第一金属层的栅极区以及低掺杂区上涂布光阻,其中所述有源区在所述第一金属层上的投影覆盖所述栅极区和所述低掺杂区;
对所述第一金属层的栅极区以及低掺杂区之外的区域进行金属刻蚀,以露出所述绝缘层;
对所述光阻进行灰化处理,以露出所述第一金属层的低掺杂区;
对所述低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
对所述有源区进行离子注入,以形成所述薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;以及
对所述光阻进行去除操作。
2.根据权利要求1所述的薄膜晶体管的制作方法,其特征在于,所述对所述光阻进行去除操作的步骤之后还包括:
对所述金属半透掩膜进行刻蚀处理。
3.根据权利要求1所述的薄膜晶体管的制作方法,其特征在于,所述对所述光阻进行去除操作的步骤之后还包括:
在所述衬底基板上沉积介质层,并在所述介质层上形成源极通孔以及漏极通孔;
在所述衬底基板上沉积第二金属层,并对所述第二金属层进行图形化处理,以通过所述源极通孔以及所述漏极通孔,形成所述薄膜晶体管的源极以及漏极;
在所述衬底基板上沉积有机平坦层,并在所述有机平坦层上形成像素电极通孔;以及
在所述衬底基板上沉积像素电极层,并对所述像素电极层进行图形化处理,以通过所述像素电极通孔,形成相应的像素电极。
4.根据权利要求1所述的薄膜晶体管的制作方法,其特征在于,所述在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理的步骤包括:
在所述衬底基板上沉积非晶硅缓冲层;
对所述非晶硅缓冲层进行退火处理,以形成多晶硅缓冲层;以及
对所述多晶硅缓冲层进行图形化处理。
5.根据权利要求1所述的薄膜晶体管的制作方法,其特征在于,所述第一金属层为由钼和铝中至少一种金属构成的单层金属层或多层叠加金属层。
6.根据权利要求1所述的薄膜晶体管的制作方法,其特征在于,如所述薄膜晶体管为N型金属-氧化物-半导体薄膜晶体管,则注入离子为磷离子或砷离子;如所述薄膜晶体管为P型金属-氧化物-半导体薄膜晶体管,则注入离子为硼离子。
7.一种薄膜晶体管的制作方法,其特征在于,包括:
提供一衬底基板;
在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理,以形成第一薄膜晶体管的第一有源区和第二薄膜晶体管的第二有源区;
在所述衬底基板上依次沉积绝缘层以及第一金属层;
在所述第一金属层的第一栅极区、低掺杂区以及第二栅极区上涂布第一光阻,其中所述第一有源区在所述第一金属层上的投影覆盖所述第一栅极区和所述低掺杂区,所述第二有源区在所述第一金属层上的投影覆盖所述第二栅极区;
对所述第一金属层的第一栅极区、低掺杂区以及第二栅极区之外的区域进行金属刻蚀,以露出所述绝缘层;
在所述第二薄膜晶体管的区域涂布第二光阻;
对所述第一光阻进行灰化处理,以露出所述第一金属层的低掺杂区;
对所述低掺杂区的第一金属层进行金属刻蚀,以形成金属半透掩膜;
对所述第一有源区进行离子注入,以形成所述第一薄膜晶体管的源极区、源极低掺杂区、沟道区、漏极低掺杂区以及漏极区;
对所述第一光阻和所述第二光阻进行去除操作;
在所述第一薄膜晶体管的区域涂布第三光阻;
对所述第二有源区进行离子注入,以形成所述第二薄膜晶体管的源极区、沟道区、以及漏极区;以及
对所述第三光阻进行去除操作。
8.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,所述对所述第一光阻和所述第二光阻进行去除操作的步骤之后还包括:
对所述金属半透掩膜进行刻蚀处理。
9.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,所述对所述第三光阻进行去除操作的步骤之后还包括:
在所述衬底基板上沉积介质层,并在所述介质层上形成源极通孔以及漏极通孔;
在所述衬底基板上沉积第二金属层,并对所述第二金属层进行图形化处理,以通过所述源极通孔以及所述漏极通孔,形成所述第一薄膜晶体管的源极以及漏极,和所述第二薄膜晶体管的源极以及漏极;
在所述衬底基板上沉积有机平坦层,并在所述有机平坦层上形成像素电极通孔;以及
在所述衬底基板上沉积像素电极层,并对所述像素电极层进行图形化处理,以通过所述像素电极通孔,形成相应的像素电极。
10.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,所述在所述衬底基板上沉积缓冲层,并对所述缓冲层进行图形化处理的步骤包括:
在所述衬底基板上沉积非晶硅缓冲层;
对所述非晶硅缓冲层进行退火处理,以形成多晶硅缓冲层;以及
对所述多晶硅缓冲层进行图形化处理。
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CN109037045A (zh) * 2018-06-20 2018-12-18 武汉华星光电技术有限公司 一种离子注入方法、半导体器件的制作方法和半导体器件
CN110349972A (zh) * 2019-06-20 2019-10-18 深圳市华星光电技术有限公司 一种薄膜晶体管基板及其制备方法
CN116544243A (zh) * 2023-06-14 2023-08-04 深圳市华星光电半导体显示技术有限公司 驱动基板及显示面板

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