CN105742240B - 一种ltps阵列基板的制造方法 - Google Patents

一种ltps阵列基板的制造方法 Download PDF

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CN105742240B
CN105742240B CN201610206147.5A CN201610206147A CN105742240B CN 105742240 B CN105742240 B CN 105742240B CN 201610206147 A CN201610206147 A CN 201610206147A CN 105742240 B CN105742240 B CN 105742240B
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layer
manufacturing
barrier bed
metal
metal barrier
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CN105742240A (zh
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陈玉霞
贺超
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to CN201610206147.5A priority Critical patent/CN105742240B/zh
Priority to PCT/CN2016/085491 priority patent/WO2017173727A1/zh
Priority to US15/323,978 priority patent/US10157940B2/en
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Abstract

本发明公开了一种LTPS阵列基板的制造方法，所述LTPS阵列基板至少包括金属遮挡层、缓冲层、有源层、栅极绝缘层和栅极层。所述制造方法是将金属遮挡层作为栅极层的光罩用以图案化所述栅极层，使所获得的栅极图案的宽度小于所述金属遮挡层的宽度，并且所述栅极图案的垂直投影完全落入所述金属遮挡层范围内。在本发明中，通过利用所述金属遮挡层作为光罩图案化所述栅极层，节省了栅极金属光罩的制作成本，从而节省了LTPS生产制作成本并简化了生产制程。

Description

一种LTPS阵列基板的制造方法
技术领域
本发明涉及液晶显示领域，特别是涉及一种LTPS阵列基板及其制造方法。
背景技术
随着移动显示的日益普及，新一代移动显示技术向高画质、高分辨率、轻薄及低功耗发展。低温多晶硅(Low Temperature Poly-silicon,LTPS)技术以其优越的高画质、高分辨率、超轻薄及低功耗等性能备受广大消费者喜爱，LTPS技术正在逐渐取代传统a-Si薄膜晶体管技术，成为新一代显示技术主流。
请参见图1，图1所示的是一典型的LTPS阵列基板的结构示意图。如图1所示，现有技术中的LTPS阵列基板100主要包括：一基板101、一遮光层102、一缓冲层103、一多晶硅层104、一栅极绝缘层105、栅极106、源极/漏极107和一公共电极108。其中，所述多晶硅层104、栅极绝缘层105、栅极106和源极/漏极107构成薄膜晶体管。请参见图2，图2是传统CMOSLTPS阵列基板的结构示意图。如图2所示的，该阵列基板包括设置于基板101上的N型金属氧化半导体(NMOS，左侧)和P型金属氧化半导体(PMOS，右侧)；并且，如图3所示的，该阵列基板的各图形之间的所述遮光层102是相互断开的。
在上述LTPS阵列基板的制程中，首先需要沉积遮光层、缓冲层、有源层、栅极绝缘层、金属栅极层等，需要在栅极绝缘层沉积后沉积一层金属栅极层膜层，并用光罩来定义栅极图形，制程复杂，生产成本高。
因此，需要提供一种新的LTPS阵列基板及其制造方法，以解决上述问题。
发明内容
本发明的目的是提供一种LTPS阵列基板的制造方法，所述LTPS阵列基板至少包括金属遮挡层、缓冲层、有源层、栅极绝缘层和栅极层。所述制造方法是将金属遮挡层作为栅极层的光罩用以图案化所述栅极层，使所获得的栅极图案的宽度小于所述金属遮挡层的宽度，并且所述栅极图案的垂直投影完全落入所述金属遮挡层范围内。
在本发明一实施例中，所述制造方法至少包括：步骤S10、提供一透明基板，在所述透明基板上沉积一金属层，图案化所述金属层，获得所述金属遮挡层；
步骤S20、在所述金属遮挡层上形成所述缓冲层；步骤S30、在所述缓冲层上形成所述有源层；步骤S40、在所述有源层上形成所述栅极绝缘层；以及，步骤S50、在所述栅极绝缘层上沉积一栅极金属层，以所述金属遮挡层作为光罩，经两次背面曝光后形成所述栅极层。
在本发明一实施例中，所述步骤S50包括：步骤S501、在所述栅极层上涂布一光阻层，以所述金属遮挡层作为光罩对所述光阻层进行两次背面曝光，形成图案化光阻层；以及，步骤S502、显影后进行干蚀刻制程以刻蚀出栅极图案形成栅极层。
在本发明一实施例中，在所述步骤S501中，以入射角相等且关于法线对称的光线对所述光阻层进行两次背面曝光。
在本发明一实施例中，所述步骤S30包括：步骤S301、在所述缓冲层上沉积非晶硅，经准分子激光退火后形成多晶硅层，再进行光刻制程进行图案化获得所述有源层；步骤S302、对所述有源层进行掺杂，使所述有源层具有沟道区、源极接触区及漏极接触区。
在本发明一实施例中，所述步骤S501中形成的所述图案化光阻层的光阻的宽度小于所述沟道区的宽度。
在本发明一实施例中，所述制造方法至少还包括：步骤60、通过离子植入对所述有源层进行LDD轻掺杂。
在本发明一实施例中，所述源极接触区及所述漏极接触区均为P型掺杂区，或者，所述源极接触区及所述漏极接触区均为N型掺杂区。
在本发明一实施例中，所述金属遮挡层选自金属钼；所述缓冲层选自SiNx或SiOx；所述栅极绝缘层选自SiNx或SiO2。
在本发明一实施例中，所述栅极层选自透明栅极金属层或金属氧化物栅极层。
在本发明中，通过利用所述金属遮挡层作为光罩图案化所述栅极层，节省了栅极金属光罩的制作成本，从而节省了LTPS生产制作成本并简化了生产制程。
本发明的制造方法可以适用于移动显示领域的设计和制作；不仅适用于LTPS的TFT背板产品设计，同样也可以适用于CMOS/NMOS/Top Gate的产品设计、IPS等其他显示结构以及内嵌式触控技术(In-Cell Touch)的产品设计。
附图说明
图1是典型的LTPS阵列基板的结构示意图；
图2是传统CMOS LTPS阵列基板的结构示意图；
图3是传统CMOS LTPS阵列基板的遮光层的俯视图；
图4是本发明所述LTPS阵列基板制造方法的步骤示意图；
图5A～5C是本发明所述LTPS阵列基板制造过程中所述LTPS阵列基板的俯视图；
图6是图5C中A-A’的截面图；
图7是应用实施例中利用本发明所述制造方法获得的CMOS LTPS阵列基板的结构示意图。
具体实施方式
以下结合实施例对本发明做详细的说明，实施例旨在解释而非限定本发明的技术方案。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。特别说明的是，为了说明上的方便，图5是以简化示意的方式来呈现，其中的线路数量已经过简化，并且也省略了与说明无关的细节。
实施例一
在本实施例中提供一种LTPS阵列基板的制造方法。以下结合图4、图5A～5C及图6对所述制造方法进行详细描述。
如图所示的，所述制造方法包括以下步骤。
步骤S10、提供一透明基板201，所述透明基板201通常选用透明玻璃基板。在所述透明基板201上沉积一金属层，利用光刻制程图案化所述金属层，形成金属遮挡层210。如图3及5A所示的，在传统CMOS LTPS阵列基板中，各图形之间的所述遮光层102是相互断开的；而在本发明中，各图形之间的所述金属遮挡层210是串联在一起的。所述金属遮挡层210选自金属钼。
步骤S20、在所述金属遮挡层210上形成所述缓冲层220，用以覆盖所述金属遮挡层210，如图5B所示。所述缓冲层220选自SiNx或SiOx；。
步骤S30、在所述缓冲层220上形成所述有源层230，图案化所述有源层230，如图5C所示。本步骤包括以下两个步骤：步骤S301、首先在所述缓冲层220上形成沉积一层非晶硅，采用高温烤箱对所述非晶硅层进行脱氢工艺处理，以防止在晶化过程中出现氢爆现象以及降低晶化后薄膜内部缺陷态密度作用。脱氢工艺完成后，进行LTPS工艺过程，采用激光煺火工艺(ELA)、金属诱导结晶工艺(MIC)、固相结晶工艺(SPC)等结晶化手段对非晶硅层进行结晶化处理，从而在所述缓冲层220上形成一多晶硅层；接着，对所述多晶硅层进行光刻制程进行图案化，从而在所述缓冲层220上形成图案化的所述有源层230。步骤S302、对所述有源层230进行掺杂(可以是通过离子注入进行掺杂)，使所述有源层230具有沟道区231、源极接触区232及漏极接触区233；其中，所述源极接触区232及所述漏极接触区233均为P型掺杂区或N型掺杂区。
步骤S40、在所述有源层230上形成所述栅极绝缘层240，所述栅极绝缘层240选自SiNx或SiO2；以及，
步骤S50、在所述栅极绝缘层240上沉积一栅极金属层，以所述金属遮挡层210作为光罩，经两次背光曝光后形成栅极层250。所述栅极层250选自透明栅极金属层或金属氧化物栅极层，例如ITO。所述步骤S50包括：步骤S501、在所述栅极金属层上涂布一光阻层，以所述金属遮挡层210作为光罩对所述光阻层进行两次背面曝光，形成图案化光阻层260；如图6所示的，所述两次曝光的光线方向不同。更具体来说，如图6所示的，所述两次背面曝光所利用的两束光线是入射角相等且关于法线对称，也即，两束光纤与所述透明基板201形成的锐角夹角相等。例如，在本实施例中，第一次曝光为图中第一排箭头所示，在所述透明基板201的背面照射与所述透明基板201成一定夹角的平行光，第二次曝光为图中第二排箭头所示，两次曝光的夹角的绝对值保持一致，使得获得的所述图案化光阻层260的光阻的两侧锐角角度保持一致。由于所述金属遮挡层210作为光罩的作用，使得所述图案化光阻层260的光阻的宽度小于所述有源层230的沟道区231的宽度。步骤S502、在所述步骤S501后进行显影，然后进行干蚀刻制程以刻蚀出所述栅极层250的图案。
应用实施例
在本实施例中，将实施例一所述的方法应用到一CMOS LTPS阵列基板的制程中。因此，在本实施例中，首先进行如实施例一所记载的步骤S10～S50，之后还进行以下步骤。
步骤S60、通过离子植入对所述有源层230进行LDD轻掺杂。如图7所示，在所述沟道区231与源极接触区232之间及所述沟道区231与漏极接触区233之间分别形成浅掺杂漏极234(Light Doped Drain,LDD)。当然，在所述步骤60之后还包括：在所述栅极层上形成间绝缘层；在所述间绝缘层上形成源极、漏极层；在所述源极、漏极层上依次形成平坦化层、公共电机层、绝缘层和画素电极层等。上述步骤均为本领域常规步骤，此处不再赘述。
请参见图7，图7是本应用实施例获得的CMOS LTPS阵列基板的结构示意图。如图2所示的，传统CMOS LTPS阵列基板NMOS与PMOS组成，Panel AA区域为NMOS，外围GOA区域为NMOS与PMOS组成，其PMOS不需要遮光层102。而如图7所示的，本应用实施例获得的CMOSLTPS阵列基板PMOS(左侧)包含一金属遮挡层210，以保证PMOS的栅极可以通过所述金属遮挡层210做为背曝的光罩进行图案化。
在本发明中，通过利用所述金属遮挡层作为光罩图案化所述栅极层，节省了栅极金属光罩的制作成本，从而节省了LTPS生产制作成本并简化了生产制程。
本发明的制造方法可以适用于移动显示领域的设计和制作；不仅适用于LTPS的TFT背板产品设计，同样也可以适用于CMOS/NMOS/Top Gate的产品设计、IPS等其他显示结构以及内嵌式触控技术(In-Cell Touch)的产品设计。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (10)

1.一种LTPS阵列基板的制造方法，所述LTPS阵列基板至少包括金属遮挡层、缓冲层、有源层、栅极绝缘层和栅极层，其特征在于，所述制造方法是将金属遮挡层作为栅极层的光罩用以图案化形成所述栅极层，且所获得的栅极层的宽度小于所述金属遮挡层的宽度，并且所述栅极层的垂直投影完全落入所述金属遮挡层范围内；并且，所述金属遮挡层的各图形之间串联。
2.如权利要求1所述的制造方法，其特征在于，所述制造方法至少包括：
步骤S10、提供一透明基板，在所述透明基板上沉积一金属层，图案化所述金属层，获得所述金属遮挡层；
步骤S20、在所述金属遮挡层上形成所述缓冲层；
步骤S30、在所述缓冲层上形成所述有源层；
步骤S40、在所述有源层上形成所述栅极绝缘层；以及，
步骤S50、在所述栅极绝缘层上沉积一栅极金属层，以所述金属遮挡层作为光罩，经两次背面曝光后形成所述栅极层。
3.如权利要求2所述的制造方法，其特征在于，所述步骤S50包括：
步骤S501、在所述栅极金属层上涂布一光阻层，以所述金属遮挡层作为光罩对所述光阻层进行两次背面曝光，形成图案化光阻层以及，
步骤S502、显影后进行干蚀刻制程以刻蚀出栅极图案形成所述栅极层。
4.如权利要求3所述的制造方法，其特征在于，在所述步骤S501中，以入射角相等且关于法线对称的光线对所述光阻层进行两次背面曝光。
5.如权利要求3所述的制造方法，其特征在于，所述步骤S30包括：
步骤S301、在所述缓冲层上沉积非晶硅，经准分子激光退火后形成多晶硅层，再进行光刻制程进行图案化获得所述有源层；
步骤S302、对所述有源层进行掺杂，使所述有源层具有沟道区、源极接触区及漏极接触区。
6.如权利要求5所述的制造方法，其特征在于，所述步骤S501中形成的所述图案化光阻层的光阻的宽度小于所述沟道区的宽度。
7.如权利要求5所述的制造方法，其特征在于，所述制造方法至少还包括：
步骤60、通过离子植入对所述有源层进行LDD轻掺杂。
8.如权利要求5所述的制造方法，其特征在于，所述源极接触区及所述漏极接触区均为P型掺杂区，或者，所述源极接触区及所述漏极接触区均为N型掺杂区。
9.如权利要求1至7中任意一项所述的制造方法，其特征在于，所述金属遮挡层选自金属钼；所述缓冲层选自SiNx或SiOx；所述栅极绝缘层选自SiNx或SiO2。
10.如权利要求1至7中任意一项所述的制造方法，其特征在于，所述栅极层选自透明栅极金属层或金属氧化物栅极层。
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