CN105580122B - 用于定位具有电子元器件的承载件的方法和以此类方法生产的电子元器件 - Google Patents
用于定位具有电子元器件的承载件的方法和以此类方法生产的电子元器件 Download PDFInfo
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Abstract
本发明涉及一种处理具有电子元器件的经焊料遮罩的承载件的方法，所述方法包括检测承载件有关基准图样和检测焊料遮罩相关基准图样，所检测到的基准图样用于处理焊料遮罩在承载件上的位置。本发明还涉及一种以此类方法生产的电子元器件。
Description
技术领域
本发明涉及一种处理具有电子元器件的承载件的方法，所述方法包括以下方法步骤：检测至少一个承载件有关基准图样；将所述至少一个检测的承载件有关基准图样处理成承载件的位置，以及处理具有电子元器件的经焊料遮罩的承载件。本发明还涉及以此类方法生产的电子元器件。
背景技术
制造电子元器件，例如更具体但非排它地半导体产品，一般通过利用电子元器件的单元而较大量地进行，其中电子元器件集成在较大的元器件承载件中/上。在制造电子元器件期间，往往出于功能性原因还将焊料遮罩(solder mask)施加至承载件。在施加焊料遮罩之后，一般将接触元件如导线(或者作为BGA中的替代性小焊球)附接到电子元器件(例如，通过“引线接合(wire bounding)”或者“焊浴(solder bathing)”)，同时电子元器件仍然通过承载件集成/集成在承载件上。承载件也可被视为多个电子元器件的单元，其随后可经处理而将较大量的组合电子元器件分解成各具有一个或者若干个别电子元器件的较小单元(此过程也可称为分离、单切或者个体化)或者至少部分地将各电子元器件分离。产品实例为封装，所述封装具有承载件上放置的多个经包封的电子元器件以及由硅承载件组成的晶片，所述硅承载件上设置有被分成较小单元的电子元器件。电子元器件的分离或者分割可借助于不同类型的工艺来实现，例如机械加工(例如，使用刀片、液体或者光进行锯切)。此工艺使得能够生产大量电子元器件，但是由于电子元器件小型化的趋势，需要提高所需的工艺精度，由此产生对于较高精度处理的需要。
美国专利申请2005/0001299公开了一种用于半导体封装的基板和使用此类半导体封装的引线接合方法。在本发明的一个示例性实施例中，引线接合方法不仅计算改变的引线接合坐标，还包括以下步骤：提供包括一个或多个参考标记的基板，使这些参考标记成像，以及计算焊料遮罩的移位。所计算出的焊料遮罩移位使得能够计算新的引线接合坐标。
为了满足电子元器件制造中的较高准确度需要，第一种解决方案是增大现有工艺设备的准确度，但此解决方案成本高昂。然而本发明已经出于其目的提供了一种处理具有电子元器件的承载件的替代性方法，此方法使得能够以更高的准确度来处理承载件。
发明内容
本发明出于此目的提供了一种处理具有电子元器件的经焊料遮罩的承载件的方法，所述方法包括以下方法步骤：A)检测至少一个承载件有关基准图样；B)将所述至少一个检测的承载件有关基准图样处理成承载件的位置；C)检测至少一个焊料遮罩相关基准图样；D)将所述至少一个检测的焊料遮罩相关基准图样处理成焊料遮罩在承载件上的位置；以及E)至少取决于所述焊料遮罩在承载件上的位置来处理具有电子元器件的经焊料遮罩的承载件，其中根据步骤E)处理具有电子元器件的经焊料遮罩的承载件的步骤包括分离经焊料遮罩的电子元器件。承载件有关基准图样在本领域中也被称为“基准”或者“基准点”并且在成像系统的X-Y方向中被用作基准点。常见类型的“基准”是承载件上的图形符号(例如BGA)，并且所述图形符号往往在单一承载件上提供数十次。类似地，指示焊料遮罩位置的焊料遮罩基准图样可被命名为“基准”。焊料遮罩位置相关的“基准”的实例为焊料遮罩中的开口，所述开口提供视觉系统对下层图案以及焊料遮罩开口边界的接取，这使得能够将焊料遮罩的位置与承载件相关联。在实践中，经焊料遮罩的板材的处理准确度(根据步骤E)取决于所检测的承载件有关基准图样(此基准图样往往整合放置了板材上的引线(布线)并结合承载件的轮廓)。因此经焊料遮罩的板材的处理准确度与施加在板材上的焊料遮罩的实际位置无关。这在电子元器件的进一步处理期间提供了明显的益处，这是因为焊料遮罩现为根据其必须与之配合的环境(例如，印刷电路板)而被描画出轮廓(轮廓化)。本发明的见解之一还有：焊料遮罩位置对于精确地部分或完全分离经焊料遮罩的板材的电子元器件(或者电子元器件组合)也可能是重要的。分离/分割可根据本发明优化，以将在电子元器件制造工艺的先前阶段中获得的准确信息用于电子元器件处理的后续阶段(步骤)。在现有技术中，通过计算焊料遮罩移位获得的准确位置信息仅用于引线接合，就引线接合工艺来说，在焊料遮罩位置与引线必须接合的位置之间存在直接的连接。然而，本发明还将焊料遮罩移位的准确位置信息用于其中在工艺中早先获得的位置信息通常丢失并且必须重新产生的后续生产步骤中。现在在本发明中，生产工艺的先前阶段的焊料遮罩移位信息被再次用于后续处理步骤中，而对维持相关生产步骤之间的产品搬运的特定准确度没有任何需要。因此即使电子元器件在分离步骤之前的位置部分或者完全丢失(并且因此必须至少部分地重新产生)，所产生的焊料遮罩移位信息仍然可用于增强分离工艺的准确度。本发明的见解为相较于先前引线接合步骤，本发明从开始时即具有更少的准确度相关要求而其后续生产阶段中使用高精度的焊料遮罩移位数据。虽然在后续生产步骤的过程中丢失了关于产品的详细取向信息，但是现今在后续生产步骤中重新使用关于承载件上的焊料遮罩的高度详细的取向信息。焊料遮罩位置的使用将由此导致更准确的分离/分割。在实践中，关于半导体产品的分离/分割准确度检测到了±25μm的偏差，所述偏差可实质上限于小于±15μm的偏差，小于±10μm的偏差或者甚至小于±5μm的偏差。
根据本发明，检测了焊料遮罩相对于承载件(或者任意承载件接合物件，如承载件上的电子元器件和/或布线)的定位不准确度，并且直到对经焊料遮罩的板材的处理准确度的影响可在经焊料遮罩的承载件的处理过程中被补偿为止。此类布线检测的实例为对半导体承载件上的“总线”的检测。这些“总线”提供了在随后工艺中应被断开的半导体之间的电子连接。如果这些“总线”的定位不准确的话，那么半导体的随后分离可被破坏，从而导致较高的报废水平。然而，承载件上焊料遮罩定位的不准确性(也称为焊料遮罩移位)可根据本发明解决，而不会影响经焊料遮罩的板材的处理准确度。从而产生更高的产品质量和更少的报废。这是一种用于增强整体准确度的前馈工艺。另一优点涉及根据本发明通过对焊料遮罩施加工艺的反馈修正来增强工艺准确度的可能性。在返回焊料遮罩移位的情况下，可反馈地修正焊料遮罩施加工艺，从而提供更准确的后续产品。
在根据本发明的方法的一个实施例中，将处理步骤A)和C)合并成单一的检测步骤。例如当在焊料遮罩已经施加到承载件上之后检测到承载件上基准图样(“基准”)的无焊料遮罩覆盖部分时，可确定承载件(或者承载件相关的元件如电子元器件和/或布线)的位置以及焊料遮罩的位置。使用此类组合测量，还可由此仅使用单一检测步骤来确定焊料遮罩移位。这进一步简化了根据本发明处理具有电子元器件的承载件的方法。
焊料遮罩位置直接影响将接触件附接至经焊料遮罩的承载件的步骤，这是因为焊料遮罩的位置往往可决定接触件附接的位置。一个实例为例如BGA(球状栅格阵列板材)所需的接触球(焊球)附接，所述接触球的附接也可由焊料遮罩位置决定。焊料遮罩移位因而可导致球移位。此后对球位置进行测量的方案当然也是一种增强处理准确度的方案，但是要以视觉进行准备的球位置测量要比以视觉进行准确的焊料遮罩位置测量难得多(特别是由于球的三维形状，以及个别球的形状和大小变化)。
本发明还提供了根据依照步骤D)的承载件上的焊料遮罩的所处理位置来操控根据步骤E)处理具有电子元器件的经焊料遮罩的承载件的步骤的方案。此类操控将被理解为前馈操控，这是因为在后续工艺中可对产品水平进行调整来弥补所检测到的个别焊料遮罩移位。作为另一方案，在后续操作中还可在根据步骤E)处理具有电子元器件的经焊料遮罩的承载件的步骤期间检测新的承载件和/或焊料遮罩相关基准图样。
为了提高焊料遮罩移位的检测品质，在至少一个焊料遮罩相关基准图样的检测期间可用同轴光照射经焊料遮罩的承载件。就此而言，“同轴”应理解为与检测线平行。使用此类同轴光照射焊料遮罩(取决于焊料遮罩性质)使检测的可行性增大。
本发明还提供了使用根据本发明并且如上文所阐明的方法生产的电子元器件。
附图说明
将基于以下附图中示出的非限制性的示例性实施例来进一步说明本发明。在本文中示出了：
图1A和图1B是关于在焊料遮罩已经施加到承载件上之前和之后具有电子元器件的承载件的透视图；
图2A和2B是关于承载件有关基准图样和焊料遮罩相关基准图样的细节的俯视图；
图3A至图3C是关于具有电子元器件的承载件的侧视图，图3A是在焊料遮罩已经施加到承载件上之前的侧视图，而图3B和图3C是焊料遮罩已经施加并且焊球已经附接之后的侧视图；
图4是施加至具有电子元器件的承载件上的焊料遮罩的俯视图；以及
图5A至图5C示出了元器件和PCB在分离后但是进一步处理之前的不同相互位置。
具体实施方式
图1A示出承载件1的透视图，承载件是用布线图案2和接触垫(仅大体上可见并且用灰色区域3指示)提供的。在承载件1上还有承载件有关基准图样4，所述承载件有关基准图样往往与布线和接触垫附着在一起。在图表1A中还示出了视觉摄像机5，视觉摄像机检测承载件有关基准图样4。
图1B示出承载件1的透视图，承载件来自图1A但是现已将焊料遮罩6添加至承载件1后，仅局部地留下少量开放的开口以使得能够放置接触件，如将结合图3A至图3C和图4所解释的。在图1B中又示出了一视觉摄像机7，所述视觉摄像机现用于检测焊料遮罩相关基准图样，如将结合图2B所解释的。代替在焊料遮罩6已经添加至承载件1之前检测承载件有关基准图样4，本发明还涵盖在焊料遮罩6已经添加至承载件1之后检测承载件有关基准图样4。在实践中，这将甚至比在焊料遮罩6已经添加至承载件1之前检测承载件有关基准图样4更常见。
图2A示出了承载件有关基准图样10的俯视图，通过检测承载件有关基准图样，可获得关于其上放置承载件有关基准图样10的承载件11的位置的信息。图2B以俯视图示出基准图样12，所述基准图样放置在承载件13上但被焊料遮罩14部分地覆盖。在焊料遮罩14中留下了空开口15。当检测基准图样12并且检测开口15相对于基准图样12的位置时，获得了焊料遮罩相关基准图样，然而如已经参照图1A和图1B所解释的，还有可能根据本发明以在用焊料遮罩14部分地覆盖承载件13之后检测承载件有关基准图样10。
图3A示出具有接触垫21的承载件20的侧视图。在图3B中，焊料遮罩22置于承载件20上，并且随后将(焊料)球23放置到接触垫21上。相同的情形在图3C中示出，其中焊料遮罩24置于相同的承载件20上，并且在此也随后将(焊料)球25放置到接触垫21上。相较于图3C中的焊料遮罩24，图3B中的焊料遮罩22放置的更偏左。取决于特定测量，焊料遮罩22、24的位置也可影响焊球23、25的位置。相较于图3C中示出的焊球25，图3B中的焊球放置的更偏左，这是因为焊料遮罩22、24中的开口是如此定位而使得其决定了焊球的位置。这些图3B和图3C示出对焊料遮罩22和24的相对位置的了解提供了关于焊球23、25的后续定位的信息。
图4示出施加至具有电子元器件的承载件31上的焊料遮罩30的俯视图。焊料遮罩30设有开放的孔栅32以接收待放置的焊球(在此未示出)。焊料遮罩30的X/Y定位(在两个方向中移位)可由此与在如图4所示的情形中仍然待放置的焊球的定位相关。
图5A至图5C示出了元器件和PCB在进一步处理之前的不同相互位置。图5A示出了相对于接触垫42正确定位的元器件40以及焊球41的理论上最佳的位置。
图5B示出实际情况，其中焊球41’的中心和接触垫42的中心之间存在差距43。差距43逻辑上还存在于焊球41’和PCB 44的接触垫45之间，PCB根据元器件而描画出轮廓，而未根据本发明施加预想的修正。
图5C示出在根据本发明的预想修正的情况下焊球41’和PCB接触垫45正确地给出轮廓。
Claims (11)
1.一种处理具有电子元器件的经焊料遮罩的承载件的方法，所述方法包含以下方法步骤：
A)检测至少一个承载件有关基准图样；
B)将所述至少一个检测的承载件有关基准图样处理成所述承载件的位置；
C)检测至少一个焊料遮罩相关基准图样；以及
D)将所述至少一个检测的焊料遮罩相关基准图样处理成所述焊料遮罩在所述承载件上的位置，
其特征在于，所述方法进一步包括方法步骤E)至少取决于所述焊料遮罩在所述承载件上的所述位置来处理具有电子元器件的所述经焊料遮罩的承载件；以及
根据步骤E)处理具有电子元器件的所述经焊料遮罩的承载件的步骤包括分离所述经焊料遮罩的电子元器件。
2.根据权利要求1所述的方法，其特征在于，分离所述经焊料遮罩的电子元器件包括锯切具有电子元器件的所述经焊料遮罩的承载件。
3.根据权利要求1或权利要求2所述的方法，其特征在于，将所述处理步骤A)和C)合并成单一检测步骤。
4.根据权利要求1或权利要求2所述的方法，其特征在于，在所述处理步骤A)-E)进行之前将所述焊料遮罩施加至所述承载件。
5.根据权利要求1或权利要求2所述的方法，其特征在于，检测功能性的板材部分作为承载件有关基准图样被检测。
6.根据权利要求1或权利要求2所述的方法，其特征在于，所述方法还包括以下方法步骤：将接触件附接至所述经焊料遮罩的承载件。
7.根据权利要求1或权利要求2所述的方法，其特征在于，根据步骤E)处理具有电子元器件的所述经焊料遮罩的承载件的步骤包括对所述电子元器件进行至少部分的电子分割。
8.根据权利要求1或权利要求2所述的方法，其特征在于，根据依照步骤D)的所述承载件上的所述焊料遮罩的所处理位置来操控根据步骤E)处理具有电子元器件的所述经焊料遮罩的承载件的步骤。
9.根据权利要求1或权利要求2所述的方法，其特征在于，在根据步骤E)处理具有电子元器件的所述经焊料遮罩的承载件的后续操作中，检测新的承载件和/或焊料遮罩相关基准图样。
10.根据权利要求1或权利要求2所述的方法，其特征在于，在检测至少一个焊料遮罩相关基准图样期间，用同轴光照射所述经焊料遮罩的承载件。
11.一种用根据权利要求1-10任一项所述的方法生产的电子元器件。
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| PCT/NL2014/050702 WO2015053628A1 (en) | 2013-10-08 | 2014-10-08 | Method for positioning a carrier with electronic components and electronic component produced with such method |
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| JP4840997B2 (ja) * | 2007-06-19 | 2011-12-21 | 富士機械製造株式会社 | 部品実装方法 |
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| GB2328761A (en) * | 1997-08-26 | 1999-03-03 | Analog Res & Dev Ltd | Mask preparation method including critical dimension test forming means |
| TW200620504A (en) * | 2004-12-14 | 2006-06-16 | Siliconware Precision Industries Co Ltd | Bond positioning method for wire-bonding process and substrate for the bond positioning method |
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| WO2015053628A1 (en) | 2015-04-16 |
| DE112014004627T5 (de) | 2016-07-14 |
| TW201517188A (zh) | 2015-05-01 |
| KR20160067091A (ko) | 2016-06-13 |
| DE112014004627B4 (de) | 2021-08-19 |
| PH12016500469A1 (en) | 2016-05-16 |
| PH12016500469B1 (en) | 2016-05-16 |
| NL2011575C2 (en) | 2015-04-09 |
| KR102302345B1 (ko) | 2021-09-17 |
| JP2017501559A (ja) | 2017-01-12 |
| SG11201601577TA (en) | 2016-04-28 |
| JP6697381B2 (ja) | 2020-05-20 |
| CN105580122A (zh) | 2016-05-11 |
| TWI660437B (zh) | 2019-05-21 |
| US10217679B2 (en) | 2019-02-26 |
| MX354806B (es) | 2018-03-22 |
| MX2016004403A (es) | 2016-07-05 |
| US20160240445A1 (en) | 2016-08-18 |
| MY186603A (en) | 2021-07-30 |
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