CN105470315B - 用于布线和真空的具有贯穿通道的光电封装件 - Google Patents
用于布线和真空的具有贯穿通道的光电封装件 Download PDFInfo
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- CN105470315B CN105470315B CN201510617216.7A CN201510617216A CN105470315B CN 105470315 B CN105470315 B CN 105470315B CN 201510617216 A CN201510617216 A CN 201510617216A CN 105470315 B CN105470315 B CN 105470315B
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Abstract
本发明涉及用于布线和真空的具有贯穿通道的光电封装件。一种层叠的光电封装设备(300)包括封装材料内的多个层叠的部件,所述封装件具有为所述封装件提供侧壁和底壁的封装壳体和密封所述封装件的顶部的封盖(174)。所述层叠的部件包括具有顶面和底面的第一型腔模(252),所述第一型腔模(252)包括形成于所述底面中的至少一个贯穿通道。底模(251)具有包括至少一条电气迹线(354、357)的顶面和在其上的光源模(180)。所述第一型腔模的所述贯穿通道中的至少一个与所述电气迹线对准,并且所述第一型腔模被接合到所述底模,其中所述电气迹线在所述贯穿通道内,并且不接触所述第一型腔模,以提供真空密封结构。光电检测器(PD)被光学耦合以接收源自光源的光。
Description
相关申请的交叉参考
本申请要求2014年9月26日提交的临时申请序列NO.62/055,827、题为“微构原子钟(MFAC)与磁力仪(MFAM):高容量制造的(HVM)磁性表征(Microfabricated atomicclocks(MFAC)&magnetometers(MFAM):high volume manufactural(HVM)magneticcharacterization)”的权益,其全部公开内容通过引用并入本文。
技术领域
公开的实施例涉及实施光泵送传感器或参考的层叠的光电封装件,诸如MFAC和MFAM。
背景技术
各种光电设备是封装设备,其包括在真空下操作的光电检测器(PD)和至少一个光源。传统的MFAC和MFAM封装件包括在封装材料内侧的垂直层叠的结构,所述结构包括作为支承件的底模,所述底模具有电气迹线和安装在其上的至少一个光源(例如,激光模,诸如垂直腔面发射激光器(VCSEL));在所述底模上的第一型腔模(first cavity die),其在光源的上方提供凹腔;以及在所述第一型腔模上的光学模。在所述底模上的所述电气迹线连接外部驱动器,所述外部驱动器驱动所述光源并且包括电阻加热器的迹线,诸如以便提供热能以加热光源模到50℃以上的温度,例如,到60℃和80℃之间的温度。第二型腔模是在密封模上,所述密封模是在所述光学模上,并且光电检测器(PD)模是在将被耦合以接收源自所述光源的光的位置中。该封装件是真空密封封装件。
发明内容
本发明内容被提供来以简化的形式介绍本公开的一些概念,其将在下面具体实施方式中,包括提供的附图中进一步描述。本发明内容不旨在限制所要求保护的主题的范围。
公开的实施例认识到所述第一型腔模部分地在层叠的光电封装设备(光电封装设备)的底模的顶部并因此接触该底模的顶侧面上的电气迹线(或布线线路),诸如用于将外部驱动器连接到在底模上的光源的电气迹线,由于电气迹线在所述第一型腔模的部分下面产生局部凸起的区域,所以能够导致光学层叠倾斜。光学层叠的倾斜被认为与在光源上方的腔区域中所需的真空干扰,这能够降低光电封装设备的性能。
公开的实施例包括具有模与模真空密封结构的部分层叠,该部分层叠包括第一型腔模和底模,其中底模包括在其顶面的电气迹线。第一型腔模包括形成于其底面中的至少一个贯穿通道,贯穿通道中的至少一个与在底模上的所述电气迹线对准,使得当所述第一型腔模被接合到所述底模时,贯穿通道的尺寸将电气迹线(一条或多条)容纳在其中,使得电气迹线(一条或多条)不接触第一型腔模。该特征消除第一型腔模的倾斜,实现了改进的层叠,从而提供更完整的真空密封的封装架构,诸如用于改善包括微构原子钟(MFAC)、微构磁力仪(MFAM)和运动传感器设备的光电封装设备的性能。
附图说明
现在将参考附图,其中附图不一定按比例绘制,其中:
图1是根据示例实施例的示出在使用第一型腔模形成光电封装设备的示例方法中的步骤的流程图,第一型腔模具有与在底模的顶面上的电气迹线(一条或多条)对准且被定尺寸以不接触电气迹线(一条或多条)的贯穿通道(一个或多个)。
图2是根据示例实施例的示例型腔模的示图,该示例型腔模具有用于在底模的顶部上提供电子线路的布线而不导致倾斜、实现具有良好的机械稳定性的真空封装结构的蚀刻的贯穿通道(一个或多个)。
图3是根据示例实施例的包括公开的第一型腔模的示例光电封装设备,该第一型腔模具有为在底模的顶面上的电气迹线(一条或多条)提供微通道的贯穿通道,其中贯穿通道被定尺寸以不接触电气迹线(一条或多条)。
具体实施方式
参考附图描述了示例实施例,其中相同的附图标号被用于指示相同或等同的元件。例示的动作或事件的顺序不应被认为是限制性的,因为一些动作或事件可以以不同的顺序发生和/或者与其他动作或事件同时发生。此外,可以不需要一些例示的动作或事件以实现根据该公开的方法。
图1是根据实施例的示出用于形成由部分层叠实现的光电封装设备的示例方法120中的步骤的流程图,该部分层叠包括第一型腔模,第一型腔模具有在其底面上与在底模的顶面上的电气迹线(一条或多条)对准且被定尺寸不接触电气迹线(一条或多条)的贯穿通道(一个或多个)。因此,公开的部分层叠实现第一型腔模和底模的精确层叠。
步骤121包括将底模定位在包括封装材料(例如,塑料或陶瓷)的封装件的底壁上,所述封装件具有提供侧壁和底壁的封装壳体。标准的拾去-放置可以被用于该定位和本文所描述的其他模定位。底模具有包括至少一条电气迹线的顶面和在其上用于发射光的光源模。光源模能够包括垂直腔面发射激光器(VCSEL)。电气迹线一般包括用于耦合外部驱动器以驱动光源和配置成实现电阻加热器的迹线的电气迹线。
步骤122包括将具有底面的第一型腔模定位在底模的顶面上,所述第一型腔模包括形成于底面中的至少一个贯穿通道,使得贯穿通道(一个或多个)与电气迹线(一条或多条)对准。作为特定的示例,使用基于氢氧化物的湿法蚀刻(诸如四甲基氢氧化铵(TMAH)或氢氧化钾(KOH)),贯穿通道能够同时形成于硅片上的多个第一型腔模上。能够以自限制方式执行硅片的湿法蚀刻,意思是对于特定的孔径尺寸,该蚀刻在所需深度处或附近停止自身。例如,当窄掩模(例如,光刻胶)开口被用于使硅片的表面暴露时,湿法蚀刻能够以适合的角度(诸如约54.74°)进行,使得该湿法蚀刻能够在它蚀刻完全通过硅片的厚度之前自行终止。自行终止蚀刻导致在表面处具有最大宽度的贯穿通道,其中该贯穿通道沿其高度宽度线性减小直到宽度是零。
干法蚀刻(例如,反应离子蚀刻(RIE))或等离子体蚀刻也可以被用于形成贯穿通道,该贯穿通道一般沿其高度将具有近恒定的宽度。贯穿通道的高度能够比电气迹线的厚度大至少2μm,并且遍及电气迹线的厚度的贯穿通道的最小宽度能够比电气迹线的宽度大至少20μm。在另一个实施例中,第一型腔模能够包括玻璃。
电气迹线能够包括第一多个电气迹线,并且贯穿通道能够包括第二多个贯穿通道,其中所有的第一多个电气迹线共同在第二多个贯穿通道内。一个或多个电气迹线能够在每个贯穿通道中。
步骤123包括将第一型腔模结合到底模,其中电气迹线在贯穿通道内,并且不接触第一型腔模以提供内部真空密封结构,这实现第一型腔模和底模的精确层叠。因此,公开的实施例避免了由在底模的顶面上(传统地是在第一型腔模的顶部上并因此接触第一型腔模)的光学迹线引起的在光学层叠中的倾斜,因此,产生能够实现第一型腔模和底模的精确层叠、具有良好机械稳定性的完整真空密封光学封装架构的部分层叠。在一个实施例中,环氧树脂(或其它粘合剂)被用于接合。
步骤124包括将光电检测器(PD)模定位在将被耦合以接收源自所述光源模的所述光(诸如在源自光源的光的视线中)的位置中。例如,PD模能够被安装在内部封装件的基座部分上,内部封装件在封装件的内侧,其中内部封装件具有与该基座部分相对的、面向封装件的底壁的开口顶部。
步骤125包括在封装件内产生真空。步骤126包括将封盖密封在封装件的侧壁的顶部上,用于在真空下密封封装件。该方法能够进一步包括将光学模定位在第一型腔模上。
图2是根据示例实施例的示例部分层叠200的横截面图,该示例部分层叠200包括接合到底模251的顶面的第一型腔模252,底模251具有蚀刻的贯穿通道256a和256b用于为在底模251上的布线电气迹线261a、261b、261c和261d提供微通道。在图2中未示出在电气迹线261a、261b、261c和261d的端部上的接合焊盘。
因为贯穿通道256a和256b具有足够的尺寸,使得电气迹线261a、261b、261c和261d完全装入到第一型腔模252内且不接触第一型腔模252,部分层叠200避免由于一条或多条电气迹线与其底侧面接触而导致的传统的第一型腔模252倾斜。因为由部分层叠200避免了倾斜,所以部分层叠200能够实现第一型腔模252和底模251的精确层叠和具有良好机械稳定性的光电封装设备的真空封装结构。
图3是根据示例实施例的包括公开的第一型腔模252的示例光电封装设备300的示图,第一型腔模252具有为在底模251的顶面上示出为接合焊盘155和159相关联的电气迹线359和与接合焊盘156和158相关联的电气迹线361的电气迹线(一条或多条)提供微通道的贯穿通道256a,其中贯穿通道256a被足够大地定尺寸,从而不接触电气迹线。正如图2所示的部分层叠200,其中第一型腔模252的贯穿通道256a、256b具有足够的尺寸使得示出的电气迹线完全装入(电气迹线359和361完全装入)到图3的第一型腔模252内且不接触该第一型腔模252,使得部分层叠能够实现第一型腔模和底模的精确层叠,并且避免由于一条或多条电气迹线与其底侧面接触而导致第一型腔模252倾斜,能够实现具有良好机械稳定性的光电封装设备300的真空封装结构。光电封装设备300被示出包括在外部封装件(OP)170内侧的内部封装件350。内部封装件350具有与其基座部分相对的、面向封装件的底壁的开口顶部。
PD模110包括第一触点,第一触点包括通过包括内部接合引线115的布线连接到第一外部接合焊盘(FEBP)111的前触点110a。PD模110还包括第二触点,第二触点包括通过包括后侧金属层102的布线连接到第二外部接合焊盘(SEBP)112的后触点110b。
示出的内部封装件350包括多层第一介电基板,多层第一介电基板包括第一介电水平面101和在第一介电水平面101上方的第二介电水平面106。如本领域已知的,多层第一介电基板能够是一体化(一片式)基板,使得第一介电水平面101和第二介电水平面106与任何中间金属层一起被构造而无需任何粘合剂。例如,陶瓷封装件具有内建层,其允许集成金属横向和纵向连接以达到封装件的外表面。
第一介电水平面101包括顶侧,顶侧包括第一模附接区域,第一模附接区域具有在其上延伸到内部封装件350的第一外边缘的后侧金属层102,并且FEBP 111和SEBP 112在第一介电水平面101的底侧的一部分上方延伸。第二介电水平面106在第一介电水平面101上方,其中第一介电水平面101给包括引线接合区域的模附接区域加边框,引线接合区域具有延伸到内部封装件350的第二外边缘的第二金属层119。
前触点110a能够包括连接到n+区域的接合焊盘金属,并且后触点110b能够包括连接到p+区域的接合焊盘金属。后触点110b能够是PD模110的整个底侧。内部接合引线115将前触点110a连接到第二金属层119。
PD模110能够包括任何适合的包括光电二极管、光电晶体管或电荷耦合器件(CCD)的前侧照明PD,其全部都能够是现有的PD模。在一个实施例中,PD模110包括具有第一传导率(例如n+)的第一有源层、具有与第一传导率相反的第二传导率(例如,p+)的第二有源层,以及将第一和第二有源层分开的本征层(以形成PIN二极管)。
内部封装件350在第二安装基板351上,第二安装基板351包括由357示出的金属迹线联接在一起的接合焊盘352和353和由358示出的金属迹线联接在一起的接合焊盘354和355。接合引线161a将FEBP 111连接到接合焊盘353,而接合引线161b将接合焊盘352连接到上引线接合区域177a。接合引线162a将SEBP 112连接到接合焊盘354,而接合引线162b将接合焊盘355连接到上引线接合区域177b。
示出为接合引线161a和接合引线161b的第一接合引线一起将FEBP 111连接到引线接合区域177a,引线接合区域177a连接OP 170的第一端子191;第二接合引线162a和162b一起将SEBP 112连接到引线接合区域177b,引线接合区域177b连接OP 170的第二端子192;第三接合引线165将在金属迹线359的端部处的接合焊盘155连接到外部接合焊盘176a,通过金属迹线359和在接合焊盘159与第一电极181之间的接合引线将外部接合焊盘176a连接到OP 170的第三端子193,并且第四接合引线166从接合焊盘158连接到外部接合焊盘176b,通过从金属迹线361的端部处的接合焊盘156的接合引线外部接合焊盘176b将第二电极182连接到OP 170的第四端子194。封盖174严密密封OP 170。
光电封装设备300包括具有电极181和电极182的光源模180以允许由来自下部接合焊盘区域176a(连接到第三端子193)的接合引线165和由来自下部接合焊盘区域176b(连接到第四端子194)的接合引线166提供的图3所示的偏置(例如,电泵送)。在一个具体实施例中,光源模180能够包括VCSEL。在光学模321a上的透光密封或模片(密封模)321b被示出在第一型腔模252和第二型腔模328之间。密封模321b能够包括密封由第二型腔模328界定的上部腔的下端部的光学玻璃,第二型腔模328通过第二安装基板351被密封正上端部。第二安装基板351能够包括光学玻璃,诸如硼硅酸盐玻璃,例如,BOROFLOAT 33。
公开的实施例的优势包括一种结构,该结构避免由底模上的电气迹线接触第一型腔模的一部分所导致的光学层叠中的倾斜,能够实现第一型腔模和底模的精确层叠,并产生完整真空密封封装架构,该完整真空密封封装架构能够通过经由大量制造的低成本和高生产量的工艺进行生产。公开的实施例的应用一般包括具有光源(诸如激光二极管连同在真空下操作的内置监控器PD的所有应用。一个具体示例是磁力仪物理封装件。其他示例包括原子钟和运动传感器。
公开的实施例能够被集成到各种装配流中以形成各种不同的光电设备和相关产品。本公开涉及的本领域的技术人员将理解,在要求保护的发明的范围内,很多其他实施例和实施例的变更是可能的,并且在不偏离本公开的保护范围的情况下,可以对所描述的实施例作进一步的增加、删除、代替和修改。
Claims (17)
1.一种层叠的光电封装设备,其包括:
在包括封装材料的封装件内的多个层叠的部件,所述封装件具有为所述封装件提供侧壁和底壁的封装壳体和用于密封所述封装件的顶部的封盖,所述多个层叠的部件包括:
具有顶面和底面的第一型腔模,所述第一型腔模包括形成于所述底面中的至少一个贯穿通道;
底模,所述底模具有包括在其上的至少一条电气迹线的顶面和耦合到所述电气迹线的用于发射光的光源模;
其中所述第一型腔模的所述贯穿通道中的至少一个与所述电气迹线对准;
其中所述第一型腔模被接合到所述底模;
其中所述电气迹线在所述贯穿通道内,并且不接触所述第一型腔模以提供内部真空密封结构,以及
光电检测器模即PD模,其被光学耦合来接收源自所述光源模的所述光。
2.根据权利要求1所述的层叠的光电封装设备,其中所述至少一条电气迹线包括第一多个所述电气迹线,并且所述贯穿通道中的所述至少一个包括第二多个所述贯穿通道,其中所有的所述第一多个所述电气迹线共同在所述第二多个所述贯穿通道内。
3.根据权利要求1所述的层叠的光电封装设备,进一步包括在所述底模的所述顶面上的加热器。
4.根据权利要求1所述的层叠的光电封装设备,其中所述贯穿通道的高度比所述电气迹线的厚度大至少2μm,并且遍及所述电气迹线的厚度的所述贯穿通道的最小宽度比所述电气迹线的宽度大至少20μm。
5.根据权利要求1所述的层叠的光电封装设备,进一步包括在所述第一型腔模上的光学模和在所述光学模上的密封模。
6.根据权利要求1所述的层叠的光电封装设备,其中所述第一型腔模包括玻璃。
7.根据权利要求1所述的层叠的光电封装设备,其中所述第一型腔模包括硅。
8.根据权利要求1所述的层叠的光电封装设备,其中所述PD模被安装在内部封装件的基座部分上,所述内部封装件在所述封装件内侧,其中所述内部封装件具有与所述基座部分相对的、面向所述封装件的所述底壁的开口顶部。
9.一种层叠的光电封装设备,其包括:
在包括封装材料的封装件内的多个层叠的部件,所述封装件具有为所述封装件提供侧壁和底壁的封装壳体和用于密封所述封装件的顶部的封盖,所述多个层叠的部件包括:
具有顶面和底面的第一型腔模,所述第一型腔模包括形成于所述底面中的至少一个贯穿通道;
底模,所述底模具有包括在其上的至少一条电气迹线的顶面和耦合到所述电气迹线的用于发射光的光源模;
其中所述第一型腔模的所述贯穿通道中的至少一个与所述电气迹线对准;
其中所述第一型腔模被接合到所述底模;
其中所述电气迹线在所述贯穿通道内,并且不接触所述第一型腔模以提供内部真空密封结构;
在所述第一型腔模上的光学模;
在所述光学模上的密封模;
在所述密封模上的第二型腔模,以及
光电检测器模即PD模,其被光学耦合以接收源自所述光源模的光。
10.一种形成封装层叠的光电设备的方法,其包括:
将底模定位在包括封装材料的封装件的底壁上,所述封装件具有提供侧壁和所述底壁的封装壳体,所述底模具有包括至少一条电气迹线的顶面和在其上用于发射光的光源模;
将具有顶面和底面的第一型腔模定位在所述底模的所述顶面上,所述第一型腔模包括形成于所述底面中的至少一个贯穿通道,使得所述贯穿通道与所述电气迹线对准;
将所述第一型腔模接合到所述底模,其中所述电气迹线在所述贯穿通道内,并且不接触所述第一型腔模,以提供内部真空密封结构;
将光电检测器模PD模定位在将被耦合以接收源自所述光源模的所述光的位置中;
在所述封装件内产生真空,以及;
将封盖密封在所述侧壁的顶部上,用于密封在所述真空下的所述封装件。
11.根据权利要求10所述的方法,进一步包括将光学模定位在所述第一型腔模上,并且将密封模定位在所述光学模上。
12.根据权利要求10所述的方法,其中所述PD模被安装在内部封装件的基座部分上,所述内部封装件在所述封装件内侧,所述内部封装件具有与所述基座部分相对的、面向所述封装件的所述底壁的开口顶部。
13.根据权利要求10所述的方法,其中所述贯穿通道的高度比所述电气迹线的厚度大至少2μm,并且遍及所述电气迹线的厚度的所述贯穿通道的宽度比所述电气迹线的宽度大至少20μm。
14.根据权利要求10所述的方法,其中所述第一型腔模包括玻璃。
15.根据权利要求10所述的方法,其中所述第一型腔模包括硅,所述方法进一步包括自行终止湿法蚀刻以形成所述贯穿通道,所述贯穿通道形成于所述第一型腔模的所述底面中。
16.根据权利要求10所述的方法,其中所述至少一条电气迹线进一步包括在所述底模的所述顶面上的加热器。
17.根据权利要求10所述的方法,其中所述至少一条电气迹线包括第一多个所述电气迹线,并且所述贯穿通道中的所述至少一个包括第二多个所述贯穿通道,并且所有的所述第一多个所述电气迹线共同在所述第二多个所述贯穿通道内。
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US9293422B1 (en) | 2016-03-22 |
US20160164252A1 (en) | 2016-06-09 |
US20160093575A1 (en) | 2016-03-31 |
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US9543735B2 (en) | 2017-01-10 |
US9461439B2 (en) | 2016-10-04 |
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