CN105470207A - Fingerprint identification chip packaging structure based on high-flatness substrate and manufacturing method thereof - Google Patents
Fingerprint identification chip packaging structure based on high-flatness substrate and manufacturing method thereof Download PDFInfo
- Publication number
- CN105470207A CN105470207A CN201510991467.1A CN201510991467A CN105470207A CN 105470207 A CN105470207 A CN 105470207A CN 201510991467 A CN201510991467 A CN 201510991467A CN 105470207 A CN105470207 A CN 105470207A
- Authority
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- China
- Prior art keywords
- chip
- substrate
- groove
- packaging structure
- cover plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 239000000758 substrate Substances 0.000 title claims abstract description 77
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 239000003292 glue Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 6
- 230000006698 induction Effects 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- 230000035945 sensitivity Effects 0.000 abstract description 2
- 239000011195 cermet Substances 0.000 abstract 2
- 238000012858 packaging process Methods 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The present invention discloses a fingerprint identification chip packaging structure based on a high-flatness substrate and a manufacturing method thereof. The structure mainly comprises the substrate, a bump, a chip and a cover plate. The substrate is provided with a groove, the chip is connected with the bottom of the groove of the substrate through the bump, the chip and the bump are positioned inside the groove, the cover plate covers upper surfaces of the substrate and the chip, and the substrate is made of cermet or silicon. According to the fingerprint identification chip packaging structure and the manufacturing method thereof, by adopting the substrate made of cermet or silicon, a plastic packaging process in a packaging process is omitted and a tolerance value between the cover plate and a sensing area of the chip is reduced, thereby improving sensitivity of fingerprint identification.
Description
Technical field
The present invention relates to sensor chip encapsulation technology field, specifically a kind of fingerprint recognition chip-packaging structure based on high-flatness substrate and manufacture method thereof.
Background technology
At present, the substrate of fingerprint recognition packaging part is all much plastic packaging material, in processing with in using, there is warpage serious, the insensitive problem of fingerprint recognition.
Summary of the invention
For above-mentioned prior art Problems existing, the invention provides a kind of fingerprint recognition chip-packaging structure based on high-flatness substrate and manufacture method thereof, this invention is by adopting the substrate of pottery or silicon material, save the plastic packaging operation in packaging technology, reduce the tolerance value between cover plate and chip induction zone, fingerprint recognition sensitivity is improved.
Based on the fingerprint recognition chip-packaging structure of high-flatness substrate, form primarily of substrate, projection, chip and cover plate.Fluted on described substrate, chip is connected with the bottom of substrate recess by projection, chip and projection in groove, described cover plate covered substrate and chip upper surface.
Described substrate material is pottery or silicon.
Described cover plate material is silicon, pottery or glass.
Described chip upper surface has induction zone and through hole.
The shoulder of described cover plate covered substrate groove and chip upper surface.
The oral area of described cover plate covered substrate groove and chip upper surface.
The space formed with chip, projection in described substrate recess is filled with filling glue.
Described projection replaces with tin ball.
Based on the manufacture method of the fingerprint recognition chip-packaging structure of high-flatness substrate, specifically carry out in accordance with the following steps:
The first step, prepares the reeded substrate of band;
Second step, upper core, is positioned over chip in substrate recess;
3rd step, by the shoulder of cover plate covered substrate groove and chip upper surface.
Following steps are increased after above-mentioned second step:
Glue is filled in the space formed in substrate recess and chip, projection.
Above-mentioned 3rd step can replace by following steps:
By the oral area of cover plate covered substrate groove and chip upper surface.
Accompanying drawing explanation
Fig. 1 is the reeded substrate schematic diagram of band;
Fig. 2 is the upper core schematic diagram in substrate recess;
Fig. 3 fills glue schematic diagram in groove;
Fig. 4 is cover plate covered substrate recessed shoulder and chip schematic diagram;
Fig. 5 is cover plate covered substrate groove mouth and chip schematic diagram;
Fig. 6 is cover plate covered substrate recessed shoulder and the chip schematic diagram of not filling glue;
Fig. 7 is cover plate covered substrate groove mouth and the chip schematic diagram of not filling glue.
In figure, the oral area of to be that to fill glue, 8 be the shoulder, 9 of substrate recess be substrate recess that 1 be cover plate, 2 be through hole, 3 be substrate, 4 be projection, 5 be chip, 6 is induction zone, 7.
Embodiment
As shown in Fig. 4, Fig. 5, Fig. 6, Fig. 7, based on the fingerprint recognition chip-packaging structure of high-flatness substrate, form primarily of substrate 3, projection 4, chip 5 and cover plate 1.Fluted on described substrate 3, chip 5 is connected with the bottom of substrate 3 groove by projection 4, chip 5 and projection 4 in groove, described cover plate 1 covered substrate 3 and chip 5 upper surface.
Described substrate 3 material is pottery or silicon.
Described cover plate 1 material is silicon, pottery or glass.
Described chip 5 upper surface has induction zone 6 and through hole 2.
The shoulder 8 of described cover plate 1 covered substrate groove and chip 5 upper surface.
The oral area 9 of described cover plate 1 covered substrate groove and chip 5 upper surface.
The space formed with chip 5, projection 4 in described substrate 1 groove is filled with fills glue 7.
Described projection 4 replaces with tin ball.
Described through hole 2 is TSV through hole.
Based on the manufacture method of the fingerprint recognition chip-packaging structure of high-flatness substrate, specifically carry out in accordance with the following steps:
The first step, prepares the reeded substrate 3 of band, as shown in Figure 1;
Second step, upper core, is positioned in substrate 3 groove, as shown in Figure 2 by chip 5;
3rd step, by the shoulder 8 of cover plate 1 covered substrate groove and chip 5 upper surface, as shown in Figure 6.
Above-mentioned second step and the available following steps of the 3rd step replace:
Second step, glue 7 is filled in the space formed at substrate 3 groove and chip 5, projection 4, as shown in Figure 3;
3rd step, by the shoulder 8 of cover plate 1 covered substrate groove and chip 5 upper surface, as shown in Figure 4.
The available following steps of above-mentioned 3rd step replace:
By the oral area 9 of cover plate 1 covered substrate groove and chip 5 upper surface, as shown in figure 5 and figure 7.
Claims (11)
1. based on the fingerprint recognition chip-packaging structure of high-flatness substrate, it is characterized in that, form primarily of substrate (3), projection (4), chip (5) and cover plate (1), described substrate (3) is upper fluted, chip (5) is connected by the bottom of projection (4) with substrate (3) groove, chip (5) and projection (4) in groove, described cover plate (1) covered substrate (3) and chip (5) upper surface.
2. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, described substrate (3) material is pottery or silicon.
3. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, described cover plate (1) material is silicon, pottery or glass.
4. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, described chip (5) upper surface has induction zone (6) and through hole (2).
5. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, the shoulder (8) of described cover plate (1) covered substrate groove and chip (5) upper surface.
6. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, the oral area (9) of described cover plate (1) covered substrate groove and chip (5) upper surface.
7. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, the space formed with chip (5), projection (4) in described substrate (1) groove is filled with fills glue (7).
8. the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 1, is characterized in that, described projection (4) replaces with tin ball.
9. based on the manufacture method of the fingerprint recognition chip-packaging structure of high-flatness substrate, it is characterized in that, specifically carry out in accordance with the following steps:
The first step, prepares the reeded substrate of band (3);
Second step, upper core, is positioned over chip (5) in substrate (3) groove;
3rd step, by the shoulder (8) of cover plate (1) covered substrate groove and chip (5) upper surface.
10. the manufacture method of the fingerprint recognition chip-packaging structure based on high-flatness substrate according to claim 9, is characterized in that, after above-mentioned second step, increase following steps:
Glue (7) is filled in the space formed at substrate (3) groove and chip (5), projection (4).
The manufacture method of the 11. fingerprint recognition chip-packaging structures based on high-flatness substrate according to claim 9, is characterized in that, above-mentioned 3rd step following steps replace:
By the oral area (9) of cover plate (1) covered substrate groove and chip (5) upper surface.
Priority Applications (1)
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CN201510991467.1A CN105470207A (en) | 2015-12-24 | 2015-12-24 | Fingerprint identification chip packaging structure based on high-flatness substrate and manufacturing method thereof |
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CN201510991467.1A CN105470207A (en) | 2015-12-24 | 2015-12-24 | Fingerprint identification chip packaging structure based on high-flatness substrate and manufacturing method thereof |
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CN105470207A true CN105470207A (en) | 2016-04-06 |
Family
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Family Applications (1)
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CN201510991467.1A Pending CN105470207A (en) | 2015-12-24 | 2015-12-24 | Fingerprint identification chip packaging structure based on high-flatness substrate and manufacturing method thereof |
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107146779A (en) * | 2017-06-30 | 2017-09-08 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107170721A (en) * | 2017-06-30 | 2017-09-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107481979A (en) * | 2017-09-07 | 2017-12-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN108630623A (en) * | 2017-03-21 | 2018-10-09 | 矽品精密工业股份有限公司 | Package structure and method for fabricating the same |
CN108960006A (en) * | 2017-05-19 | 2018-12-07 | 致伸科技股份有限公司 | Fingerprint identification module and preparation method thereof |
CN109075141A (en) * | 2018-07-26 | 2018-12-21 | 深圳市汇顶科技股份有限公司 | Chip-packaging structure, method and terminal device |
CN110942997A (en) * | 2019-11-15 | 2020-03-31 | 徐州顺意半导体科技有限公司 | Fingerprint identification chip package and preparation method thereof |
CN111341669A (en) * | 2020-03-02 | 2020-06-26 | 浙江集迈科微电子有限公司 | Chip redistribution method |
CN111370317A (en) * | 2020-02-29 | 2020-07-03 | 浙江集迈科微电子有限公司 | Chip embedding method using silicon cavity as carrier plate |
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CN203799391U (en) * | 2014-03-27 | 2014-08-27 | 成都费恩格尔微电子技术有限公司 | Packaging structure of capacitive fingerprint sensor |
CN104615979A (en) * | 2015-01-27 | 2015-05-13 | 华进半导体封装先导技术研发中心有限公司 | Fingerprint identification module and encapsulation method thereof, and fingerprint identification module group and encapsulation method thereof |
CN205303442U (en) * | 2015-12-24 | 2016-06-08 | 华天科技(西安)有限公司 | Fingerprint identification chip package structure based on high roughness base plate |
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US6188580B1 (en) * | 1996-08-08 | 2001-02-13 | Infineon Technologies Ag | Smart card and semiconductor chip for use in a smart card |
CN203799391U (en) * | 2014-03-27 | 2014-08-27 | 成都费恩格尔微电子技术有限公司 | Packaging structure of capacitive fingerprint sensor |
CN104615979A (en) * | 2015-01-27 | 2015-05-13 | 华进半导体封装先导技术研发中心有限公司 | Fingerprint identification module and encapsulation method thereof, and fingerprint identification module group and encapsulation method thereof |
CN205303442U (en) * | 2015-12-24 | 2016-06-08 | 华天科技(西安)有限公司 | Fingerprint identification chip package structure based on high roughness base plate |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108630623A (en) * | 2017-03-21 | 2018-10-09 | 矽品精密工业股份有限公司 | Package structure and method for fabricating the same |
CN108960006A (en) * | 2017-05-19 | 2018-12-07 | 致伸科技股份有限公司 | Fingerprint identification module and preparation method thereof |
CN107146779A (en) * | 2017-06-30 | 2017-09-08 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107170721A (en) * | 2017-06-30 | 2017-09-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107170721B (en) * | 2017-06-30 | 2020-03-24 | 中芯长电半导体(江阴)有限公司 | Packaging structure and packaging method of fingerprint identification chip |
CN107146779B (en) * | 2017-06-30 | 2020-03-24 | 中芯长电半导体(江阴)有限公司 | Packaging structure and packaging method of fingerprint identification chip |
CN107481979A (en) * | 2017-09-07 | 2017-12-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107481979B (en) * | 2017-09-07 | 2019-11-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and packaging method of fingerprint recognition chip |
CN109075141B (en) * | 2018-07-26 | 2020-02-07 | 深圳市汇顶科技股份有限公司 | Chip packaging structure, method and terminal equipment |
WO2020019263A1 (en) * | 2018-07-26 | 2020-01-30 | 深圳市汇顶科技股份有限公司 | Chip packaging structure, method and terminal device |
CN109075141A (en) * | 2018-07-26 | 2018-12-21 | 深圳市汇顶科技股份有限公司 | Chip-packaging structure, method and terminal device |
CN110942997A (en) * | 2019-11-15 | 2020-03-31 | 徐州顺意半导体科技有限公司 | Fingerprint identification chip package and preparation method thereof |
CN111370317A (en) * | 2020-02-29 | 2020-07-03 | 浙江集迈科微电子有限公司 | Chip embedding method using silicon cavity as carrier plate |
CN111370317B (en) * | 2020-02-29 | 2023-07-11 | 浙江集迈科微电子有限公司 | Chip embedding method using silicon cavity as carrier plate |
CN111341669A (en) * | 2020-03-02 | 2020-06-26 | 浙江集迈科微电子有限公司 | Chip redistribution method |
CN111341669B (en) * | 2020-03-02 | 2023-06-27 | 浙江集迈科微电子有限公司 | Chip redistribution method |
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Application publication date: 20160406 |