CN107170721A - The encapsulating structure and method for packing of fingerprint recognition chip - Google Patents
The encapsulating structure and method for packing of fingerprint recognition chip Download PDFInfo
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- CN107170721A CN107170721A CN201710522966.5A CN201710522966A CN107170721A CN 107170721 A CN107170721 A CN 107170721A CN 201710522966 A CN201710522966 A CN 201710522966A CN 107170721 A CN107170721 A CN 107170721A
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- Prior art keywords
- fingerprint recognition
- recognition chip
- metal
- wiring layer
- packing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
Abstract
The present invention provides a kind of encapsulating structure and method for packing of fingerprint recognition chip, and the encapsulating structure includes：Silicon substrate；Re-wiring layer, is formed on the silicon substrate；Metal coupling, is formed on the re-wiring layer；Fingerprint recognition chip, is installed on the re-wiring layer by metal solder joints, wherein, the front of the fingerprint recognition chip is toward the re-wiring layer；And encapsulating material, the fingerprint recognition chip is covered in, and the metal coupling is exposed to the encapsulating material.The present invention uses fan-out package（Fan out）Fingerprint recognition chip, for existing other fingerprint recognition chip packages, has the advantages that cost is low, thickness is small, yield is high.
Description
Technical field
The present invention relates to a kind of semiconductor package and method for packing, more particularly to a kind of envelope of fingerprint recognition chip
Assembling structure and method for packing.
Background technology
As function increasingly stronger, performance and the integrated level more and more higher of integrated circuit, and new integrated circuit go out
Existing, encapsulation technology plays more and more important role in IC products, shared in the value of whole electronic system
Ratio it is increasing.Meanwhile, as integrated circuit feature size reaches nanoscale, transistor to more high density, it is higher when
Clock frequency develops, and encapsulation also develops to more highdensity direction.
Because fan-out wafer level encapsulation (fowlp) technology is due to having the advantages that miniaturization, low cost and high integration, with
And the energy efficiency with better performance and Geng Gao, the movement as high request of fan-out wafer level encapsulation (fowlp) technology/
The important method for packing of the electronic equipments such as wireless network, is one of encapsulation technology most with prospects at present.
Fingerprint identification technology is biometrics identification technology most ripe and cheap at present.For at present, fingerprint is known
Other technology is most widely used, not only it can be seen that the figure of fingerprint identification technology, in the market has in gate inhibition, attendance checking system
The applications of more fingerprint recognitions：As notebook computer, mobile phone, automobile, bank paying all can employing fingerprint identification technology.
A kind of method for packing of existing fingerprint recognition chip is as shown in Fig. 1 a~Fig. 1 c：
The first step, as shown in Figure 1a, deep trouth is made in fingerprint recognition chip 101, and is bonded on FPC plates 102, so
Metal connecting line 103 is made by routing technique afterwards, the electrical connection of fingerprint recognition chip 101 and FP C plates 102 is realized, wherein, FPC
It is Flexible Printed Circuit abbreviation, also known as FPC, it has, and Distribution density is high, lightweight, thickness
Thin the characteristics of.
Second step, as shown in Figure 1 b, produces framework 104；
3rd step, shown in scholar 1c, is capped sapphire cover plate 105 on the fingerprint recognition chip, to complete encapsulation.
This method has the disadvantages that：Including FPC plates, fingerprint recognition chip and sapphire cover plate three-decker, envelope
Fill thickness thicker, metal connecting line is easily broken caused by FPC soft boards are pullled etc., and overall yield is relatively low.
The method for packing of another fingerprint recognition chip is as shown in Fig. 2 a~Fig. 2 c：
The first step, as shown in Figure 2 a, through hole electrode is formed by silicon perforation TSV technology in fingerprint recognition chip 101
106；
Second step, as shown in Figure 2 b, one is layered in by sapphire cover plate 105, fingerprint recognition chip 101 and FPC plates 102
Rise, make metal connecting line 103 to connect the fingerprint recognition chip 101 and FPC plates 102 by routing technique；
3rd step, as shown in Figure 2 c, produces framework 104.
This method has the disadvantages that：Need to be encapsulated with sapphire cover plate, thickness is thicker, silicon perforation process costs compared with
Height, metal connecting line is easily broken caused by FPC soft boards are pullled etc., and the thinner thickness of fingerprint recognition chip, is easily split
Piece phenomenon, overall yield is relatively low.
Encapsulation based on the fingerprint recognition chip described above that yield is encapsulated there is provided a kind of low cost, low thickness and height
Structure and method for packing are necessary.
The content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of encapsulation of fingerprint recognition chip
Structure and method for packing, for solving the problem of fingerprint recognition package thickness is larger, yield is more low in the prior art.
In order to achieve the above objects and other related objects, the present invention provides a kind of encapsulating structure of fingerprint recognition chip, institute
Stating encapsulating structure includes：Silicon substrate；Re-wiring layer, is formed on the silicon substrate；Metal coupling, is formed at the cloth again
On line layer；Fingerprint recognition chip, is installed on the re-wiring layer by metal solder joints, wherein, the fingerprint recognition chip
Front toward the re-wiring layer；And encapsulating material, it is covered in the fingerprint recognition chip, and the metal coupling
It is exposed to the encapsulating material.
Preferably, have between the fingerprint recognition chip and the re-wiring layer in gap, the gap and be formed with
The front of the fingerprint recognition chip is completely covered in protective layer, the protective layer.
Further, it is epoxy resin that the protective layer, which is selected,.
Preferably, the vertical corresponding region of the re-wiring layer and fingerprint recognition chip includes continuous dielectric layer,
And not comprising metal level, using the identification window as the fingerprint recognition chip.
Preferably, the encapsulating material includes one kind in polyimides, silica gel and epoxy resin.
Preferably, the re-wiring layer includes patterned dielectric layer and patterned metal wiring layer.
Further, the material of the dielectric layer includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorus silicon glass
Glass, one or both of fluorine-containing glass combination of the above, the material of the metal wiring layer is included in copper, aluminium, nickel, gold, silver, titanium
One or more kinds of combinations.
Preferably, the metal coupling includes copper post, the nickel dam positioned at the copper post upper surface and positioned at the nickel dam
On solder bump.
Further, the metal barrier includes nickel dam, and the material of the solder bump includes one in lead, tin and silver
Plant or include the alloy of any one above-mentioned solder metal.
Preferably, the thickness range of the silicon substrate is 1 μm~700 μm.
The present invention also provides a kind of method for packing of fingerprint recognition chip, and the method for packing includes step：1) one is provided
Silicon substrate, the silicon substrate has relative first surface and second surface；2) in formation on the first surface of the silicon substrate
Re-wiring layer, and in forming metal coupling on the re-wiring layer；3) a fingerprint recognition chip is provided, passes through metal solder joints
The fingerprint recognition chip is installed on the re-wiring layer, wherein, the front of the fingerprint recognition chip is toward institute
State re-wiring layer；4) the fingerprint recognition chip is encapsulated using encapsulating material, the metal coupling is exposed to the package material
Material；And 5) from the second surface of the silicon substrate silicon substrate is thinned.
Preferably, step 3) in, the fingerprint recognition chip is installed on the re-wiring layer by metal solder joints
Afterwards, there is gap, step 3 between the fingerprint recognition chip and the re-wiring layer) also it is included in formation in the gap
The front of the fingerprint recognition chip is completely covered in the step of protective layer, the protective layer.
Further, it is epoxy resin that the protective layer, which is selected, and the finger is formed at by the way of dispensing or molding
Gap between line identification chip and the re-wiring layer.
Preferably, the vertical corresponding region of the re-wiring layer and fingerprint recognition chip includes continuous dielectric layer,
And not comprising metal level, using the identification window as the fingerprint recognition chip.
Preferably, step 2) make the re-wiring layer and include step：2-1) use chemical vapor deposition method or thing
Physical vapor deposition technique performs etching to form patterned Jie in surface of silicon formation dielectric layer to the dielectric layer
Matter layer；2-2) using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process in the figure
Shape dielectric layer surface formation metal level, and the metal level is performed etching to form patterned metal wiring layer.
Further, the material of the dielectric layer includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorus silicon glass
Glass, one or both of fluorine-containing glass combination of the above, the material of the metal wiring layer is included in copper, aluminium, nickel, gold, silver, titanium
One or more kinds of combinations.
Preferably, the preparation method of the metal coupling includes step：A) using galvanoplastic in the re-wiring layer table
Face forms copper post；B) metal barrier is formed in the copper post surface using galvanoplastic；C) hindered using galvanoplastic in the metal
Barrier surface forms solder metal, and using high temperature reflow processes in metal barrier layer surface formation solder bump.
Further, the metal barrier includes nickel dam, and the material of the solder bump includes one in lead, tin and silver
Plant or include the alloy of any one above-mentioned solder metal.
Preferably, the method for the fingerprint recognition chip being encapsulated using encapsulating material include compression forming, transfer modling into
One kind in type, fluid-tight shaping, vacuum lamination and spin coating, the encapsulating material includes polyimides, silica gel and epoxy resin
In one kind.
Step 5) in, the silicon substrate is thinned using mechanical milling tech, the thickness model of the silicon substrate after being thinned
Enclose for 0 μm~700 μm.
As described above, the encapsulating structure and method for packing of the fingerprint recognition chip of the present invention, have the advantages that：
1) present invention uses fan-out package (Fan out) fingerprint recognition chip, compared to existing other fingerprint recognitions
For chip package, have the advantages that cost is low, thickness is small, yield is high；
2) present invention is without the need for routing technique, it is not required that the silicon perforation technique (TSV) of high cost, and can realize and refer to
The encapsulation of line identification chip, greatly reduces technology difficulty and cost；
3) present invention is directly known using re-wiring layer or re-wiring layer and the lamination of silicon substrate sheet as fingerprint
The cover plate of other chip, it is not necessary to increase sapphire cover plate in addition, greatly reduce the thickness and cost of encapsulation；
4) present invention is using encapsulation (Fan out) technique is fanned out to, and the electricity extraction of chip does not need traditional FPC plates, can be with
The thickness of encapsulation and the stability of electrical deriving structure are reduced, encapsulation yield is improved；
5) present invention process is simple, creatively using packaging technology encapsulation fingerprint recognition chip is fanned out to, in semiconductor package
Dress technical field is with a wide range of applications.
Brief description of the drawings
What each step of method for packing that Fig. 1 a~Fig. 1 c are shown as a kind of fingerprint recognition chip of the prior art was presented
Structural representation.
Each step of method for packing that Fig. 2 a~Fig. 2 c are shown as another fingerprint recognition chip of the prior art is presented
Structural representation.
Fig. 3~Figure 10 is shown as the structural representation that each step of method for packing of the fingerprint recognition chip of the present invention is presented
Figure, wherein, Figure 10 is shown as the structural representation of the encapsulating structure of the fingerprint recognition chip of the present invention.
Figure 11 is shown as the use principle schematic diagram of the encapsulating structure of the fingerprint recognition chip of the present invention.
Component label instructions
201 silicon substrates
202 identification windows
203 dielectric layers
204 metal wiring layers
205 metal couplings
206 fingerprint recognition chips
207 metal solder joints
208 protective layers
209 encapsulating materials
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through specific realities different in addition
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
Refer to Fig. 3~Figure 11.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only display is with relevant component in the present invention rather than according to package count during actual implement in illustrating then
Mesh, shape and size are drawn, and kenel, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its
Assembly layout kenel may also be increasingly complex.
As shown in Fig. 3~Figure 10, the present embodiment provides a kind of method for packing of fingerprint recognition chip 206, and the fingerprint is known
Other chip 206 includes the fingerprint recognition core of the fingerprint recognition chip, capacitive fingerprint recognition chip and ultrasonic type of optical profile type
Piece, the method for packing includes step：
As shown in figure 3, carrying out step 1 first) there is provided a silicon substrate 201, the silicon substrate has relative first surface
And second surface.
The silicon substrate 201 is used to make re-wiring layer in its first surface, can obtain high-quality rewiring
Layer, the silicon substrate 201 subsequently after reduction process, can as fingerprint recognition chip-packaging structure cover sheet,
Sapphire cover plate need not additionally be increased, technique is smooth, while saving cost.
As shown in Fig. 4~Fig. 6, step 2 is then carried out), in forming re-wiring layer on the silicon substrate 201, and in institute
State formation metal coupling 205 on re-wiring layer.
As an example, step 2) make the re-wiring layer and include step：
As shown in figure 4, carrying out step 2-1), using chemical vapor deposition method or physical gas-phase deposition in the silicon
The surface of substrate 201 forms dielectric layer 203, and the dielectric layer 203 is performed etching to form patterned dielectric layer 203.
As an example, the material of the dielectric layer 203 includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorus silicon
Glass, one or both of fluorine-containing glass combination of the above.In the present embodiment, it is silica that the dielectric layer 203, which is selected,.
As shown in figure 5, carrying out step 2-2), using chemical vapor deposition method, evaporation process, sputtering technology, galvanizer
Skill or chemical plating process perform etching to be formed in the patterned media 203 forming metal layer on surface of layer to the metal level
Patterned metal wiring layer 204.
As an example, the material of the metal wiring layer 204 include one or both of copper, aluminium, nickel, gold, silver, titanium with
Upper combination.In the present embodiment, the material selection of the metal wiring layer 204 is copper.
It should be noted that the re-wiring layer can include the multiple dielectric layers 203 and multiple gold stacked gradually
Belong to wiring layer 204, according to line demand, each layer metal is realized by being patterned or making through hole to each dielectric layer 203
Interconnection between wiring layer 204, to realize the line demand of difference in functionality.
As an example, the metal coupling 205 can select for copper post, nickel post, solder metal (such as tin ball), copper post and
The combination of the combination of solder metal, nickel post and solder metal, or copper post, metal barrier and solder metal combination etc..
In the present embodiment, the metal coupling 205 is from the combination for copper post, metal barrier and solder metal, institute
Stating the preparation method of metal coupling 205 includes step：
Step a), using galvanoplastic in rewiring layer surface formation copper post；
Step b), metal barrier is formed using galvanoplastic in the copper post surface；
Step c), using galvanoplastic in metal barrier layer surface formation solder metal, and uses high temperature reflow processes
In metal barrier layer surface formation solder bump.
As an example, the metal barrier includes nickel dam, the material of the solder bump includes one in lead, tin and silver
Plant or include the alloy of any one above-mentioned solder metal.
High-quality copper post can be prepared using galvanoplastic, the quality of metal coupling 205 is improved.The metal barrier
The diffusion of solder metal can be stopped, the electrical property of metal coupling 205 is improved.
As an example, the vertical corresponding region of the re-wiring layer and fingerprint recognition chip 206 includes continuous Jie
Matter layer 203, and not comprising metal level, using the identification window 202 as the fingerprint recognition chip 206.Refer to for capacitive
Line identification chip and ultrasonic type, especially for the fingerprint recognition chip of optical profile type, the identification window 202 can obtain good
Good recognition effect.
As shown in Fig. 7~8, step 3 is then carried out) there is provided a fingerprint recognition chip 206, by metal solder joints 207 by institute
Fingerprint recognition chip 206 is stated to be installed on the re-wiring layer, wherein, the fingerprint recognition chip 206 front toward
The re-wiring layer；
As an example, the material that the metal solder joints 207 can be can be the metal materials such as copper, gold, silver, aluminium, tin.
As an example, step 3) in, by metal solder joints 207 by the fingerprint recognition chip 206 be installed in it is described again
After on wiring layer, there is gap, step 3 between the fingerprint recognition chip 206 and the re-wiring layer) be also included in it is described
The step of forming protective layer 208 in gap, the front of the fingerprint recognition chip 206 is completely covered in the protective layer 208.
As an example, the protective layer 208 is transparent polymeric layer, in the present embodiment, the protective layer 208 is selected
For epoxy resin, be formed at by the way of dispensing or molding the fingerprint recognition chip 206 and the re-wiring layer it
Between gap.The protective layer 208 can effectively protect the fingerprint recognition chip 206, for example, the entry types such as steam can be prevented
The other chip of fingerprint, and can as such as hit, press excessively etc. buffer structure.
Of course, it is possible to not make the protective layer 208 and directly the fingerprint recognition chip 206 is entered using encapsulating material
Row encapsulation.
As shown in figure 9, then carrying out step 4), the fingerprint recognition chip 206 is encapsulated using encapsulating material 209, it is described
Metal coupling 205 is exposed to the encapsulating material 209.
As an example, the method for encapsulating the fingerprint recognition chip 206 using encapsulating material 209 includes compression forming, passed
Pass one kind in molded, fluid-tight shaping, vacuum lamination and spin coating, the encapsulating material 209 include polyimides, silica gel with
And one kind in epoxy resin.After encapsulation, the metal coupling 205 is exposed to the encapsulating material 209, in favor of its with it is other
The electrical connection of device or the electrical extraction of itself.
As shown in Figure 10, step 5 is finally carried out), the silicon substrate 201 is thinned from the second surface of the silicon substrate 201.
As an example, the silicon substrate 201 is thinned using mechanical milling tech, the silicon substrate 201 after being thinned
Thickness range is 0 μm~700 μm.For example, the thickness of the silicon substrate 201 is preferably 50~100 μm, it on the one hand can be ensured
Mechanical strength, on the other hand can ensure the thickness of less encapsulating structure.Further illustrate, the silicon substrate 201 can
To be removed completely by reduction process, now, the fingerprint recognition chip can be by the re-wiring layer and/or the protection
Layer 208 is protected.Certainly, other reduction process are equally applicable, however it is not limited to example recited herein.
Finally, suitable framework is configured to packaged fingerprint recognition chip 206, so that it is applied to different function groups
In part, such as mobile phone, tablet personal computer, gate inhibition.
As shown in Figure 10, the present embodiment also provides a kind of encapsulating structure of fingerprint recognition chip 206, the encapsulating structure bag
Include：Silicon substrate 201；Re-wiring layer, is formed on the surface of silicon substrate 201；Metal coupling 205, be formed at it is described again
On wiring layer；Fingerprint recognition chip 206, is installed on the re-wiring layer by metal solder joints 207, wherein, the fingerprint
The front of identification chip 206 is toward the re-wiring layer；And encapsulating material 209, it is covered in the fingerprint recognition chip
206, and the metal coupling 205 is exposed to the encapsulating material 209.
As an example, having shape in gap, the gap between the fingerprint recognition chip 206 and the re-wiring layer
Into matcoveredn 208, the front of the fingerprint recognition chip 206 is completely covered in the protective layer 208.Further, it is described to protect
It is epoxy resin that sheath 208, which is selected,.
As an example, the vertical corresponding region of the re-wiring layer and fingerprint recognition chip 206 includes continuous Jie
Matter layer 203, and not comprising metal level, using the identification window 202 as the fingerprint recognition chip 206.
As an example, the encapsulating material 209 includes one kind in polyimides, silica gel and epoxy resin.
As an example, the re-wiring layer includes patterned dielectric layer 203 and patterned metal wiring layer
204.Further, the material of the dielectric layer 203 includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass,
One or both of fluorine-containing glass combination of the above, the material of the metal wiring layer 204 is included in copper, aluminium, nickel, gold, silver, titanium
One or more kinds of combinations.
As an example, the metal coupling 205 includes copper post, the nickel dam positioned at the copper post upper surface and positioned at institute
State the solder bump on nickel dam.Further, the metal barrier includes nickel dam, the material of the solder bump include lead,
One kind in tin and silver or the alloy for including any one above-mentioned solder metal.
As an example, the thickness range of the silicon substrate 201 is 1 μm~700 μm.For example, in the fingerprint recognition of this example
In the encapsulating structure of chip, the thickness of the silicon substrate 201 is preferably 50~100 μm, on the one hand can ensure its mechanical strength,
On the other hand the thickness of less encapsulating structure can be ensured.The silicon substrate 201 is used as fingerprint recognition chip-packaging structure
Cover sheet, it is not necessary to extra increase sapphire cover plate, technique is smooth, while saving cost.
As shown in figure 11, the use principle of the encapsulating structure of the fingerprint recognition chip 206 of the present embodiment is as shown in figure 11, its
Including：
The first step, the image of identification fingerprint needed for being obtained by the encapsulating structure of fingerprint recognition chip 206.In the present embodiment
In, the image of identification fingerprint needed for being obtained by the identification window 202.
Second step, is pre-processed as follows to the fingerprint image of collection, including：Picture quality judgement, image enhaucament, fingerprint
The gray value of each pixel in fingerprint image (is set to 0 by region detection, fingerprint orientation and frequence estimation, image binaryzation
255) and image thinning or.
3rd step, from pretreated image, obtains the crestal line data of fingerprint.
4th step, from the crestal line data of fingerprint, the characteristic point needed for the identification that takes the fingerprint.
5th step, the feature that takes the fingerprint (information of characteristic point) is matched one by one with the fingerprint characteristic preserved in database,
Determine whether identical fingerprints.
6th step, completes after fingerprint matching processing, exports the result of fingerprint recognition.
As described above, the encapsulating structure and method for packing of the fingerprint recognition chip 206 of the present invention, with following beneficial effect
Really：
1) present invention uses fan-out package (Fan out) fingerprint recognition chip 206, knows compared to existing other fingerprints
For other chip 206 is encapsulated, have the advantages that cost is low, thickness is small, yield is high；
2) present invention is without the need for routing technique, it is not required that the silicon perforation technique (TSV) of high cost, and can realize and refer to
The encapsulation of line identification chip 206, greatly reduces technology difficulty and cost；
3) present invention is directly known using re-wiring layer or re-wiring layer and the lamination of silicon substrate sheet as fingerprint
The cover plate of other chip 206, it is not necessary to increase sapphire cover plate in addition, greatly reduce the thickness and cost of encapsulation；
4) present invention is using encapsulation (Fan out) technique is fanned out to, and the electricity extraction of chip does not need traditional FPC plates, can be with
The thickness of encapsulation and the stability of electrical deriving structure are reduced, encapsulation yield is improved；
5) present invention process is simple, creatively using packaging technology encapsulation fingerprint recognition chip 206 is fanned out to, in semiconductor
Encapsulation technology field is with a wide range of applications.
So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as
Into all equivalent modifications or change, should by the present invention claim be covered.
Claims (20)
1. a kind of encapsulating structure of fingerprint recognition chip, it is characterised in that the encapsulating structure includes：
Silicon substrate；
Re-wiring layer, is formed on the silicon substrate；
Metal coupling, is formed on the re-wiring layer；
Fingerprint recognition chip, is installed on the re-wiring layer by metal solder joints, wherein, the fingerprint recognition chip is just
Facing in the re-wiring layer；And
Encapsulating material, is covered in the fingerprint recognition chip, and the metal coupling is exposed to the encapsulating material.
2. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The fingerprint recognition chip with
Have between the re-wiring layer in gap, the gap and form matcoveredn, the fingerprint is completely covered in the protective layer
The front of identification chip.
3. the encapsulating structure of fingerprint recognition chip according to claim 2, it is characterised in that：It is ring that the protective layer, which is selected,
Oxygen tree fat.
4. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The re-wiring layer is with referring to
The vertical corresponding region of line identification chip includes continuous dielectric layer, and not comprising metal level, to be used as the fingerprint recognition
The identification window of chip.
5. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The encapsulating material includes poly-
One kind in acid imide, silica gel and epoxy resin.
6. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The re-wiring layer includes
Patterned dielectric layer and patterned metal wiring layer.
7. the method for packing of fingerprint recognition chip according to claim 6, it is characterised in that：The material bag of the dielectric layer
Include epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass, one or both of fluorine-containing glass combination of the above, institute
Stating the material of metal wiring layer includes one or both of copper, aluminium, nickel, gold, silver, titanium combination of the above.
8. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The metal coupling includes copper
Post, nickel dam and the solder bump on the nickel dam positioned at the copper post upper surface.
9. the encapsulating structure of fingerprint recognition chip according to claim 8, it is characterised in that：The metal barrier includes
Nickel dam, the material of the solder bump includes one kind in lead, tin and silver or includes the alloy of any one above-mentioned solder metal.
10. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that：The thickness of the silicon substrate
Scope is 1 μm~700 μm.
11. a kind of method for packing of fingerprint recognition chip, it is characterised in that the method for packing includes step：
1) silicon substrate is provided, the silicon substrate has relative first surface and second surface；
2) in forming re-wiring layer on the first surface of the silicon substrate, and it is convex in forming metal on the re-wiring layer
Block；
3) a fingerprint recognition chip is provided, the fingerprint recognition chip is installed in the re-wiring layer by metal solder joints
On, wherein, the front of the fingerprint recognition chip is toward the re-wiring layer；
4) the fingerprint recognition chip is encapsulated using encapsulating material, the metal coupling is exposed to the encapsulating material；And
5) silicon substrate is thinned from the second surface of the silicon substrate.
12. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：Step 3) in, pass through gold
After the fingerprint recognition chip is installed on the re-wiring layer by category solder joint, the fingerprint recognition chip and the cloth again
There is gap, step 3 between line layer) also it is included in the step of forming protective layer in the gap, the protective layer is completely covered
The front of the fingerprint recognition chip.
13. the method for packing of fingerprint recognition chip according to claim 12, it is characterised in that：The protective layer is selected
Epoxy resin, between being formed between the fingerprint recognition chip and the re-wiring layer by the way of the dispensing or molding
Gap.
14. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：The re-wiring layer with
The vertical corresponding region of fingerprint recognition chip includes continuous dielectric layer, and not comprising metal level, to know as the fingerprint
The identification window of other chip.
15. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：Step 2) make described heavy
New route layer includes step：
Dielectric layer 2-1) is formed in the surface of silicon using chemical vapor deposition method or physical gas-phase deposition, and it is right
The dielectric layer performs etching to form patterned dielectric layer；
2-2) using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process in the figure
Change dielectric layer surface formation metal level, and the metal level is performed etching to form patterned metal wiring layer.
16. the method for packing of fingerprint recognition chip according to claim 15, it is characterised in that：The material of the dielectric layer
Including epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass, one or both of fluorine-containing glass combination of the above,
The material of the metal wiring layer includes one or both of copper, aluminium, nickel, gold, silver, titanium combination of the above.
17. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：The system of the metal coupling
Preparation Method includes step：
A) using galvanoplastic in rewiring layer surface formation copper post；
B) metal barrier is formed in the copper post surface using galvanoplastic；
C) using galvanoplastic in metal barrier layer surface formation solder metal, and using high temperature reflow processes in the metal
Barrier layer surface formation solder bump.
18. the method for packing of fingerprint recognition chip according to claim 17, it is characterised in that：The metal barrier bag
Nickel dam is included, the material of the solder bump includes one kind in lead, tin and silver or includes the conjunction of any one above-mentioned solder metal
Gold.
19. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：Encapsulated using encapsulating material
The method of the fingerprint recognition chip includes one in compression forming, Transfer molding, fluid-tight shaping, vacuum lamination and spin coating
Kind, the encapsulating material includes one kind in polyimides, silica gel and epoxy resin.
20. the method for packing of fingerprint recognition chip according to claim 11, it is characterised in that：Step 5) in, using machine
The silicon substrate is thinned tool grinding technics, and the thickness range of the silicon substrate after being thinned is 0 μm~700 μm.
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| CN107481979A (en) * | 2017-09-07 | 2017-12-15 | 中芯长电半导体（江阴）有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
| CN110148567A (en) * | 2019-06-06 | 2019-08-20 | 中芯长电半导体（江阴）有限公司 | A kind of encapsulating structure and packaging method of fingerprint recognition chip |
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