CN108155160A - The encapsulating structure and packaging method of fingerprint recognition chip - Google Patents

The encapsulating structure and packaging method of fingerprint recognition chip Download PDF

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Publication number
CN108155160A
CN108155160A CN201810084203.1A CN201810084203A CN108155160A CN 108155160 A CN108155160 A CN 108155160A CN 201810084203 A CN201810084203 A CN 201810084203A CN 108155160 A CN108155160 A CN 108155160A
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CN
China
Prior art keywords
layer
metal
fingerprint recognition
recognition chip
wiring layer
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Pending
Application number
CN201810084203.1A
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Chinese (zh)
Inventor
陈彦亨
吴政达
林正忠
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SJ Semiconductor Jiangyin Corp
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SJ Semiconductor Jiangyin Corp
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Priority to CN201810084203.1A priority Critical patent/CN108155160A/en
Publication of CN108155160A publication Critical patent/CN108155160A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0237Disposition of the redistribution layers
    • H01L2224/02379Fan-out arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141Disposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors

Abstract

The present invention provides a kind of encapsulating structure and packaging method of fingerprint recognition chip, and encapsulating structure includes:First re-wiring layer includes the first face and the second opposite face;Metal lead wire is electrically connected at the first face of the first re-wiring layer;Fingerprint recognition chip, front have the first metal coupling, and the back side of fingerprint recognition chip is fixed on the first face of the first re-wiring layer;Encapsulating material layer is coated on fingerprint recognition chip;Second re-wiring layer, is formed in the surface of encapsulating material layer, and the second re-wiring layer is electrically connected with metal lead wire and the first metal coupling;And second metal coupling, it is formed in the second face of the first re-wiring layer.The present invention has the advantages that at low cost, thickness is small, yield is high using fan-out package fingerprint recognition chip.Pre-production of the present invention passes through the metal lead wire of encapsulating material layer, does not need to the silicon perforation technique of high cost, greatly reduces technology difficulty and cost.

Description

The encapsulating structure and packaging method of fingerprint recognition chip
Technical field
The present invention relates to a kind of semiconductor package and packaging method, more particularly to a kind of envelope of fingerprint recognition chip Assembling structure and packaging method.
Background technology
As the function of integrated circuit is increasingly stronger, performance and integrated level is higher and higher and novel integrated circuit goes out Existing, encapsulation technology plays an increasingly important role in IC products, shared in the value of entire electronic system Ratio it is increasing.Meanwhile as integrated circuit feature size reaches nanoscale, transistor to more high density, it is higher when Clock frequency develops, and encapsulation also develops to more highdensity direction.
Since fan-out wafer grade encapsulates (fowlp) technology due to having many advantages, such as miniaturization, low cost and high integration, with And with better performance and higher energy efficiency, fan-out wafer grade encapsulation (fowlp) technology become the movement of high request/ The important packaging method of the electronic equipments such as wireless network is one of encapsulation technology most with prospects at present.
Fingerprint identification technology is biometrics identification technology most ripe and cheap at present.For at present, fingerprint is known Other technology is most widely used, not only it can be seen that the figure of fingerprint identification technology, has in the market in gate inhibition, attendance checking system The applications of more fingerprint recognitions:As laptop, mobile phone, automobile, bank paying all can employing fingerprint identify technology.
A kind of packaging method of existing fingerprint recognition chip is as shown in Fig. 1 a~Fig. 1 c:
The first step as shown in Figure 1a, makes deep trouth, and be bonded on FPC plates 102, so in fingerprint recognition chip 101 Metal connecting line 103 is made by routing technique afterwards, realization fingerprint recognition chip 101 is electrically connected with FP C plates 102, wherein, FPC It is the abbreviation of Flexible Printed Circuit, also known as flexible circuit board, with Distribution density is high, light-weight, thickness The characteristics of thin.
Second step as shown in Figure 1 b, produces frame 104;
Third walks, and as illustrated in figure 1 c, sapphire cover board 105 is capped on the fingerprint recognition chip, to complete to encapsulate.
This method has the disadvantages that:Including FPC plates, fingerprint recognition chip and sapphire cover board three-decker, envelope It is thicker to fill thickness, metal connecting line is easily broken caused by FPC soft boards are pullled etc., and whole yield is relatively low.
The packaging method of another fingerprint recognition chip is as shown in Fig. 2 a~Fig. 2 c:
The first step as shown in Figure 2 a, through hole electrode is formed by silicon perforation TSV technology in fingerprint recognition chip 101 106;
Sapphire cover board 105, fingerprint recognition chip 101 and FPC plates 102 as shown in Figure 2 b, are layered in one by second step It rises, metal connecting line 103 is made by routing technique to connect the fingerprint recognition chip 101 and FPC plates 102;
Third walks, and as shown in Figure 2 c, produces frame 104.
This method has the disadvantages that:Need with sapphire cover board encapsulate, thickness is thicker, silicon perforation process costs compared with Height, metal connecting line are easily broken, and the thinner thickness of fingerprint recognition chip caused by FPC soft boards are pullled etc., are susceptible to and split Piece phenomenon, whole yield are relatively low.
Based on the above, a kind of encapsulation of the fingerprint recognition chip of low cost, low thickness and high encapsulation yield is provided Structure and packaging method are necessary.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of encapsulation of fingerprint recognition chip Structure and packaging method, for solving the problems such as fingerprint recognition package thickness is larger in the prior art, yield is relatively low.
In order to achieve the above objects and other related objects, the present invention provides a kind of encapsulating structure of fingerprint recognition chip, institute Encapsulating structure is stated to include:First re-wiring layer includes the first face and the second opposite face;Metal lead wire is electrically connected at institute State first face of the first re-wiring layer;Fingerprint recognition chip, the front of the fingerprint recognition chip have for electrical The first metal coupling drawn, first face of first re-wiring layer is fixed at the back side of the fingerprint recognition chip On;Encapsulating material layer, is coated on the fingerprint recognition chip, and the metal lead wire and first metal coupling are revealed in described The surface of encapsulating material layer;Second re-wiring layer, is formed in the surface of the encapsulating material layer, the described second cloth again Line layer is electrically connected with the metal lead wire and first metal coupling;And second metal coupling, it is formed in described first Second face of re-wiring layer.
Preferably, first re-wiring layer includes:Patterned first medium layer is formed in the separating layer table Face;Patterned metal wiring layer is formed in the patterned first medium layer surface;And patterned second medium Layer, is formed in the patterned metal line layer surface;Wherein, the metal lead wire pass through the second dielectric layer with it is described Metal wiring layer connects, and second metal coupling is connect across the first medium layer with the metal wiring layer.
Further, the first medium layer and the material of second dielectric layer include epoxy resin, silica gel, PI, PBO, The combination of one or more of BCB, silica, phosphorosilicate glass, fluorine-containing glass, the material of the metal wiring layer include The combination of one or more of copper, aluminium, nickel, gold, silver, titanium.
Preferably, the material of the metal lead wire includes one kind in Au, Ag, Cu, Al.
Preferably, the back side of the fingerprint recognition chip is fixed on by DFA glue on first re-wiring layer, described DFA glue includes the combination of hot-setting adhesive and light binding.
Preferably, the encapsulating material includes one kind in polyimides, silica gel and epoxy resin.
Preferably, the vertical corresponding region of second re-wiring layer and fingerprint recognition chip includes continuous medium Layer, and not comprising metal layer, using the identification window as the fingerprint recognition chip.
Preferably, the thickness of second re-wiring layer is not more than 20 microns.
Preferably, second re-wiring layer includes:Patterned first medium layer, is formed in the encapsulating material layer Surface;Patterned metal wiring layer is formed in the patterned first medium layer surface, the metal wiring layer and institute It states metal lead wire and first metal coupling is electrically connected;And second dielectric layer, it is covered in the metal line layer surface.
The present invention also provides a kind of packaging method of fingerprint recognition chip, the packaging method includes step:1) one is provided Support substrate forms separating layer in the substrate surface;2) in forming the first re-wiring layer in the separating layer, and pass through weldering Wiring technology on first re-wiring layer in forming metal lead wire;3) a fingerprint recognition chip, the fingerprint recognition core are provided The front of piece has the first metal coupling for electrically drawing, and the back side of the fingerprint recognition chip is fixed on described first On re-wiring layer;4) the fingerprint recognition chip is encapsulated using encapsulating material layer, and causes the metal lead wire and described the One metal coupling is revealed in the upper surface of the encapsulating material layer;5) second is formed again in the upper surface of the encapsulating material layer Wiring layer, second re-wiring layer are electrically connected with the metal lead wire and first metal coupling;6) based on described Detach support substrate described in layer separation and first re-wiring layer;And 7) in forming on second re-wiring layer Two metal couplings.
Preferably, the support substrate includes glass substrate, metal substrate, Semiconductor substrate, polymer substrate and ceramics One kind in substrate, the separating layer include one kind in adhesive tape and polymeric layer, and the polymeric layer uses spin coating work first Skill is coated on the support substrate surface, then makes its curing molding using ultra-violet curing or heat curing process.
Preferably, step 2) making first re-wiring layer includes step:
2-1) first is formed in the separation layer surface using chemical vapor deposition method or physical gas-phase deposition to be situated between Matter layer;
2-2) using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process in described Dielectric layer surface forms metal layer, and the metal layer is performed etching to form patterned metal wiring layer;And
2-3) using chemical vapor deposition method or physical gas-phase deposition in covering second on the metal wiring layer Dielectric layer, and processing is patterned to the second dielectric layer, appear the metal wiring layer of part, with realization and subsequently The electric connection of the metal lead wire of making.
Further, the first medium layer and the material of second dielectric layer include epoxy resin, silica gel, PI, PBO, The combination of one or more of BCB, silica, phosphorosilicate glass, fluorine-containing glass, the material of the metal wiring layer include The combination of one or more of copper, aluminium, nickel, gold, silver, titanium.
Preferably, in step 2), the bonding wire craft includes hot pressing bonding wire craft, supersonic welding Wiring technology and hot pressing ultrasound One kind in wave soldering Wiring technology, the material of the metal lead wire include one kind in Au, Ag, Cu, Al.
Preferably, in step 3), the back side of the fingerprint recognition chip is fixed on by the described first cloth again using DFA glue On line layer, the DFA glue includes the combination of hot-setting adhesive and light binding.
Preferably, compression forming, transfer modling are included using the method that encapsulating material layer encapsulates the fingerprint recognition chip One kind in molding, fluid-tight molding, vacuum lamination and spin coating, the encapsulating material include polyimides, silica gel and asphalt mixtures modified by epoxy resin One kind in fat.
Preferably, the vertical corresponding region of second re-wiring layer and fingerprint recognition chip includes continuous medium Layer, and not comprising metal layer, using the identification window as the fingerprint recognition chip.
Preferably, the thickness of second re-wiring layer is not more than 20 microns.
Preferably, step 5) making second re-wiring layer includes step:5-1) using chemical vapor deposition method Or physical gas-phase deposition forms patterned first medium layer in the upper surface of the encapsulating material layer;5-2) using chemistry Gas-phase deposition, evaporation process, sputtering technology, electroplating technology or chemical plating process are in the patterned dielectric layer surface shape It performs etching to form patterned metal wiring layer into metal layer, and to the metal layer, the metal wiring layer and the gold Belong to lead and first metal coupling is electrically connected;And 5-3) in forming second dielectric layer on the metal wiring layer.
Preferably, first metal coupling includes and is connected to the conductive column of the fingerprint recognition chip and positioned at described The brazing metal on conductive column surface;The material of second metal coupling includes one or more being formed in lead, tin and silver Alloy.
As described above, the encapsulating structure and packaging method of the fingerprint recognition chip of the present invention, have the advantages that:
1) present invention is using fan-out package (Fan out) fingerprint recognition chip, compared to existing other fingerprint recognitions For chip package, have the advantages that at low cost, thickness is small, yield is high;
2) pre-production of the present invention passes through the metal lead wire of encapsulating material layer, does not need to the silicon perforation technique of high cost (TSV) it just can realize the encapsulation of fingerprint recognition chip, greatly reduce technology difficulty and cost;
3) present invention does not need in addition increase sapphire directly using cover board of the re-wiring layer as fingerprint recognition chip Cover board greatly reduces the thickness and cost of encapsulation;
4) for the present invention using encapsulation (Fan out) technique is fanned out to, the electricity extraction of chip does not need to traditional FPC plates, can be with The thickness of encapsulation and the stability of electrical deriving structure are reduced, improves encapsulation yield;
5) present invention process is simple, creatively using packaging technology encapsulation fingerprint recognition chip is fanned out to, has good Conformability is with a wide range of applications in technical field of semiconductor encapsulation.
Description of the drawings
What each step of packaging method that Fig. 1 a~Fig. 1 c are shown as a kind of fingerprint recognition chip of the prior art was presented Structure diagram.
Each step of packaging method that Fig. 2 a~Fig. 2 c are shown as another fingerprint recognition chip of the prior art is presented Structure diagram.
Fig. 3~Figure 12 is shown as the structural representation that each step of packaging method of the fingerprint recognition chip of the present invention is presented Figure.
Component label instructions
201 support substrates
202 separating layers
203 first medium layers
204 first metal wiring layers
205 second dielectric layer
206 metal lead wires
207 DFA glue
208 fingerprint recognition chips
209 identification regions
210 conductive columns
211 brazing metals
212 encapsulating material layers
213 third dielectric layers
214 second metal wiring layers
215 the 4th dielectric layers
216 second metal couplings
217 identification windows
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from Various modifications or alterations are carried out under the spirit of the present invention.
Please refer to Fig. 3~Figure 12.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way The basic conception of invention, package count when only display is with related component in the present invention rather than according to actual implementation in illustrating then Mesh, shape and size are drawn, and kenel, quantity and the ratio of each component can be a kind of random change during actual implementation, and its Assembly layout kenel may also be increasingly complex.
As shown in Fig. 3~Figure 12, the present embodiment provides a kind of packaging method of fingerprint recognition chip 208, the encapsulation sides Method includes step:
As shown in figure 3, carrying out step 1) first, a support substrate 201 is provided, separating layer is formed in the substrate surface 202。
As an example, the support substrate 201 include glass substrate, metal substrate, Semiconductor substrate, polymer substrate and One kind in ceramic substrate.In the present embodiment, the support substrate 201 is selected as glass substrate, the glass substrate cost It is relatively low, separating layer 202 is easily formed on its surface, and the difficulty of subsequent stripping technology can be reduced.
As an example, the separating layer 202 includes one kind in adhesive tape and polymeric layer, the polymeric layer uses first Spin coating proceeding is coated on 201 surface of support substrate, then makes its curing molding using ultra-violet curing or heat curing process.
In the present embodiment, it is heat-curable glue that the separating layer 202, which is selected, and being formed in the support by spin coating proceeding serves as a contrast After on bottom 201201, its curing molding is made by heat curing process.Heat-curable glue performance is stablized, and surface is more smooth, after being conducive to The making of continuous re-wiring layer, also, in subsequent stripping technology, the difficulty of stripping is relatively low, can have been obtained after stripping Re-wiring layer whole and of good performance.
As shown in Fig. 4~Fig. 5, step 2) is then carried out, in forming the first re-wiring layer in the separating layer 202, and By bonding wire craft in formation metal lead wire 206 on first re-wiring layer.
Step 2) makes first re-wiring layer and includes step:
Step 2-1), using chemical vapor deposition method or physical gas-phase deposition in the 202 surface shape of separating layer Into first medium layer 203.
As an example, the material of the first medium layer 203 include epoxy resin, silica gel, PI, PBO, BCB, silica, The combination of one or more of phosphorosilicate glass, fluorine-containing glass.In the present embodiment, the material of the first medium layer 203 For PI.
Step 2-2), using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process Metal layer is formed, and the metal layer is performed etching to form patterned first metal wiring layer in the dielectric layer surface 204。
As an example, the material of first metal wiring layer 204 includes copper, aluminium, nickel, gold, silver, one kind in titanium or two Kind combination of the above.In the present embodiment, the material selection of first metal wiring layer 204 is copper.
Step 2-3), using chemical vapor deposition method or physical gas-phase deposition in first metal wiring layer Second dielectric layer 205 is covered on 204, and processing is patterned to the second dielectric layer 205, appears described the first of part Metal wiring layer 204, to realize the electric connection of metal lead wire 206 with subsequently making, specifically, first gold medal appeared Belong to wiring layer 204 and be located at the peripheral side of fingerprint recognition chip 208 subsequently made.
As an example, the material of the second dielectric layer 205 include epoxy resin, silica gel, PI, PBO, BCB, silica, The combination of one or more of phosphorosilicate glass, fluorine-containing glass.In the present embodiment, the material of the second dielectric layer 205 It selects as PI.
The bonding wire craft includes one in hot pressing bonding wire craft, supersonic welding Wiring technology and thermosonic bonding wire craft Kind, the material of the metal lead wire 206 includes one kind in Au, Ag, Cu, Al.In the present embodiment, the metal lead wire 206 Material selection be Au.
As shown in Fig. 6~Fig. 7, step 3) is then carried out, a fingerprint recognition chip 208, the fingerprint recognition chip are provided 208 front has the first metal coupling for electrically drawing, and the back side of the fingerprint recognition chip 208 is fixed on described On first re-wiring layer.
The fingerprint recognition chip 208 has identification region 209, and 209 peripheral side of identification region has electrical connection area Domain, first metal coupling are connected to the electric coupling area, and the identification region 209 and the electric coupling area are located at institute State the front of fingerprint recognition chip 208.As an example, first metal coupling, which includes, is connected to the fingerprint recognition chip 208 conductive column 210 and the brazing metal 211 positioned at 210 surface of conductive column.The material of the conductive column 210 includes Cu, the material of the brazing metal 211 include Sn.
The back side of the fingerprint recognition chip 208 is fixed on first re-wiring layer using DFA glue 207, institute State the combination that DFA glue 207 includes hot-setting adhesive and light binding.
As shown in figure 8, then carrying out step 4), the fingerprint recognition chip 208 is encapsulated using encapsulating material layer 212, and So that the metal lead wire 206 and first metal coupling are revealed in the upper surface of the encapsulating material layer 212.
Using encapsulating material layer 212 encapsulate the fingerprint recognition chip 208 method include compression forming, transfer modling into One kind in type, fluid-tight molding, vacuum lamination and spin coating, the encapsulating material include polyimides, silica gel and epoxy resin In one kind.
As shown in figure 9, then carrying out step 5), the second rewiring is formed in the upper surface of the encapsulating material layer 212 Layer, second re-wiring layer are electrically connected with the metal lead wire 206 and first metal coupling.
Step 5) makes second re-wiring layer and includes step:
Step 5-1), using chemical vapor deposition method or physical gas-phase deposition in the encapsulating material layer 212 Upper surface forms patterned third dielectric layer 213.
As an example, the material of the third dielectric layer 213 include epoxy resin, silica gel, PI, PBO, BCB, silica, The combination of one or more of phosphorosilicate glass, fluorine-containing glass.In the present embodiment, the material of the third dielectric layer 213 It selects as PI.
Step 5-2), using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process Metal layer is formed, and the metal layer is performed etching to form patterned second metal in the patterned dielectric layer surface Wiring layer 214, second metal wiring layer 214 are electrically connected with the metal lead wire 206 and first metal coupling.
As an example, the material of second metal wiring layer 214 includes copper, aluminium, nickel, gold, silver, one kind in titanium or two Kind combination of the above.In the present embodiment, the material selection of second metal wiring layer 214 is copper.
Step 5-3), in the 4th dielectric layer 215 of formation on second metal wiring layer 214.
As an example, the material of the 4th dielectric layer 215 include epoxy resin, silica gel, PI, PBO, BCB, silica, The combination of one or more of phosphorosilicate glass, fluorine-containing glass.In the present embodiment, the material of the 4th dielectric layer 215 It selects as PI.
The vertical corresponding region of second re-wiring layer and fingerprint recognition chip 208 includes continuous dielectric layer, And not comprising metal layer, using the identification window 217 as the fingerprint recognition chip 208.For capacitive fingerprint recognition core Piece 208 and ultrasonic type, especially for the fingerprint recognition chip 208 of optical profile type, the identification window 217 can obtain well Recognition effect.
Preferably, the thickness of second re-wiring layer is not more than 20 microns.For example, second re-wiring layer Thickness can be 10~15 microns, to ensure its protecting effect to the fingerprint recognition chip 208, and further improve institute State the recognition effect of identification window 217.
As shown in Figure 10, then carry out step 6), based on the separating layer 202 detach the support substrate 201 with it is described First re-wiring layer.
As an example, the attribute according to the separating layer 202, may be used such as mechanical stripping, laser lift-off, chemical stripping The methods of (such as wet etching), detaches the support substrate 201 and first re-wiring layer.
As shown in Figure 11~Figure 12, finally carry out step 7), on second re-wiring layer formed lower metal layer with And the second metal coupling 216 on the lower metal layer.
The material of second metal coupling 216 includes one or more formed alloys in lead, tin and silver.
As shown in figure 12, the present embodiment also provides a kind of encapsulating structure of fingerprint recognition chip 208, the encapsulating structure packet It includes:First re-wiring layer includes the first face and the second opposite face;Metal lead wire 206 is electrically connected at described first again First face of wiring layer;Fingerprint recognition chip 208, the front of the fingerprint recognition chip 208 have electrically to draw The first metal coupling, first face of first re-wiring layer is fixed at the back side of the fingerprint recognition chip 208 On;Encapsulating material layer 212 is coated on the fingerprint recognition chip 208, the metal lead wire 206 and first metal coupling It is revealed in the surface of the encapsulating material layer 212;Second re-wiring layer is formed in the table of the encapsulating material layer 212 Face, second re-wiring layer are electrically connected with the metal lead wire 206 and first metal coupling;And second metal Convex block 216 is formed in the second face of first re-wiring layer.
As an example, first re-wiring layer includes:Patterned first medium layer 203, is formed in the separation 202 surface of layer;Patterned first metal wiring layer 204 is formed in patterned 203 surface of first medium layer;And Patterned second dielectric layer 205 is formed in patterned first metal wiring layer, 204 surface;Wherein, the metal draws Line 206 is connect across the second dielectric layer 205 with the metal wiring layer, and second metal coupling 216 passes through described the One dielectric layer 203 is connect with the metal wiring layer.Further, the first medium layer 203 and the material of second dielectric layer 205 Material includes one or more of epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass, fluorine-containing glass group It closes, the material of the metal wiring layer includes the combination of one or more of copper, aluminium, nickel, gold, silver, titanium.
As an example, the material of the metal lead wire 206 includes one kind in Au, Ag, Cu, Al.
As an example, first rewiring is fixed in the back side of the fingerprint recognition chip 208 by DFA glue 207 On layer, the DFA glue 207 includes the combination of hot-setting adhesive and light binding.
As an example, the encapsulating material includes one kind in polyimides, silica gel and epoxy resin.
As an example, the vertical corresponding region of second re-wiring layer and fingerprint recognition chip 208 includes continuously Dielectric layer, and not comprising metal layer, using the identification window 217 as the fingerprint recognition chip 208.
As an example, the thickness of second re-wiring layer is not more than 20 microns.
As an example, second re-wiring layer includes:Patterned third dielectric layer 213, is formed in the encapsulation The surface of material layer 212;Patterned second metal wiring layer 214 is formed in patterned 213 table of third dielectric layer Face, second metal wiring layer 214 are electrically connected with the metal lead wire 206 and first metal coupling;And the 4th Dielectric layer 215 is covered in 214 surface of the second metal wiring layer.
As described above, the encapsulating structure and packaging method of the fingerprint recognition chip 208 of the present invention, have below beneficial to effect Fruit:
1) present invention is known using fan-out package (Fan out) fingerprint recognition chip 208 compared to existing other fingerprints For the other encapsulation of chip 208, have the advantages that at low cost, thickness is small, yield is high;
2) pre-production of the present invention passes through the metal lead wire 206 of encapsulating material layer 212, does not need to the silicon perforation work of high cost Skill (TSV) just can realize the encapsulation of fingerprint recognition chip 208, greatly reduce technology difficulty and cost;
3) present invention does not need in addition increase blue directly using cover board of the re-wiring layer as fingerprint recognition chip 208 Jewel cover board greatly reduces the thickness and cost of encapsulation;
4) for the present invention using encapsulation (Fan out) technique is fanned out to, the electricity extraction of chip does not need to traditional FPC plates, can be with The thickness of encapsulation and the stability of electrical deriving structure are reduced, improves encapsulation yield;
5) present invention process is simple, creatively using packaging technology encapsulation fingerprint recognition chip 208 is fanned out to, has good Conformability, be with a wide range of applications in technical field of semiconductor encapsulation.
So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as Into all equivalent modifications or change, should by the present invention claim be covered.

Claims (20)

1. a kind of encapsulating structure of fingerprint recognition chip, which is characterized in that the encapsulating structure includes:
First re-wiring layer includes the first face and the second opposite face;
Metal lead wire is electrically connected at first face of first re-wiring layer;
Fingerprint recognition chip, the front of the fingerprint recognition chip have the first metal coupling for electrically drawing, the finger The back side of line identification chip is fixed on first face of first re-wiring layer;
Encapsulating material layer, is coated on the fingerprint recognition chip, and the metal lead wire and first metal coupling are revealed in institute State the surface of encapsulating material layer;
Second re-wiring layer is formed in the surface of the encapsulating material layer, second re-wiring layer and the gold Belong to lead and first metal coupling is electrically connected;And
Second metal coupling is formed in the second face of first re-wiring layer.
2. the encapsulating structure of fingerprint recognition chip according to claim 1, which is characterized in that first re-wiring layer Including:
Patterned first medium layer is formed in the separation layer surface;
Patterned metal wiring layer is formed in the patterned first medium layer surface;And
Patterned second dielectric layer is formed in the patterned metal line layer surface;
Wherein, the metal lead wire is connect across the second dielectric layer with the metal wiring layer, second metal coupling It is connect across the first medium layer with the metal wiring layer.
3. the encapsulating structure of fingerprint recognition chip according to claim 2, it is characterised in that:The first medium layer and The material of second medium layer includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass, one kind in fluorine-containing glass or Two or more combinations, the material of the metal wiring layer include the combination of one or more of copper, aluminium, nickel, gold, silver, titanium.
4. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:The material of the metal lead wire Including one kind in Au, Ag, Cu, Al.
5. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:The fingerprint recognition chip The back side is fixed on by DFA glue on first re-wiring layer, and the DFA glue includes the combination of hot-setting adhesive and light binding.
6. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:The encapsulating material includes poly- One kind in acid imide, silica gel and epoxy resin.
7. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:Second re-wiring layer Include continuous dielectric layer with the vertical corresponding region of fingerprint recognition chip, and not comprising metal layer, using as the fingerprint The identification window of identification chip.
8. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:Second re-wiring layer Thickness be not more than 20 microns.
9. the encapsulating structure of fingerprint recognition chip according to claim 1, it is characterised in that:Second re-wiring layer Including:
Patterned first medium layer is formed in the surface of the encapsulating material layer;
Patterned metal wiring layer, is formed in the patterned first medium layer surface, the metal wiring layer with it is described Metal lead wire and first metal coupling are electrically connected;And
Second dielectric layer is covered in the metal line layer surface.
10. a kind of packaging method of fingerprint recognition chip, which is characterized in that the packaging method includes step:
1) support substrate is provided, separating layer is formed in the substrate surface;
2) in forming the first re-wiring layer in the separating layer, and pass through bonding wire craft in shape on first re-wiring layer Into metal lead wire;
3) a fingerprint recognition chip is provided, the front of the fingerprint recognition chip is convex with the first metal for being used to electrically draw The back side of the fingerprint recognition chip is fixed on first re-wiring layer by block;
4) the fingerprint recognition chip is encapsulated using encapsulating material layer, and causes the metal lead wire and first metal coupling It is revealed in the upper surface of the encapsulating material layer;
5) the second re-wiring layer, second re-wiring layer and the metal are formed in the upper surface of the encapsulating material layer Lead and first metal coupling are electrically connected;
6) based on support substrate and first re-wiring layer described in the separation layer separation;And
7) in forming the second metal coupling on second re-wiring layer.
11. the packaging method of fingerprint recognition chip according to claim 1, it is characterised in that:The support substrate includes One kind in glass substrate, metal substrate, Semiconductor substrate, polymer substrate and ceramic substrate, the separating layer include adhesive tape And one kind in polymeric layer, the polymeric layer are coated on the support substrate surface using spin coating proceeding first, then adopt Make its curing molding with ultra-violet curing or heat curing process.
12. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:Step 2) makes described the One re-wiring layer includes step:
First medium layer 2-1) is formed in the separation layer surface using chemical vapor deposition method or physical gas-phase deposition;
2-2) using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process in the medium Layer surface forms metal layer, and the metal layer is performed etching to form patterned metal wiring layer;And
2-3) using chemical vapor deposition method or physical gas-phase deposition in covering second medium on the metal wiring layer Layer, and processing is patterned to the second dielectric layer, appear the metal wiring layer of part, made with realizing with follow-up Metal lead wire electric connection.
13. the packaging method of fingerprint recognition chip according to claim 12, it is characterised in that:The first medium layer and The material of second dielectric layer includes epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass, one kind in fluorine-containing glass Or two or more combinations, the material of the metal wiring layer include one or more of copper, aluminium, nickel, gold, silver, titanium group It closes.
14. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:In step 2), the weldering Wiring technology includes one kind in hot pressing bonding wire craft, supersonic welding Wiring technology and thermosonic bonding wire craft, and the metal draws The material of line includes one kind in Au, Ag, Cu, Al.
15. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:In step 3), using DFA The back side of the fingerprint recognition chip is fixed on first re-wiring layer by glue, and the DFA glue includes hot-setting adhesive and light The combination of solid glue.
16. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:It is sealed using encapsulating material layer The method for filling the fingerprint recognition chip is included in compression forming, Transfer molding, fluid-tight molding, vacuum lamination and spin coating One kind, the encapsulating material include one kind in polyimides, silica gel and epoxy resin.
17. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:Second rewiring Layer includes continuous dielectric layer with the vertical corresponding region of fingerprint recognition chip, and does not include metal layer, using as the finger The identification window of line identification chip.
18. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:Second rewiring The thickness of layer is not more than 20 microns.
19. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:Step 5) makes described the Two re-wiring layers include step:
It 5-1) is formed and schemed in the upper surface of the encapsulating material layer using chemical vapor deposition method or physical gas-phase deposition The first medium layer of shape;
5-2) using chemical vapor deposition method, evaporation process, sputtering technology, electroplating technology or chemical plating process in the figure The dielectric layer surface of change forms metal layer, and the metal layer is performed etching to form patterned metal wiring layer, the gold Belong to wiring layer to be electrically connected with the metal lead wire and first metal coupling;And
5-3) in forming second dielectric layer on the metal wiring layer.
20. the packaging method of fingerprint recognition chip according to claim 10, it is characterised in that:First metal coupling Include the conductive column for being connected to the fingerprint recognition chip and the brazing metal positioned at the conductive column surface;Second gold medal The material for belonging to convex block includes one or more formed alloys in lead, tin and silver.
CN201810084203.1A 2018-01-29 2018-01-29 The encapsulating structure and packaging method of fingerprint recognition chip Pending CN108155160A (en)

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