CN105428347A - 一种微系统三维芯片叠层封装的改进方法 - Google Patents

一种微系统三维芯片叠层封装的改进方法 Download PDF

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CN105428347A
CN105428347A CN201510995885.8A CN201510995885A CN105428347A CN 105428347 A CN105428347 A CN 105428347A CN 201510995885 A CN201510995885 A CN 201510995885A CN 105428347 A CN105428347 A CN 105428347A
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王福亮
王峰
朱文辉
李军辉
韩雷
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Central South University
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Abstract

本发明公开了一种微系统三维芯片叠层封装的改进方法，将ASIC芯片和应用处理器通过硅基转接板固定在传统基板上，可以从根本上解决传统基板集成所面临的热难以散出、应力破坏、集成密度低等难题。本发明所述的方法简单巧妙的将硅基转接板应用在微系统封装中，大幅消除封装应力对微系统性能的影响，实现超高密度的互连以及高性能的计算、存储能力。

Description

一种微系统三维芯片叠层封装的改进方法
技术领域
本发明属于微电子封装领域，涉及一种微系统三维芯片叠层封装的改进方法。
背景技术
微系统封装是将不同功能的裸芯片、器件通过微互连技术，混合于一个封装体内，同时对外引出I/O端子，实现机械固连，形成多功能集成系统的过程，其成本占到器件成本的60-80％，是微系统制造的重要组成部分。目前，微系统封装主要采用基于PCB、金属或者陶瓷基板的三维叠层封装技术，大体可分为叠层芯片封装、叠层封装体封装。这些方法相对于二维封装具有尺寸小、重量轻、硅片使用效率高、信号延迟短等优点。但缺点也很明显：1)硅和PCB基板在CTE上的差异使得服役过程中的温度变化给微系统带来严重的应力问题，影响执行/传感器件性能，削弱乃至丧失了微系统的功能；2)其集成互连引线的宽度大于10um，焊盘尺寸超过100um，凸点尺寸也难以小于50um，限制了三维集成密度的提高、限制了三维集成系统的计算处理能力；3)器件封装体内温度集中，容易引发热可靠性问题。
目前，针对上述热和应力问题，业界一般采用热源平衡、结构优化等方法来缓解；针对集成密度低问题，则采用多层PCB板布线来提高集成密度，但都无法从根本上解决，并增加了大量的成本。
上述基于传统PCB、金属或者陶瓷基板的传统三维封装方法无法满足微系统在低温键合、应力清除、热应力敏感、微结构工作过程中热变形敏感等方面的特殊需求。
发明内容
本发明提出了一种采用硅基转接板，从根本上解决传统PCB板集成所面临的热、应力、集成密度低等难题的封装方法。
一种微系统三维芯片叠层封装的改进方法，将ASIC芯片和应用处理器通过硅基转接板互连，并固定在PCB、金属或者陶瓷基板上。
应用处理器上植上直径50‐150微米的BGA焊球。
即在原有的PCB基板上增设一层硅基转接板。
存储器与应用处理器之间通过硅基转接板连接。
执行/传感器件与ASIC芯片采用叠层芯片封装堆叠互连。
应用处理器/存储器采用叠层封装体封装堆叠互连。
有益效果
本发明提出了一种微系统三维芯片叠层封装的改进方法，在现有技术的基础上，将ASIC芯片和应用处理器通过硅基转接板固定在PCB基板上，可以从根本上解决传统PCB板集成所面临的热、应力、集成密度低等难题。硅基转接板一般用于FPGA、存储器等IC器件的高密度互连，用以解决单芯片上无法提供足够多的逻辑电路、存储电路的难题。然而在本发明所述的方法中，简单巧妙的将硅基转接板应用在微系统封装中，改进方式完全不同于现有技术中的研发方向，具有以下优点：
1)采用硅基转接板取代传统PCB基板，可以大幅消除封装应力对微系统性能的影响。由于转接板与器件/芯片都是硅基，因此，不存在CTE失配问题，可以最大程度上降低热失配带来的应力问题；同时，通过硅基转接板，可以将来自PCB基板的环境热源隔离开来，进一步降低系统的热应力问题。
2)采用硅基转接板在芯片封装级取代传统基板(PCB、金属或者陶瓷基板)，可以实现超高密度的互连以及高性能的计算、存储能力。目前，硅基转接板的线宽可以低到0.1-0.4um，互连微铜柱(Copperpillar)尺寸可小到10-20um，与传统PCB基板集成相比，硅基转接板可以提供超高的集成密度，满足微系统三维集成中复杂、多维、多域的传感信号实时处理与实时响应输出所需的高性能计算需求，实现智能、分布式的传感与执行微系统。
3)硅基转接板可以提供快速散热通道，为三维结构中功率器件的热管理提供高性能方案。由于硅基转接板可以将含高I/O密度芯片的信号通过TSV垂直结构扇出到尺度较大的凸点，然后直接和后续工艺基板(如PCB板)连接，提供了大量的快速垂直散热通道，避免器件封装体内温度集中所带来的热可靠性问题。
因此，本发明形成了一种用硅基转接板代替传统PCB、金属或者陶瓷基板的微系统三维叠层封装方法，与现有的基于PCB基板的三维封装方法相比，具有明显的性能和技术优势。采用基于硅基转接板的微系统三维芯片叠层封装新方法，以实现高性能传感/执行与高性能计算处理的集成，对微系统封装具有重要意义。
附图说明
图1为本发明所述方法的封装示意图；
标号说明：1-执行/传感器，2-ASIC芯片，3-硅基转接基板、板，4-PCB基板，5-BGA焊球，6-应用处理器，7-第一存储器，8-第二存储器。
具体实施方式
下面将结合附图和实施例对本发明做进一步的说明。
如图1所示，一种微系统三维芯片叠层封装的改进方法，具体步骤如下：
1)首先，根据微系统封装应用的需要，设计硅转接板A上的重布线层、TSV布局以实现器件之间的互连；
2)将ASIC器件、执行/传感器件用贴片机贴装在转接基上，用引线键合机，完成ASIC与执行/传感器，以及ASIC/执行/传感器与转接板的互连；
3)根据数据与信号处理的要求，设计硅基转接板B的重布线层及TSV布局；
4)将存储器件用贴片机贴装在转接板上，并用引线键合机完成存储器与硅基转接板B的互连；
5)在应用处理器上植上直径50-150微米、在硅基转接板B上植上直径100-300微米合适尺寸的BGA焊球，并将它们用回流倒装或热压倒装的方法安装在硅基转接板A上，实现微系统内部各种器件的集成互连；
6)在硅基转接板B的反面植上直径100-300微米合适尺寸的BGA焊球，以实现在PCB板上的组装，成为电子器件系统的组成部件。

Claims (4)

1.一种微系统三维芯片叠层封装的改进方法，其特征在于，将ASIC芯片和应用处理器通过硅基转接板互连，并固定在PCB、金属或者陶瓷基板基板上。
2.根据权利要求1所述的方法，其特征在于，存储器与应用处理器之间通过硅基转接板的重布线层连接。
3.根据权利要求1或2所述的方法，其特征在于，执行/传感器件与ASIC芯片采用叠层芯片封装形式堆叠，并通过转接基板的重布线层互连。
4.根据权利要求1或2所述的方法，其特征在于，应用处理器/存储器采用叠层封装体封装堆叠，并通过转接基板的重布线层互连。
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Cited By (6)

* Cited by examiner, † Cited by third party
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CN107063232A (zh) * 2016-12-23 2017-08-18 中国电子科技集团公司信息科学研究院 高密度集成的导航定位授时微装置及其集成方法
CN110054143A (zh) * 2019-04-30 2019-07-26 西安微电子技术研究所 一种小型化抗高过载硅基微系统装置及其组装方法
CN110581124A (zh) * 2019-09-12 2019-12-17 西安电子科技大学 一种多层次融合的三维系统集成结构的制备方法
CN112366194A (zh) * 2020-11-02 2021-02-12 上海燧原智能科技有限公司 一种桥接芯片及半导体封装结构
CN112366193A (zh) * 2020-11-02 2021-02-12 上海燧原智能科技有限公司 一种桥接芯片及半导体封装结构
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