CN105378920B - 具有堆叠式存储器元件的半导体器件以及用于将存储器元件堆叠在半导体器件上的方法 - Google Patents

具有堆叠式存储器元件的半导体器件以及用于将存储器元件堆叠在半导体器件上的方法 Download PDF

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CN105378920B
CN105378920B CN201480008501.2A CN201480008501A CN105378920B CN 105378920 B CN105378920 B CN 105378920B CN 201480008501 A CN201480008501 A CN 201480008501A CN 105378920 B CN105378920 B CN 105378920B
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memory device
tube core
semiconductor devices
substrate
coupled
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CN105378920A (zh
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B·M·亨德森
S·顾
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Qualcomm Inc
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Qualcomm Inc
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Abstract

一种半导体器件，包括耦合至基板的管芯，耦合至该管芯的与基板相对的表面的第一存储器器件，以及耦合在该管芯的与基板相对的表面和第二存储器器件之间的耦合器件，以使得第二存储器器件至少部分地与第一存储器器件交叠。还公开了一种用于以至少部分交叠的方式将第一和第二存储器器件安装到管芯上的方法。

Description

具有堆叠式存储器元件的半导体器件以及用于将存储器元件 堆叠在半导体器件上的方法
公开领域
本公开涉及其上堆叠有存储器元件的半导体器件以及用于将存储器元件堆叠在半导体器件上的方法，更具体地，涉及具有与第二存储器元件至少部分交叠的第一存储器元件的半导体器件，以及用于以至少部分交叠的方式将存储器元件堆叠在半导体器件上的方法。
发明背景
对于某些应用，诸如透硅堆叠(TSS)逻辑搭载存储器(memory-on-logic)，可能期望使两个存储器元件并排地安装在半导体器件上(例如，使两个动态随机存取存储器(DRAM)管芯安装在专用集成电路(ASIC)上)以便提高总体容量。各种其他类型的存储器(随机存取存储器(RAM)、静态RAM(SRAM)、相变RAM(PRAM)、磁性RAM(MRAM)等)可被用于其他应用中，并且以类似的方式安装。
出于可用性和成本目的，用于堆叠式应用的宽I/O DRAM管芯常常被配置为单管芯。高容量宽I/O DRAM管芯可具有约8－12mm长的边。将两个这样的管芯放置在每条边也是约8－12mm的ASIC上呈现出机械方面的困难，因为DRAM管芯的较大部分不受支撑地在ASIC的各条边上延伸。此外，DRAM上的电气接口不可与ASIC相交。
图1解说了常规的安装布置，并且描绘了安装在封装基板104上的半导体管芯102，半导体管芯102包括位于半导体管芯102的与封装基板104相对的一侧上的重分布层106。第一和第二存储器元件(在这一示例中是第一DRAM108和第二DRAM 110)通过微凸块112安装在重分布层106上并与其电连接。如将从图1和示出以上的第一DRAM 108和第二DRAM 110的图2中显而易见的，第一和第二DRAM 108、110的组合面积明显大于半导体管芯102的表面积，因而第一和第二DRAM 108、110中的每一者的很大部分延伸出半导体管芯102的外周并且不受支撑。这一配置可能容易遭受机械故障并且可能难以放置在基板上，因为第一和第二DRAM 108、110的悬突延伸到半导体管芯102的版图之外。另外，这种布置可能要求背面层上相对较长的布线，并且可能要求接口被放置成非常靠近半导体管芯102的边缘以容适第一和第二DRAM108、110。
图3中解说了用于将两个存储器元件安装在半导体管芯上的另一常规布置。图3解说了安装在封装基板304上的半导体管芯302。中介体306被安装在半导体管芯302的与封装基板304相对的一侧上，并且中介体306具有与安装在其上的第一DRAM 308和第二DRAM 310的组合面积大致一样大的面积。中介体306提供半导体管芯302与第一DRAM 308和第二DRAM310之间的机械支撑以及电连接。然而，中介体306必须具有精细的互连间距，并且中介体306的大小和必要的小互连间距使得中介体306变得昂贵。
因此将期望获得使两个存储器元件安装在半导体管芯上而同时又基本上避免上述困难的益处。
概述
本发明的第一示例性实施例涉及一种半导体器件，其包括耦合至基板的管芯，耦合至所述管芯的与所述基板相对的表面的第一存储器器件，以及耦合在所述管芯的与所述基板相对的表面和第二存储器器件之间的耦合器件。所述第二存储器器件与所述第一存储器器件至少部分地交叠。
本发明的另一示例性实施例是一种半导体器件，其包括安装在基板上的管芯，所述管芯具有朝向所述基板的第一表面和与所述基板相对的第二表面。第一存储器器件被安装在所述管芯的第二表面上，耦合器件被安装在所述管芯的第二表面上，并且第二存储器器件至少部分地覆盖在所述第一存储器器件之上并且至少部分地覆盖在所述耦合器件之上。此外，所述第二存储器器件通过所述耦合器件电耦合到所述管芯。
本发明的进一步示例性实施例是一种用于形成半导体器件的方法，该方法包括将管芯耦合到基板，以使得管芯的第一表面朝向所述基板，且所述管芯的第二表面背朝所述基板，将第一存储器器件耦合到所述管芯的所述第二表面，以及将第二存储器器件耦合到所述管芯的所述第二表面，以使得所述第二存储器器件的至少第一部分与所述第一存储器器件交叠。
本发明的附加示例性实施例包括一种半导体器件，其包括安装在基板上的管芯，所述管芯具有朝向所述基板的第一表面和与所述基板相对的第二表面，安装在所述管芯的所述第二表面上的第一存储器器件，第二存储器器件，以及安装装置，所述安装装置用于将所述第二存储器器件安装到所述管芯的所述第二表面以使得所述第二存储器器件至少部分地与所述第一存储器器件交叠，并且用于将所述第二存储器器件耦合到所述管芯。
本发明的又一示例性实施例包括一种用于形成半导体器件的方法，该方法包括用于将管芯耦合到基板以使得所述管芯的第一表面朝向所述基板且所述管芯的第二表面背朝所述基板的步骤，用于将第一存储器器件耦合到所述管芯的所述第二表面的步骤，以及用于将第二存储器器件耦合到所述管芯的所述第二表面以使得所述第二存储器器件的至少第一部分与所述第一存储器器件交叠的步骤。
本发明的另一示例性实施例包括一种包含指令的非瞬态计算机可读存储介质，所述指令在由计算机执行时使所述计算机：将管芯耦合到基板，以使得所述管芯的第一表面朝向所述基板，且所述管芯的第二表面背朝所述基板；将第一存储器器件耦合到所述管芯的所述第二表面；以及将第二存储器器件耦合到所述管芯的所述第二表面，以使得所述第二存储器器件的至少第一部分与所述第一存储器器件交叠。
附图简述
给出附图以帮助对本发明实施例进行描述，且提供附图仅用于解说实施例而非对其进行限定。
图1是具有以常规方式安装在其上的两个存储器元件的半导体器件的示意性侧立面视图。
图2是图1的半导体器件和存储器元件的俯视平面图。
图3是具有以另一种常规方式安装在其上的两个存储器元件的半导体器件的示意性侧立面视图。
图4是根据本公开的第一实施例的具有安装在其上的两个存储器元件的半导体器件的示意性侧立面视图。
图5是根据本公开的另一实施例的具有安装在其上的两个存储器元件的半导体器件的示意性侧立面视图。
图6是解说根据本公开的实施例的方法的流程图。
图7是其中可使用本公开的实施例的示例性无线通信系统的示意图。
详细描述
本发明的各方面在以下针对本发明具体实施例的描述和有关附图中被公开。可以设计替换实施例而不会脱离本发明的范围。另外，本发明中众所周知的元素将不被详细描述或将被省去以免湮没本发明的相关细节。
措辞“示例性”在本文中用于表示“用作示例、实例或解说”。本文中描述为“示例性”的任何实施例不必被解释为优于或胜过其他实施例。同样，术语“本发明的各实施例”并不要求本发明的所有实施例都包括所讨论的特征、优点、或工作模式。
本文中所使用的术语仅出于描述特定实施例的目的，而并不旨在限定本发明的实施例。如本文所使用的，单数形式的“一”、“某”和“该”旨在也包括复数形式，除非上下文另有明确指示。还将理解，术语“包括”、“具有”、“包含”和/或“含有”在本文中使用时指明所陈述的特征、整数、步骤、操作、元素、和/或组件的存在，但并不排除一个或多个其他特征、整数、步骤、操作、元素、组件和/或其群组的存在或添加。
此外，许多实施例是根据将由例如计算设备的元件执行的动作序列来描述的。将认识到，本文描述的各种动作能由专用电路(例如，专用集成电路(ASIC))、由正被一个或多个处理器执行的程序指令、或由这两者的组合来执行。另外，本文描述的这些动作序列可被认为是完全体现在任何形式的计算机可读存储介质内，其内存储有一经执行就将使相关联的处理器执行本文所描述的功能性的相应计算机指令集。因此，本发明的各种方面可以用数种不同形式来体现，所有这些形式都已被构想落在所要求保护的主题内容的范围内。另外，对于本文描述的每个实施例，任何此类实施例的对应形式可在本文中被描述为例如“被配置成执行所描述的动作的逻辑”。
图4解说了安装在封装基板404上的半导体管芯402，并且半导体管芯402包括位于半导体管芯402的与封装基板404相对的一侧上的重分布层406。半导体管芯402具有由外沿408限定的外周。第一存储器器件410(其可包括DRAM)具有顶表面412，并且被安装在半导体管芯402上，以使得第一存储器器件410的大部分或全部覆盖在半导体管芯402之上。取决于第一存储器器件410和半导体管芯402的相对尺寸，第一存储器器件410可被完全安装在半导体管芯402的外周以内，或者如图4中所解说的，第一存储器器件410的一小部分414可延伸超出半导体管芯402的外沿408。第一存储器器件410通过位于重分布层406上的第一位置处的微凸块416耦合到重分布层406，以使得半导体管芯402能够与第一存储器器件410通信。
中介体418毗邻第一存储器器件410地安装在重分布层406上，并且可完全位于半导体管芯402的外周以内，或者如图4中所解说的，中介体418的一小部分420可延伸超出半导体管芯402的外沿408。中介体418具有顶表面422以及与第一存储器器件410的厚度大致相同的厚度，以使得当第一存储器器件410和中介体418被安装在重分布层406上时，第一存储器器件410的顶表面412和中介体418的顶表面422处于距重分布层406大致相同的距离处。中介体418上的微凸块424提供中介体418与重分布层406上的第二位置之间的电连接。中介体418还包括通孔(未示出)，以将中介体418的顶表面422上的位置连接到微凸块424并提供穿过中介体418的电通路。中介体418还可包括在其顶表面或底表面上的重分布层(未示出)，但一般不需要在中介体418上使用重分布层。
第二存储器器件426被安装在中介体418上并耦合到中介体418，以使得第二存储器器件426至少部分地与第一存储器器件410交叠。微凸块428提供第二存储器器件426和中介体418之间的电连接。第二存储器器件426由此覆盖在第一存储器器件410的顶表面412以及中介体418的顶表面422之上。与其中第一和第二存储器器件被安装在同一平面中的常规布置相比，以这种方式安装第二存储器器件426增加了由半导体管芯402以及第一存储器器件410和第二存储器器件426形成的封装的组合高度；然而，此堆叠布置显著地减小了封装的横向尺寸，并且避免了在两个存储器元件108、110如图1－3中解说的那样在单个平面内安装在半导体管芯102上时可能发生的电气和机械方面的困难。
第二存储器器件426可搁置在第一存储器器件410的顶表面412上和/或机械连接到第一存储器器件410的顶表面412，或者第二存储器器件426可仅仅在第一存储器器件410的顶表面412上方较小距离处延伸。有益地，与共面安装布置相比，此布置还缩短了第二存储器器件426和半导体管芯402之间的电连接的长度。可选地，分隔件430(其可以是导热的)可毗邻第二存储器器件426地安装在第一存储器器件410的顶表面412的未被第二存储器器件426覆盖的剩余部分上。分隔件430可用硅或具有类似热和机械属性的其他材料形成，并且可通过均衡模塑封装(其包括第一和第二存储器器件410、426)中的机械应力来增强机械完整性和/或增强热传递。
图5解说了包括安装在封装基板404上的半导体管芯502的另一实施例，其中半导体管芯502包括与封装基板404相对的顶表面504。半导体管芯502不包括重分布层，但取而代之具有用于产生与第一存储器器件410的微凸块416的电连接的第一位置506以及用于产生与中介体418的微凸块424的电连接的第二位置508。这一实施例的其他元件与图4的实施例中的那些元件相同。
图6解说了根据本公开的一个实施例的方法，该方法包括框600，将管芯耦合到基板，以使得管芯的第一表面朝向基板，而管芯的第二表面背朝基板；框602，将第一存储器器件耦合到管芯的第二表面；以及框604，将第二存储器器件耦合到管芯的第二表面，以使得第二存储器器件的至少第一部分与第一存储器器件交叠。
图7解说了其中可有利地采用本公开的一个或多个实施例的示例性无线通信系统700。出于解说目的，图7示出了三个远程单元720、730和750以及两个基站740。将认识到，常规无线通信系统可具有远多于此的远程单元和基站。远程单元720、730和750包括如下将进一步讨论的作为本公开的实施例的集成电路或其他半导体设备725、735和755。图7示出了从两个基站740到远程单元720、730、和750的前向链路信号780，以及从远程单元720、730、和750到两个基站740的反向链路信号790。
在图7中，远程单元720被示为移动电话，远程单元730被示为便携式计算机，且远程单元750被示为无线本地环路系统中的位置固定的远程单元。例如，这些远程单元可以是移动电话、手持式个人通信系统(PCS)单元、便携式数据单元(诸如个人数据助理(PDA))、导航设备(诸如启用GPS的设备)、机顶盒、音乐播放器、视频播放器、娱乐单元、位置固定的数据单元(诸如仪表读数装置)、或者存储或检索数据或计算机指令的任何其他设备、或者其任何组合中的任一者或其组合。尽管图7解说了根据本公开的教义的远程单元，但本公开并不限于这些所解说的示例性单元。本公开的各实施例可适于用在具有有源集成电路系统(包括存储器以及用于测试和表征的片上电路系统)的任何设备中。
本领域技术人员将领会，信息和信号可使用各种不同技术和技艺中的任何一种来表示。例如，贯穿上面描述始终可能被述及的数据、指令、命令、信息、信号、位(比特)、码元、和码片可由电压、电流、电磁波、磁场或磁粒子、光场或光粒子、或其任何组合来表示。
此外，本领域技术人员将领会，结合本文中所公开的实施例描述的各种解说性逻辑块、模块、电路、和算法步骤可被实现为电子硬件、计算机软件、或两者的组合。为清楚地解说硬件与软件的这一可互换性，各种解说性组件、块、模块、电路、和步骤在上面是以其功能性的形式作一般化描述的。此类功能性是被实现为硬件还是软件取决于具体应用和施加于整体系统的设计约束。技术人员对于每种特定应用可用不同的方式来实现所描述的功能性，但这样的实现决策不应被解读成导致脱离了本发明的范围。
结合本文中所公开的实施例描述的方法、序列和/或算法可直接在硬件中、在由处理器执行的软件模块中、或者在这两者的组合中体现。软件模块可驻留在RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动盘、CD-ROM、或者本领域中所知的任何其他形式的存储介质中。示例性存储介质耦合到处理器以使得该处理器能从/向该存储介质读写信息。在替换方案中，存储介质可以被整合到处理器。
相应地，本发明的一实施例可包括实施用于形成半导体器件的方法的计算机可读介质。相应地，本发明并不限于所解说的示例且任何用于执行文本所描述的功能性的手段均被包括在本发明的实施例中。
尽管上述公开示出了本发明的解说性实施例，但是应当注意到，在其中可作出各种更换和改动而不会脱离如所附权利要求定义的本发明的范围。根据本文中所描述的本发明实施例的方法权利要求的功能、步骤和/或动作不必按任何特定次序来执行。此外，尽管本发明的要素可能是以单数来描述或主张权利的，但是复数也是已料想了的，除非显式地声明了限定于单数。

Claims (15)

1.一种半导体器件，包括：
耦合至基板的管芯；
耦合至所述管芯的与所述基板相对的表面的第一存储器器件；
耦合在所述管芯的与所述基板相对的表面和第二存储器器件之间的耦合器件，其中所述第二存储器器件至少部分地与所述第一存储器器件交叠；
位于所述管芯与所述第一存储器器件和所述耦合器件之间的重分布层，其中所述重分布层促成将所述第一存储器器件和所述耦合器件进行耦合；以及
导热分隔件，所述导热分隔件毗邻所述第二存储器器件并且与所述第一存储器器件的剩余部分基本上交叠。
2.如权利要求1所述的半导体器件，其特征在于，所述第一或第二存储器器件中的至少一者是DRAM。
3.如权利要求1所述的半导体器件，其特征在于，所述第一或第二存储器器件中的至少一者是从包括以下各项的组中选择的：随机存取存储器(RAM)、静态RAM(SRAM)、相变RAM(PRAM)、以及磁性RAM(MRAM)。
4.如权利要求1所述的半导体器件，其特征在于，所述耦合器件是中介体或分隔件。
5.如权利要求1所述的半导体器件，其特征在于，所述管芯具有将所述管芯电耦合到所述重分布层的单个接口。
6.如权利要求1所述的半导体器件，其特征在于，所述耦合器件具有与所述第一存储器器件的高度基本相同的高度。
7.一种包括如权利要求1所述的半导体器件的设备，所述设备选自包括机顶盒、音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、个人数字助理(PDA)、固定位置数据单元和计算机的组。
8.一种半导体器件，包括：
安装在基板上的管芯，所述管芯具有朝向所述基板的第一表面和与所述基板相对的第二表面；
安装在所述管芯的所述第二表面上的第一存储器器件；
安装在所述管芯的所述第二表面上的耦合器件；
至少部分地覆盖所述第一存储器器件并且至少部分地覆盖所述耦合器件的第二存储器器件，所述第二存储器器件通过所述耦合器件电耦合到所述管芯；以及导热分隔件，所述导热分隔件毗邻所述第二存储器器件并且与所述第一存储器器件的剩余部分基本上交叠。
9.如权利要求8所述的半导体器件，其特征在于，所述耦合器件在所述第二表面上毗邻所述第一存储器器件。
10.如权利要求8所述的半导体器件，其特征在于，所述第一或第二存储器器件中的至少一者是DRAM。
11.如权利要求8所述的半导体器件，其特征在于，所述耦合器件是中介体或分隔件。
12.如权利要求8所述的半导体器件，其特征在于，进一步包括：
位于所述管芯和所述第一存储器器件之间的重分布层，其中所述重分布层促成将所述第一存储器器件和所述第二存储器器件耦合到所述管芯。
13.如权利要求8所述的半导体器件，其特征在于，所述耦合器件具有与所述第一存储器器件基本相同的高度。
14.一种包括如权利要求8所述的半导体器件的设备，所述设备选自包括机顶盒、音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、个人数字助理(PDA)、固定位置数据单元和计算机的组。
15.一种半导体器件，包括：
安装在基板上的管芯，所述管芯具有朝向所述基板的第一表面和与所述基板相对的第二表面；
安装在所述管芯的所述第二表面上的第一存储器器件；
第二存储器器件；
安装装置，用于将所述第二存储器器件安装到所述管芯的所述第二表面以使得所述第二存储器器件至少部分地与所述第一存储器器件交叠，并且用于将所述第二存储器器件电耦合到所述管芯；
位于所述管芯与所述第一存储器器件和所述安装装置之间的重分布层，其中所述重分布层促成将所述第一存储器器件和所述安装装置进行耦合；以及
导热分隔件，所述导热分隔件毗邻所述第二存储器器件并且与所述第一存储器器件的剩余部分基本上交叠。
CN201480008501.2A 2013-02-13 2014-02-12 具有堆叠式存储器元件的半导体器件以及用于将存储器元件堆叠在半导体器件上的方法 Active CN105378920B (zh)

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