CN105280473A - 减少单颗化半导体片芯中残余污染物的方法 - Google Patents
减少单颗化半导体片芯中残余污染物的方法 Download PDFInfo
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Abstract
本发明涉及减少单颗化半导体片芯中残余污染物的方法。在一个实施例中,通过将半导体晶片放置到承载带上、形成穿过半导体晶片的单颗化道以及减少半导体晶片上残余污染物的存在,从半导体晶片单颗化半导体片芯。
Description
相关申请案
本申请要求美国临时申请No.62/007,794的优先权的权益,该申请提交于2014年6月4日,当前是共同未决的,并且其全文并入本文中。
发明背景
本发明整体涉及电子器件,并且更具体地涉及形成半导体的方法。
在过去,半导体工业利用各种方法和设备从半导体晶片(wafer)单颗化(singulate)单个半导体片芯(die),片芯制造于半导体晶片上。通常,使用被称作划片或切片的技术借助金刚石切轮沿着划片网格或单颗化道部分或完全切割穿过晶片,所述划片网格或单颗化道形成于晶片上且位于单个片芯之间。为允许切片轮的对准和宽度,每个划片网格通常具有一般为约一百五十(150)微米的巨大宽度,,其占据半导体晶片的大部分。另外,在半导体晶片上将每条单颗化道划片所需的时间可花费一小时或更久。该时间降低了生产设施的吞吐量和制造能力。
其他方法,包括热激光分离(TLS)、隐形切片(从晶片背面进行激光切片)以及等离子体切片,已被研发作为划片的替换方案。相比于划片和其他替代工艺,等离子体切片是一种有发展前途的工艺,因为其支持较窄的划片道,增大了吞吐量,并且可将片芯单颗化为多种的和灵活的图案。然而,等离子体切片已具有制造实施挑战。这样的挑战包括与晶片后侧层诸如背部金属层的不兼容性,因为所述蚀刻工艺已经不能有效地从单颗化道去除后侧层。从划片道去除后侧层对于促进后续加工诸如取放和装配工艺是必要的。进一步地,等离子体切片可在表面上留下污染物诸如残留聚合物材料或氟残留,其中所述表面包括但不限于单颗化片芯的侧壁表面。此类污染物可降低单颗化片芯的质量和可靠性。
因此,期望具有减少来自从半导体晶片分离的片芯的残余污染物的存在的方法。如果所述方法是成本有效的且将对分离的片芯的任何损坏最小化,则将是有益的。
附图说明
图1示出根据本发明的半导体晶片的实施例的缩小平面图;
图2至图10示出在根据本发明的实施例从晶片单颗化片芯的工艺中各个阶段的图1的半导体晶片的实施例的部分剖视图;
图11示出在根据本发明的实施例的加工的后期阶段的图10或图15的半导体晶片的实施例的部分剖视图;
图12至图15示出在根据本发明的另一实施例从晶片单颗化片芯的各个阶段的图1的半导体晶片的实施例的部分剖视图;以及
图16示出根据本发明的另一实施例的部分剖视图。
为简单且清楚的说明起见,图中要素未必按比例绘制,并且不同附图中的相同参考编号表示相同要素。另外,为了说明书的简单起见,已熟知步骤和要素的细节描述被省略。为附图的清楚起见,器件结构的某些区域,诸如掺杂区或电介质区,可被示出为具有大致直线的边缘和精确的角落。但是,本领域技术人员理解的是,由于掺杂剂的扩散和活化或层的形成,此类区域的边缘通常可以不是直线,并且该角可以不是精确的角度。此外,当与半导体区域、晶片或衬底一起使用时,术语“主表面”表示与另一种材料诸如电介质、绝缘体、导体或多晶半导体一起形成界面的半导体区域、晶片或衬底的表面。主表面可具有在x方向、y方向和z方向上变化的外形。
具体实施方式
图1为缩小的平面图,其以图形示出在后期制造步骤的半导体晶片10。晶片10包括形成于半导体晶片10上并且作为其的一部分形成的多个半导体片芯,诸如片芯12、14、16和18。片芯12、14、16和18在晶片10上按间隔彼此间隔开,在所述间隔中将要形成或限定单颗化道,诸如划片道或单颗化道13、15、17和19。如本领域中熟知的,晶片10上的所有半导体片芯通常在所有侧面上按区域彼此分开,在所述区域中将要形成划片道或单颗化道诸如单颗化道13、15、17和19。片芯12、14、16和18可为任何种类的电子器件,包括半导体器件诸如二极管、晶体管、分立器件、传感器器件、光学器件、集成电路或本领域技术人员已知的其他器件。在一个实施例中,晶片10已完成晶片加工,所述晶片加工包括下文描述的后侧层的形成。
图2示出在根据第一实施例的片芯单颗化方法中的早期阶段的晶片10的放大剖视图。在一个实施例中,晶片10附接到承载衬底、转移带或承载带30,这些有利于支撑单颗化后的多个片芯。此类承载带为本领域技术人员所熟知。在一个实施例中,承载带30可附接到框架40,该框架40可包括框架部分或部分401和402。如图所示,承载带30可附接到框架部分401的表面4010,并附接到框架部分402的表面4020。
在所示的横截面中,晶片10可包括大块衬底11诸如硅衬底,其可包括相对的主表面21和22。在一个实施例中,可沿主表面21的部分形成接触焊盘24,以提供形成于衬底11之内的结构与下一级别的组件或外部元件之间的电接触。例如,接触焊盘24可被形成以接收键合线或线夹,该键合线或线夹可随后附接到接触焊盘24,或者接触焊盘24可被形成以接收焊料球、凸块或其他类型的附接结构。接触焊盘24通常可为金属或其他导电材料。通常,电介质材料26诸如毡状沉积电介质层可在主表面21上形成或覆盖其形成,以充当晶片10的钝化层。在一个实施例中,电介质材料26可为以比衬底11的速率更慢的速率进行蚀刻的材料。在一个实施例中,当衬底11为硅时,电介质材料26可为氧化硅、氮化硅或聚酰亚胺。
在一个实施例中,可在电介质材料26(以及可以在电介质材料26下方形成的其他电介质层)中形成开口,以暴露接触焊盘24的下面表面和衬底11的表面,单颗化道13、15、17和19将在衬底11的表面中形成。如图所示并且根据本实施例,晶片10进一步包括形成于晶片10的主表面22上或覆盖该主表面22形成的材料层28。在一个实施例中,层28可为导电的背衬金属层。在一个实施例中,层28可为多层金属系统,诸如,钛/镍/银、钛/镍/银/钨、铬/镍/金、铜、铜合金、金或本领域技术人员已知的其他材料。在另一个实施例中,层28可为晶片背面涂层(WBC)膜,诸如片芯附接涂层。
图3示出在等离子体蚀刻单颗化工艺期间的后续步骤的晶片10的放大剖视图。在一个实施例中,晶片10可被安装在承载带30上并且然后可被放置在蚀刻装置300诸如等离子体蚀刻装置内。在一个实施例中,衬底11可通过开口蚀刻,以形成或限定从主表面21延伸的单颗化道或开口13、15、17和19。蚀刻工艺可使用化学作用(通常被表示为箭头31)执行,所述化学作用以比电介质和/或金属的速率高得多的速率选择性地对硅进行蚀刻。在一个实施例中,可使用常被称作Bosch工艺的工艺来蚀刻晶片10。在一个实施例中,可在深反应离子蚀刻系统中使用Bosch工艺蚀刻晶片10。该系统购自美国弗罗里达州圣彼德斯堡的PlasmaThermLLC。在一个实施例中,单颗化道13、15、17和19的宽度可为约五微米至约十五微米。因为大致如图4所示的蚀刻选择性,所以该宽度足以确保形成单颗化道13、15、17和19的开口可完全穿过衬底11形成并且邻近层28停止。在一个实施例中,层28可用作等离子体蚀刻单颗化工艺的停止层。在一个实施例中,可使用Bosch工艺在约十五至约三十分钟内形成单颗化道13、15、17和19。
图5示出在后续工艺步骤时的晶片10的剖视图。在一个实施例中,根据本实施例,使用加压流体去除步骤、流体消融步骤或流体机加工步骤从单颗化道13、15、17和19内去除层28的部分。在一个实施例中,可将包括在承载带30上的晶片10的框架40放置在流体旋转冲洗装置60中。在一个实施例中,晶片10的主表面21可面朝上或远离承载带30。在一个实施例中,装置60可配置有放置在晶片10上方的喷嘴或分配固定装置61,如图5所示。框架40和承载带30可被放置在支撑结构63诸如真空吸盘上。在一个实施例中,结构63可被配置成大致如箭头64所示进行旋转或转动。在一个实施例中,结构63可被配置成使承载带30大致如箭头69所示拉伸或伸展,从而对层28提供另外的力以帮助从单颗化道内去除或分开层28。
装置60可包括桶状或盆状结构67,其可用于包含并采集穿过出口68进入收集桶71中的工艺流出物。本方法和装置的一个有益效果是,来自在机加工工艺期间去除的层28的材料可被存储用于回收或用于环保处理技术。
在一个实施例中,可在Disco牌旋转冲洗装置中使用上述工艺去除层28或对其机加工。在该工艺中,在结构63和晶片10旋转时,可从喷嘴61分配机加工介质诸如流体72。在一个实施例中,喷嘴61可大致如箭头74所示移动或跨晶片10摆动。在一个实施例中,流体72可为液体、气体、它们的混合物或去除层28同时最小化对片芯12、14、16和18造成的损坏或不期望污染物的其他材料。在一个实施例中,流体72可为水。在另一个实施例中,流体72可为空气或氮气。在一个实施例中,可对流体72添加表面活性剂,诸如由美国亚利桑那州凤凰城的KETECA制造的DiamaflowTM表面活性剂。在一个实施例中,可对流体72添加磨料。
在其他实施例中,流体72可为被配置成减少保留在片芯12、14、16和18的外表面或暴露表面(包括与单颗化道13、15、17和19相邻的侧壁表面)上的残余膜或层的存在的组分。在一个实施例中,流体72可为电子级溶剂,其被配置成在等离子体切片工艺之后减少在片芯上剩余的残余聚合物材料和/或其他污染物或不期望溶质(例如,氟化溶质)的存在,并且最小限度地影响承载衬底30的特性。预期去除约若干微米的残余材料应当不严重地损坏承载衬底30。在一个实施例中,流体72可为丙酮、乙腈、甲醇、2-丙醇、可在水中混溶的其他溶剂,或能够去除如本领域技术人员已知的不期望溶质的其他组分。在一个实施例中,流体72可为去离子水与丙酮的混合物。在一些实施例中,流体72可在室温下施加。在其他实施例中,流体72可被加热或冷却。在另选实施例中,晶片10可浸入在包含流体72的浴槽中。在进一步的实施例中,流体72不需要是加压的,而是可被沉积到晶片10上,并且然后晶片10可以高速旋转以将流体72散布在晶片10上。在其他实施例中,可使用批量喷雾工具诸如喷雾溶剂工具,将流体72沉积或设置在晶片10和载体40上或其两侧上。该工具购自美国加利福尼亚州圣塔克拉拉的应用材料公司。根据本实施例,术语溶剂包括但不限于,被配置成溶解另一种材料的物质;或被配置成对材料进行底切的物质,所述物质然后可被清洗掉。
在一个实施例中,可使用如下工艺条件来去除层28。例如,流体72可为在约10,342千帕斯卡(Kpa)至约20,684Kpa(约1500磅/平方英寸(psi)至约3000psi)的压力下的去离子水,其中所述数据在流体泵处测量。晶片10可以约700rpm至1500rpm的速率旋转,在此情况下流体72在约2分钟至约5分钟内流动到晶片10上。
应当理解,本文所述方法还可用于从单颗化道13、15、17和/或19内去除其他结构,诸如对准图案、测试结构和/或残余半导体材料,这些材料在等离子体蚀刻工艺期间不能去除。在下文描述的步骤可在一个实施例中使用,以从单颗化道去除剩余的部分280。
图6示出在单颗化道13、15、17和19内的层28的部分已被去除之后的晶片10的剖视图。如该实施例所示,在之前描述的流体机加工工艺之后,层28的部分280可保留。因为当使用单颗化工艺诸如等离子体单颗化来代替需要宽得多的单颗化道的常规切片工艺时,单颗化道13、15、17和19被配置有较窄的宽度,所以部分280可保留。
图7示出在后续工艺步骤时的晶片10的剖视图。在一个实施例中,可将承载带30暴露于紫外光(UV)光源以降低带的粘附性。最后,承载带301可沿晶片10的上表面(即,覆盖在晶片10的主表面21上)、框架部分401的表面4011和框架部分402的表面4021施加于或附接到导电焊盘24。在一个实施例中,承载带301和承载带30可为类似材料。在另一个实施例中,承载带301可为与承载带30不同的材料或者可具有与其不同的特性,诸如粘附和/或拉伸特性。根据本实施例,在承载带301被施加之后,可从晶片10和框架40去除承载带30以暴露层28和部分280。
图8示出在后续加工期间的晶片10的剖视图。在一个实施例中,晶片10被再次放置在装置60内,其中层28面朝上(或面向喷嘴61),并且层28的部分280可利用如之前描述的流体机加工工艺去除。例如,流体72可为在约10,342Kpa至约20,684Kpa(约1500psi至约3000psi)的压力下的去离子水,其中所述数据在流体泵处测量。晶片10可以约700rpm至1500rpm的速率旋转,在此情况下流体72在约2分钟至约5分钟内流动到晶片10上。在一个实施例中,在层28的部分280已被去除之后,以及来自单颗化道13、15、17和/或19的任何其他不期望材料已被去除之后,晶片10可从装置60去除,以提供如图9所示的中间结构。
图10示出在后续加工期间的晶片10的剖视图。在一个实施例中,承载带301可暴露于UV光源,以降低带的粘附性。在一个实施例中,承载带302可施加于或附接到晶片10的层28、框架部分401的表面4010和框架部分402的表面4020。在一个实施例中,承载带302、承载带301和承载带30可为类似材料。在另一个实施例中,承载带302可为与承载带30和/或承载带301不同的材料或者可具有与它们不同的特性,诸如粘附和/或拉伸特性。根据本实施例,在承载带302被施加之后,可从晶片10和框架40去除承载带301以暴露覆盖在晶片10的上表面21上的导电焊盘24。在后续步骤中,可使用例如大致如图11所示的拾放装置81从承载带302去除片芯12、14、16和18,作为进一步的组装工艺的一部分。在一个实施例中,可在拾放步骤之前使承载带302暴露于UV光源,以降低带的粘附性。
图12示出在根据另选实施例的单颗化工艺之后的晶片10的剖视图。晶片10可附接到承载带30,承载带30可进一步附接到框架40,如先前结合图2描述的。但是,在该实施例中,承载带301可施加于或附接到接触焊盘24,其中接触焊盘24覆盖在晶片10的上表面上(即,覆盖晶片10的主表面21上)、框架部分401的表面4011和框架部分402的表面4021。根据本实施例,在承载带301被施加后,可从层28、晶片10和框架40去除承载带30,以使层28暴露,如图13所示。在一个实施例中,可在施加承载带301之前使承载带30暴露于UV光源,以降低带的粘著性。
在后续步骤中,然后将具有暴露或面朝上(或面向喷嘴61)的层28的晶片10放置在装置60内,并且可从单颗化道13、15、17和19去除层28的部分,如图14所示。在一个实施例中,下面的工艺条件可用于去除层28的部分。例如,流体72可为在约10,342Kpa至约20,684Kpa(约1500psi至约3000psi)的压力下的去离子水,其中所述数据在流体泵处测量。晶片10可以约700rpm至1500rpm的速率旋转,在此情况下流体72在约2分钟至约5分钟内流动到晶片10上。
图15示出在进一步加工后的晶片10的剖视图。在一个实施例中,承载带301可暴露于UV光源,以降低带的粘附性。随后,承载带302可施加于或附接到晶片10的层28、框架部分401的表面4010和框架部分402的表面4020。根据本实施例,在承载带302被施加后,可从晶片10和框架40去除承载带301,以使覆盖在晶片10的上表面21上的导电焊盘24暴露。在后续步骤中,可使用例如大致如图11所示的拾放装置81从承载带302去除片芯12、14、16和18。
应当理解,在流体机加工工艺期间,承载带30、301和/或302可拉伸或伸展,以便进一步帮助从单颗化道内去除不期望材料。另外,装置60可包括兆声波装置,以在流体72中生成受控的声空化。此外,流体72可被加热或冷却。
图16示出另一个实施例的剖视图。在承载衬底10上的晶片10可被放置在装置601中,该装置601可类似于装置60。在该实施例中,层28可为晶片背面涂层(WBC)膜,诸如片芯附接涂层。在一个实施例中,在承载衬底30上的晶片10可被拉伸以增大相邻片芯之间的距离。在一个实施例中,工件96可用于拉伸承载衬底30。工件96可为例如拱形条或穹顶形结构。该拉伸可使用流体72增强从单颗化道13、15、17和19去除层28。在一个实施例中,晶片10可被冷却至较低的温度以提高层28的脆性。在一个实施例中,流体72或晶片10中的任一者或两者可被加热以增强层28的去除。在一个实施例中,当流体72流动时,工件96可横跨晶片10移动。在另一个实施例中,当流体72流动时,工件96和晶片10可旋转(大致如箭头64所示)。在一些实施例中,在减少单颗化后的半导体晶片10上的残余污染物的存在时,可使用装置601。
根据上述全部内容,本领域技术人员可以确定的是,根据一个实施例,加工半导体片芯的方法包括提供具有多个半导体片芯(例如,要素12、14、16、18)的半导体晶片(例如,要素10),其中所述多个半导体片芯形成于半导体晶片上并且彼此按间距分开,其中半导体晶片具有第一和第二相对主表面(例如,要素21、22)。该方法包括将半导体晶片放置到第一承载衬底(例如,要素30)上,并通过间距单颗化半导体晶片以便形成单颗化道(例如,要素13、15、17、19),以及使用第一流体(例如,要素72)从多个半导体片芯的表面减少残余污染物的存在。
在另一个实施例中,方法可包括沿第二主表面提供材料层(例如,要素28),并且将半导体晶片放置到第一承载衬底上可包括将材料层放置成与第一承载衬底相邻。根据进一步的实施例,单颗化半导体晶片包括靠近材料层停止。根据进一步的实施例,方法可进一步包括使用加压的第二流体从单颗化道去除材料层的至少部分。根据另一个实施例,第二流体可与第一流体不同。根据进一步的实施例,去除材料层的部分可包括,在材料层附接到第一承载衬底时,使用第二流体去除材料层的第一部分,将第二承载衬底附接到半导体晶片的第一主表面,去除第一承载衬底,以及使用第三流体去除材料层的第二部分。根据进一步的实施例,第三流体可以为加压的。根据另一个实施例,方法可进一步包括在去除第二部分之后,将第三承载衬底附接到第二主表面上,并去除第二承载衬底。根据另一个实施例,去除材料层的部分可包括,将第二承载衬底附接到半导体晶片的第一主表面,去除第一承载衬底,以及使用第二流体从单颗化道去除材料层的部分。根据进一步的实施例,减少残余污染物的存在包括用溶剂减少聚合物材料的存在。根据进一步的实施例,将半导体晶片放置到第一承载衬底上包括将半导体晶片放置到承载带上。根据另一个实施例,单颗化半导体晶片包括对半导体晶片进行等离子体蚀刻。根据另一个实施例,方法可进一步包括拉伸第一承载衬底至少一些时间段,从而将第一流体施加于半导体晶片。根据进一步的实施例,第一流体可以是加压的。根据进一步的实施例,可以在使用第二流体去除材料层的至少部分的步骤之后施加第一流体,并且第一流体可从材料层所在的同一主表面施加。
根据上述全部内容,本领域技术人员可以确定的是,根据另一个实施例,单颗化衬底的方法包括提供具有多个片芯(例如,要素12、14、16、18)的衬底(例如,要素10),其中所述多个片芯形成于衬底上并且彼此之间按间距分开,其中衬底具有第一和第二相对主表面(例如,要素21、22),并且其中形成材料层(例如,要素28)覆盖在第二主表面上。该方法包括将第一承载带(例如,要素30)放置到材料层上;通过间距对衬底进行等离子体蚀刻以形成单颗化道(例如,要素13、15、17、19),其中单颗化道靠近材料层终止。方法包括使用第一流体(例如,要素72)从多个片芯的表面去除残余材料的至少部分。方法包括使用第二流体从单颗化道去除材料层的部分。
根据另一个实施例,方法可包括使多个片芯暴露于流体,该流体被配置成减少聚合物材料的存在。根据进一步的实施例,使用第二流体可包括使用加压流体。根据进一步的实施例,使用第一流体可包括使用加压的流体。根据另一个实施例,方法可包括使多个片芯暴露于流体,该流体被配置成减少氟化材料的存在。
根据上述全部内容,本领域技术人员可以确定的是,根据另一个实施例,从半导体晶片单颗化半导体片芯的方法包括:提供具有多个半导体片芯(例如,要素12、14、16、18)的半导体晶片(例如,要素10),其中多个半导体片芯作为半导体晶片的一部分形成并且彼此之间按间距分开,其中间距限定将要形成单颗化道(例如,要素13、15、17、19)的位置,其中半导体晶片具有第一和第二相对主表面(例如,要素21、22),并且其中形成材料层(例如,要素28)覆盖在第二主表面上。方法包括将第一承载衬底(例如,要素30)放置到材料层上。方法包括在半导体晶片附接到第一承载衬底时,通过间距对半导体晶片进行等离子体蚀刻以形成单颗化道,其中单颗化道靠近材料层终止。方法包括使多个半导体片芯的表面暴露于第一流体(例如,要素72),其中第一流体被配置成减少残余污染物的存在。
根据另一个实施例,方法可包括从单颗化道去除材料层的部分。在另一个实施例中,去除材料层的部分可包括使材料层暴露于加压的第二流体。在一个实施例中,第一流体和第二流体可以为相同的。在其他实施例中,第一流体和第二流体可以为不同的。在进一步的实施例中,方法可包括在暴露半导体片芯的表面的步骤期间拉伸第一承载带。
根据上述全部内容,本领域技术人员可以确定的是,根据另一个实施例,从半导体晶片单颗化半导体片芯的方法包括:提供具有多个半导体片芯(例如,要素12、14、16、18)的半导体晶片(例如,要素10),其中多个半导体片芯形成于半导体晶片上并且彼此之间按间距分开,其中半导体晶片具有第一和第二相对主表面。方法包括将半导体晶片放置到承载衬底(例如,要素30)上,并在半导体晶片附接到承载衬底时,通过间距对半导体晶片进行等离子体蚀刻以形成单颗化道(例如,要素13、15、17和19)。方法包括使多个半导体片芯暴露于构件,该构件用于从多个半导体片芯的表面减少残余污染物的存在(例如,要素72)。
在方法的另一个实施例中,暴露多个半导体片芯可包括用包含溶剂的流体去除残余污染物的至少部分。在进一步的实施例中,流体可以是加压的。在方法的另一个实施例中,提供半导体晶片可包括沿第二主表面提供材料层,并且其中将半导体晶片放置到承载衬底上可包括将材料层放置成与承载衬底相邻。在方法的另一个实施例中,单颗化半导体晶片可包括靠近材料层停止。在进一步的实施例中,方法可进一步包括使用加压的流体从单颗化道去除材料层的至少部分。
鉴于上述全部内容,显然公开了新颖的方法。除了其他特征以外所包括的是,将具有多个片芯的半导体晶片放置到承载带上,和通过衬底形成单颗化道以至少部分地分开所述多个片芯。方法包括使多个片芯的表面暴露于加压流体,以便减少来自单颗化工艺的残余污染物的存在。方法改善单颗化片芯的可靠性和质量。
尽管本发明的主题借助具体的优选实施例和示例实施例描述,但其前述附图和说明书仅示出所述主题的典型实施例,并且不因此被认为是对本发明范围的限制。对于本领域技术人员,许多替代方案和变型将显而易见。例如,其他形式的可去除支撑材料可代替承载带使用。
如附随权利要求所反映的,发明的方面可以在于少于单个前述公开实施例的全部特征。因此,表述的附随权利要求据此被明确地结合到附图的该详细说明中,其中每个权利要求独立作为本发明的单独实施例。此外,虽然本文描述的一些实施例包括在其他实施例中所包括的一些特征而非其他特征,但不同实施例的特征的组合旨在处于本发明的范围内并且旨在形成如将被本领域技术人员理解的不同实施例。
Claims (10)
1.一种用于加工半导体片芯的方法,其包括:
提供其上形成有多个半导体片芯的半导体晶片,所述多个半导体片芯彼此之间按间距分开,其中所述半导体晶片具有相对的第一主表面和第二主表面;
将所述半导体晶片放置到第一承载衬底上;
通过所述间距将所述半导体晶片单颗化,以形成与所述多个半导体片芯相邻的单颗化道;以及
使用第一流体从所述多个半导体片芯的表面减少残余污染物的存在。
2.根据权利要求1所述的方法,其中提供所述半导体晶片包括沿所述第二主表面提供材料层,并且其中将所述半导体晶片放置到所述第一承载衬底上包括将所述材料层放置成与所述第一承载衬底相邻。
3.根据权利要求2所述的方法,其中单颗化所述半导体晶片包括停止在所述材料层附近。
4.根据权利要求3所述的方法,还包括使用包括第二流体的流体流从所述单颗化道去除所述材料层的至少部分。
5.根据权利要求4所述的方法,其中所述第二流体不同于所述第一流体。
6.根据权利要求4所述的方法,其中去除所述材料层的部分包括:
在将所述材料层附接到所述第一承载衬底时,使用所述第二流体去除所述材料层的第一部分;
将第二承载衬底附接到所述半导体晶片的所述第一主表面;
去除所述第一承载衬底;以及
使用第三流体去除所述材料层的第二部分。
7.根据权利要求6所述的方法,其还包括:
在去除所述第二部分之后,将第三承载衬底附接到所述第二主表面上;以及
去除所述第二承载衬底。
8.根据权利要求6所述的方法,其中所述第二流体和所述第三流体不同于所述第一流体。
9.根据权利要求4所述的方法,其中去除所述材料层的部分包括:
将第二承载衬底附接到所述半导体晶片的所述第一主表面;
去除所述第一承载衬底;以及
使用所述第二流体从所述单颗化道去除所述材料层的所述部分。
10.根据权利要求1所述的方法,其中:
减少残余污染物的存在包括用溶剂减少聚合物材料的存在;
将所述半导体晶片放置到所述第一承载衬底上包括将所述半导体晶片放置到承载带上;
单颗化所述半导体晶片包括对所述半导体晶片进行等离子体蚀刻;以及
所述方法还包括在将所述第一流体施加于所述半导体晶片的同时,拉伸所述第一承载衬底至少一些时间。
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US20160372323A1 (en) | 2016-12-22 |
MY191396A (en) | 2022-06-23 |
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PH12015000096B1 (en) | 2016-10-17 |
US9472458B2 (en) | 2016-10-18 |
US20150357241A1 (en) | 2015-12-10 |
MY171178A (en) | 2019-09-30 |
PH12015000096A1 (en) | 2016-10-17 |
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