CN105244360B - Sensitive chip encapsulating structure and its packaging method - Google Patents
Sensitive chip encapsulating structure and its packaging method Download PDFInfo
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- CN105244360B CN105244360B CN201510726417.0A CN201510726417A CN105244360B CN 105244360 B CN105244360 B CN 105244360B CN 201510726417 A CN201510726417 A CN 201510726417A CN 105244360 B CN105244360 B CN 105244360B
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Abstract
The present invention provides the encapsulating structure and its packaging method of sensitive chip, and the encapsulating structure of the sensitive chip includes: sensitive chip, has the first face and the second face relative to each other, first face is provided with photosensitive area;Cover sheet, has each other relative first surface and the second surface, and the first surface is covered to first face;Light shield layer is set to the second surface of the cover sheet, and opening, the opening exposure photosensitive area are provided on the light shield layer;The light shield layer includes the light-absorption layer on the second surface and the metal layer on the light-absorption layer; by forming light shield layer on the cover sheet of sensitive chip encapsulating structure; the defects of bad and ghost is imaged in sensitive chip is eliminated, the image quality of sensitive chip is improved.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to the encapsulation technologies of sensitive chip.
Background technique
With the development of the shadows technologies such as camera shooting, sensitive chip is as can be converted to electric signal for received optical signal
Functional chip is usually used in the camera of electronic product, there is the huge market demand.
At the same time, the encapsulation technology of sensitive chip also has tremendous development, now the sensitive chip encapsulation technology of mainstream
It is crystal wafer chip dimension encapsulation technology (Wafer Level Chip Size Packaging, WLCSP), is to full wafer wafer
It cuts to obtain the technology of single finished product chip again after being packaged and testing.Utilize the single finished product after the encapsulation of such encapsulation technology
Chip size and single crystallite dimension are similar, have complied with market increasingly light to microelectronic product, small, short, thinning and low priceization
It is required that.Crystal wafer chip dimension encapsulation technology is the hot spot in current encapsulation field and the trend of future development.
Sensitive chip is provided with photosensitive area at it on one side, in order to protect photosensitive area injury-free and dirty in encapsulation process
Dye, in general, cover sheet is in completion wafer-level packaging with a face covering protection cover board of photosensitive area on sensitive chip wafer
And can continue to retain after cutting, sensitive chip is persistently protected in subsequent process and later use.
Cover sheet has translucency, to facilitate the photosensitive area of sensitive chip to the intake of ambient, but due to protecting
The presence of protecting cover plate has also been introduced some bad while protecting sensitive chip, it is common that light is entering protection cap
Optical reflection occurs inside it after plate, leads to phenomena such as bad and ghost is imaged.It is such bad as art technology
Personnel bite technical problem to be solved.
For example, Fig. 1 is a kind of sensitive chip package structure diagram in the prior art with reference to Fig. 1.Sensitive chip envelope
Assembling structure includes: sensitive chip 10, has the first face and the second face relative to each other;Sense positioned at 10 first face of sensitive chip
Light area 20;Positioned at 10 first face of sensitive chip and positioned at the weld pad 21 of 20 side of photosensitive area;From the second of sensitive chip 10 towards
The through-hole (not labeled) that first face of sensitive chip 10 extends, the through-hole expose weld pad 21;Positioned at the through-hole side wall and
The insulating layer 11 of the second surface of sensitive chip 10;On the surface of insulating layer 11 and the metal wiring layer of via bottoms
12, metal wiring layer 12 is electrically connected with weld pad 21;Cover the solder mask 13 of the metal wiring layer 12 and insulating layer 11, solder mask
13 have aperture;The soldered ball being electrically connected in 13 aperture of solder mask and through the metal wiring layer 12 with the weld pad 21
14;Protective substrate 30, covering to the first face of sensitive chip 10;Support dam 21 is set on protective substrate 30, and is located at and is protected
It protects between substrate 30 and sensitive chip 10, support dam 21 surrounds photosensitive area.
In the use process of above-mentioned sensitive chip, light I1 is incident to protective substrate 30, and some light I2 can irradiate
To the side wall 30s of protective substrate 30, generating optical reflection phenomenon will be right if reflection light is incident to the photosensitive area 20
The imaging of sensitive chip interferes.Especially, if the incident angle of light I2 meets specified conditions, for example, working as the guarantor
Shield substrate 30 is glass, is air outside glass, and when the incidence angle of the light I2 is greater than the critical angle by glass to air, institute
Stating light I2 can be totally reflected at the side wall 30s of the protective substrate 30, be totally reflected light I2 in the protective substrate 30
Interior propagation, and photosensitive area 20 is refracted to, severe jamming can be caused to photosensitive area 20, keep the imaging of sensitive chip bad or generate
Ghost reduces its image quality.
In addition, the sensitive chip integrated on wafer stage chip is more, single with the miniaturization trend that wafer stage chip encapsulates
The size of a finished chip packaging body is smaller, and the side wall of protective substrate 30 is also increasingly closer at a distance from 20 edge of induction zone, on
The interference phenomenon stated also becomes apparent.
Summary of the invention
Problems solved by the invention is to eliminate bad and ghost of sensitive chip imaging etc. by improving cover sheet and lack
It falls into, improves the image quality of sensitive chip.
To solve the above problems, the present invention provides a kind of sensitive chip encapsulating structure, comprising: sensitive chip has each other
Opposite the first face and the second face, first face are provided with photosensitive area;Cover sheet has each other relative first surface
And second surface, the first surface are covered to first face;Light shield layer is set to the second table of the cover sheet
Face is provided with opening, the opening exposure photosensitive area on the light shield layer;The light shield layer includes being located at second table
Light-absorption layer on face and the metal layer on the light-absorption layer.
Preferably, the material of the light-absorption layer is black glue.
Preferably, the material of the light-absorption layer is black photosensitive adhesive.
Preferably, the metal layer is by surface Darkening process.
Preferably, the material of the metal layer is aluminium.
Preferably, the first surface of the cover sheet is provided with support dam, the support dam and the cover sheet
First surface forms cavity, and the photosensitive area position is in the cavity.
Preferably, the sensitive chip encapsulating structure further include: be set to first face and be located at outside the photosensitive area
Weld pad;The through-hole extended from described second towards first face, the through-hole expose the weld pad;Cover described second
The insulating layer in face and the through-hole side wall surface;On the insulating layer and the metal wiring layer of via bottoms, the gold
Belong to wiring layer to be electrically connected with the weld pad;Solder mask on the metal wiring layer and the insulating layer, the welding resistance
It is provided with aperture on layer, the aperture bottom exposes metal wiring layer;Fill the soldered ball of the aperture, the soldered ball with it is described
Metal wiring layer electrical connection.
The present invention also provides a kind of packaging methods of sensitive chip, comprising: provides wafer, the sense with more array arrangements
Optical chip has the first face and the second face relative to each other, and first face is provided with photosensitive area;Substrate is provided, is had more
A cover sheet corresponding with the sensitive chip has each other relative first surface and the second surface;By the wafer
It aligns and presses with the substrate, cover the first surface to first face;Cut the wafer and substrate formed it is more
Sensitive chip encapsulating structure;Light shield layer is formed on the second surface of the substrate, setting and the sense on the light shield layer
The corresponding opening of optical chip, the opening exposure photosensitive area;The light shield layer includes the suction on the second surface
Photosphere and the metal layer on the light-absorption layer.
Preferably, the material of the light-absorption layer is black glue, and the step of forming the light shield layer includes: the of the substrate
Two surface whole faces are coated with black glue and form black glue layer;Deposited metal material forms metal material layer on the black glue layer;To described
Metal material layer carries out surface Darkening process;Opening is etched on the metal material layer forms the metal layer;With described
Metal layer is exposure mask, etches opening on the black glue layer and forms the light-absorption layer.
Preferably, the step of material of the light-absorption layer is black photosensitive adhesive, forms the light shield layer includes: in the base
The second surface whole face painting black photoresists of plate form black photosensitive glue-line;The deposited metal material on the black photosensitive glue-line
Material forms metal material layer;Surface Darkening process is carried out to the metal material layer;It is etched out on the metal material layer
Mouth forms the metal layer;Using the metal layer as photoresist layer, by exposure development technique on the black photosensitive glue-line shape
At opening to obtain the light-absorption layer.
Preferably, the metal layer is aluminium layer.
Preferably, the sensitive chip further includes first face that is set to and the weld pad outside the photosensitive area;Will be brilliant
After the round contraposition pressing with the substrate further include: the through-hole extended to first face is formed in the second face of the wafer,
The through-hole exposes the weld pad;Form the insulating layer in the second face and the through-hole side wall surface that cover the wafer;Shape
At being located on the insulating layer and the metal wiring layer of via bottoms, the metal wiring layer is electrically connected with the weld pad;Shape
At the solder mask being located on the metal wiring layer and the insulating layer, aperture, the aperture are provided on the solder mask
Bottom-exposed goes out metal wiring layer;The soldered ball for filling the aperture is formed, the soldered ball is electrically connected with the metal wiring layer.
The beneficial effects of the invention are as follows by forming light shield layer on the cover sheet of sensitive chip encapsulating structure, sense is eliminated
The defects of bad and ghost is imaged in optical chip, improves the image quality of sensitive chip.
Detailed description of the invention
Fig. 1 is prior art sensitive chip package structure diagram;
Fig. 2 is one embodiment of the invention sensitive chip package structure diagram;
Fig. 3 is the overlooking structure diagram of wafer;
Fig. 4 is cross-sectional view of the Fig. 3 along A-A1;
Fig. 5 is the schematic cross-sectional view of substrate in one embodiment of the invention;
Fig. 6 (a) to Fig. 6 (e) is the process flow chart that one embodiment of the invention forms light shield layer on substrate;
Fig. 7 (a) to Fig. 7 (e) is the process flow chart that another embodiment of the present invention forms light shield layer on substrate;
Fig. 8 is the structural schematic diagram after wafer and substrate contraposition pressing;
Fig. 9 is to wafer level packaging treated structural schematic diagram;
Specific embodiment
Below with reference to attached drawing, specific embodiments of the present invention will be described in detail.But these embodiments are simultaneously unlimited
The system present invention, structure that those skilled in the art are made according to these embodiments, method or transformation functionally
It is included within the scope of protection of the present invention.
It should be noted that the purpose for providing these attached drawings is in order to help to understand the embodiment of the present invention, without answering
It is construed to improperly limitation of the invention.For the sake of becoming apparent from, size as shown in the figure is not necessarily to scale, and may be done
Amplification, diminution or other changes.In addition, the three-dimensional space of length, width and depth should be included in actual fabrication.Separately
Outside, structure of the fisrt feature described below in the "upper" of second feature may include that the first and second features are formed as directly connecing
The embodiment of touching, also may include the embodiment that other feature is formed between the first and second features, and such first and
Two features may not be direct contact.
Referring to FIG. 2, being one embodiment of the invention sensitive chip package structure diagram, sensitive chip encapsulating structure packet
Include: sensitive chip 210 has the first face 210a and the second face 210b relative to each other, and the first face 210a is provided with photosensitive area
211;There is cover sheet 330 each other relative first surface 330a and second surface 330b, first surface 330a to cover to the
210a on one side;The first surface 330a has support dam 320, and support dam 320 is located at cover sheet 330 and sensitive chip 210
Between, and photosensitive area 211 is located within the cavity for supporting the first surface 330a on dam 320 and cover sheet 330 to surround.
It is provided with light shield layer 511 on the second surface 330b of cover sheet 330, opening is provided on light shield layer 511, is open
The region that second surface 330b corresponds to photosensitive area 211 is exposed, that is, be open exposure photosensitive area 211.In some embodiments, it is open
Area be equal to or more than the area of photosensitive area 211, being incident to the light of cover sheet 330 from opening can be with pierce through the protection lid
Plate 330 enters photosensitive area 211, avoids interference of the light shield layer 511 to photosensitive area 211.
Light shield layer 511 includes being located at the light-absorption layer 501 of the second surface 330b of cover sheet 330 and positioned at light-absorption layer
Metal layer 502 on 501.The main function of light-absorption layer 501 is to absorb 330 internal transmission of cover sheet to second surface 330b
Light, the main function of metal layer 502 is that stopping the external world to be incident to the light in 511 region of light shield layer enters cover sheet
Protection is provided inside 330 and to light-absorption layer 501.
In this present embodiment, the material of light-absorption layer 501 is black photosensitive adhesive or black glue.The material of metal layer 502 is aluminium,
And Darkening process is passed through on the surface of metal layer 502, light can be prevented to be incident to its surface, mirror-reflection occurs and interferes photosensitive
The image quality of chip 210.
Since the material of light-absorption layer 501 is organic material, the material is soft, if being not provided with metal layer 502, light-absorption layer 501
Be easy to be scratched in subsequent technique, metal layer 502 have enough hardness, scratch resistance antiwear property is stronger, by
Metal layer 502 is formed on light-absorption layer 501, and light-absorption layer 501 can be prevented to be scratched in subsequent technique.
And since metal layer 502 is opaque, the thickness of light-absorption layer 501 can be thinned and can choose absorptance compared with
Low light absorbent.If being not provided with metal layer 502, there is higher requirement to the absorptance of light-absorption layer 501, for example, absorptance
It is higher than 95% shaded effect that can be only achieved, by increasing metal layer 502, the absorptance of light-absorption layer 501 is required to reduce,
Choosing the light absorbent that absorptance is 90% can reach good shaded effect, the light absorbent meaning that higher absorptance requires
Higher costs, reduced costs by adding metal layer 502.
First face 210 of sensitive chip 210 is provided with the weld pad 212 except photosensitive area 211, in this present embodiment,
The through-hole extended from the second face 210b of sensitive chip 210 to the first face 210a, through-hole exposure are provided on sensitive chip 210
Weld pad 212 out;Positioned at the insulating layer 213 of the second face 210b and through-hole side wall;Positioned at insulating layer 213 and the metal of via bottoms
Wiring layer 214, metal wiring layer 214 are electrically connected with weld pad 212;Welding resistance on metal wiring layer 214 and insulating layer 213
Layer 215 is provided with aperture on solder mask 215, and aperture bottom exposes metal wiring layer 214;Fill the soldered ball 216 of aperture, weldering
Ball 216 is electrically connected with metal wiring layer 214.In this way, weld pad 212 is made to be electrically connected by metal wiring layer 214 and the realization of soldered ball 216
It connects, and be electrically connected with other external circuits using soldered ball 216 being electrically connected for realization sensitive chip 210 and other circuits of outside.
Accordingly, the embodiment of the invention provides sensitive chip packaging methods, are used to form sensitive chip as shown in Figure 2
Encapsulating structure.Fig. 3 is please referred to extremely, for the intermediate structure schematic diagram formed in encapsulation process of the embodiment of the present invention.
Firstly, providing wafer 200 with reference to Fig. 3 and Fig. 4, wherein Fig. 3 is the overlooking structure diagram of wafer 200, and Fig. 4 is
Cross-sectional view of the Fig. 3 along A-A1.
Wafer 200 has the first face 200a and the second face 200b relative to each other.Wafer 200 has more array arrangements
Sensitive chip 210 and the Cutting Road region 220 between neighboring photosensitive chip 210, after the encapsulation for completing wafer 200, edge
Cutting Road region 220 is cut, and multiple sensitive chip encapsulating structures can be formed.
Sensitive chip 210 has induction zone 211 and the weld pad 212 except photosensitive area 211.Photosensitive area 211 can wrap
Multiple photodiode array arrangements are included, for converting electric signal for the optical signal for exposing to photosensitive area 211.Weld pad 212 is made
The input and output side being connect for device in photosensitive area 211 with external circuit.Sensitive chip 210 can also include other function device
Part, the invention is not limited in this regard, as long as the semiconductor chip with sensitization function can be considered signified sense of the invention
Optical chip.
It should be noted that in the subsequent step of the packaging method of the embodiment of the present invention, for the sake of simple and clear, only
It is illustrated for the sectional view in the direction A-A1 of wafer 200 by shown in Fig. 3, executes similar technique step in other regions
Suddenly.
Then, with reference to Fig. 5, substrate 300 is provided, substrate 300 is covered in the first face of wafer 200 in the subsequent process
200a, for being protected to the photosensitive area 211 on wafer 200.
Due to needing light to reach photosensitive area 211 through substrate 300, substrate 300 uses translucent material, has height
Translucency.Specifically, the material of substrate 300 can be unorganic glass, organic glass or other light transmissions with certain strength
Material.
Meanwhile intensity and light transmission in order to guarantee substrate 300, also there is certain want to the thickness selection of substrate
It asks, in this present embodiment, the thickness range of substrate 300 is 50 μm~500 μm, for example, can be 400 μm.
Substrate 300 includes each other relative first surface 300a and second surface 300b, two surface 300a of substrate 300
It is smooth, smooth with 300b, scattering, diffusing reflection etc. will not be generated to incident ray.Substrate 300 is encapsulated and is cut in subsequent completion
It is remained later as the cover sheet 330 of sensitive chip 210.
Multiple support dams 320 are formed in the first surface 300a of substrate 300, support the first surface on dam 320 and substrate 300
300a forms the cavity of multiple array arrangements, the corresponding photosensitive area 211 of each cavity.
Light shield layer 511 is formed in the second surface 300b of substrate 300, light shield layer 511 has corresponding with photosensitive area 211 more
A opening 520.The area of opening 520 is greater than or equal to the area of photosensitive area 211, after being subsequently formed encapsulating structure, for sudden and violent
Reveal photosensitive area 211.
Light shield layer 511 includes the light-absorption layer 501 of the second surface 300b positioned at substrate 300 and is located on light-absorption layer 501
Metal layer 502.
The material of light-absorption layer 501 is black the organic material such as black glue or black photosensitive of opaque perhaps low light transmission
Glue.So-called black glue is the black glue being usually used in semiconductor technology without photobehavior, such as epoxide-resin glue.Black photosensitive
Glue is the organic gel with photobehavior being usually used in semiconductor technology.
Metal layer 502 is located on the another side not contacted with second surface 300b on light-absorption layer 501, and metal layer 502 can be with
By surface Darkening process, prevent light is on its surface from forming mirror-reflection.The material of metal layer 502 can be aluminium, aluminium
Alloy or other suitable metal materials.
When the material of light-absorption layer is black glue, the concrete technology for forming light shield layer 511 is as follows, please also refer to Fig. 6 (a) extremely
Fig. 6 (e):
As shown in Fig. 6 (a), the second surface 300b whole face coating black glue using spin coating proceeding in substrate 300 forms black glue
Layer 5010;
As shown in Fig. 6 (b), deposited metal material forms metal material layer 5020 and to described on the black glue layer 5010
Metal material layer 5020 carries out surface Darkening process;
As shown in Fig. 6 (c), graphical photoresist layer 503 is formed on the metal material layer 5020;
As shown in Fig. 6 (d), opening is etched on the metal material layer 5020 and forms patterned metal layer 502;
As shown in Fig. 6 (e), using deep dry etch process, using the metal layer 502 as exposure mask on the black glue layer 5010
It etches opening and forms patterned light-absorption layer 501.
When the material of light-absorption layer is black photosensitive adhesive, the concrete technology for forming light shield layer 511 ' is as follows, please also refer to
Fig. 7 (a) to Fig. 7 (e).
As shown in Fig. 7 (a), using spin coating proceeding substrate 300 second surface 300b whole face painting black photoresists shape
At black photosensitive glue-line 5010 ';
As shown in Fig. 7 (b), deposited metal material forms metal material layer 5020 ' on the black photosensitive glue-line 5010 '
And surface Darkening process is carried out to the metal material layer 5020 ';
As shown in Fig. 7 (c), graphical photoresist layer 503 ' is formed on the metal material layer 5020 ';
As shown in Fig. 7 (d), opening is etched on the metal material layer 5020 ' and forms patterned metal layer 502 ';
As shown in Fig. 7 (e), using the metal layer 502 ' as photoresist, using exposure development technique, in the black photosensitive
Opening is formed on glue-line 5010 ' to form patterned light-absorption layer 501 '.
In the present embodiment, the metal layer 502 (or metal layer 502 ') is aluminium layer, by soda acid liquid medicine to the aluminium layer
Surface Darkening process is carried out, for example, can be handled using the aqueous slkali of sulfur-bearing the aluminium layer, is formed on the aluminium layer
The sulfide film layer of black improves the anti-mirror reflection effect of the aluminium layer.In some embodiments, described by surface melanism
The thickness range of the metal layer of processing is 1 μm~10 μm.
In some embodiments, the thickness range of the light-absorption layer is 1-10 μm.
It should be noted that in other embodiments, forming light shield layer 511 on the second surface 300b of substrate 300 also
It can also be formed on the substrate 300 before support dam 320, the present invention after substrate 300 and the contraposition pressing of wafer 200
This is not construed as limiting, can be selected according to specific process conditions.
In this present embodiment, the material for supporting dam 320 is photoresists, is formed in substrate by techniques such as spraying or spin coatings
300 first surface 300a forms photosensitive plastic coating, then carries out figure to the photosensitive plastic coating by exposure development technique
Change the support dam 320 for forming multiple array arrangements.In some embodiments, the material for supporting dam 320 can also be silica, nitrogen
The insulating dielectric materials such as SiClx, silicon oxynitride, are formed by depositing operation, subsequent to be patterned using lithography and etching technique
Form the support dam 320 of multiple array arrangements.
Then, with reference to Fig. 8, the first face 200a of the first surface 300a of substrate 300 and wafer 200 is aligned and is pressed, branch
The first surface 300a of support dam 320 and substrate 300 is surrounded cavity (not indicating), and photosensitive area 211 is in the cavity.
In the present embodiment, substrate 300 and the contraposition of wafer 200 are pressed by adhesive layer (not shown).For example, can prop up
It supports and forms adhesive layer on the top surface on dam 320, the adhesive layer is formed by silk-screen printing or spin coating proceeding, then by substrate
300 first surface 300a and the first face 200a of wafer 200 are aligned and are pressed, and are combined by the adhesive layer.The adhesive layer
Not only bonding effect may be implemented, but also insulation and sealing function can be played.The adhesive layer can be polymeric adhesion material, example
Such as silica gel, epoxy resin, benzocyclobutene polymer material.
In the present embodiment, after the first surface 300a of substrate 300 combination opposite with the first face 200a of wafer 200, institute
The the first face 200a for stating support dam 320 and wafer 200 surrounds cavity.The position of the cavity is opposite with the position of photosensitive area 211
It answers, and the cavity area is slightly larger than the area of photosensitive area 211, can make photosensitive area 211 in the cavity.This implementation
In example, after substrate 300 and wafer 200 are combined, the weld pad 212 on wafer 200 is covered by the support dam 320 on substrate 300.
Substrate 300 can play the role of protecting wafer 200 in the subsequent process.
Then, with reference to Fig. 9, processing is packaged to wafer 200.
Specifically, firstly, wafer 200 is carried out from the second face 200b of wafer 200 it is thinned, in order to the quarter of subsequent through-hole
Erosion, can be using mechanical lapping, chemical mechanical milling tech etc. to being thinned for wafer 200;Then, from the second face of wafer 200
200b performs etching wafer 200, is formed through-hole (not indicating), and the through-hole exposes the 200 first face side 200a of wafer
Weld pad 212;Then, insulating layer 213 is formed on the second face 200b of wafer 200 and on the side wall of the through-hole, it is described exhausted
Edge layer 213 exposes the weld pad 212 of the via bottoms, and the insulating layer 213 can provide for the second face 200b of wafer 200
Electrical isolation, the substrate for the wafer 200 that can also be exposed for the through-hole provide electrical isolation, and the material of the insulating layer 213 can
Think silica, silicon nitride, silicon oxynitride or insulating resin;Then, it is formed on 213 surface of insulating layer and connects the weldering
The metal wiring layer 214 of pad 212 leads to the weld pad 212 on second face 200b of wafer 200, then connect with external circuit,
The metal wiring layer 214 is formed after deposit metal films and to the etching of metallic film;Then, in the metal line
214 surface of layer and 213 surface of the insulating layer form the solder mask 215 with aperture (not indicating), and the aperture exposes portion
Divide the surface of the metal wiring layer 214, the material of the solder mask 215 is the insulating dielectric materials such as silica, silicon nitride, is used
In the protection metal wiring layer 214;Followed by formation soldered ball 216, the soldered ball 216 on the surface of the solder mask 215
The aperture is filled, the soldered ball 216 can be able to be copper, aluminium, gold, tin or lead for connection structures, materials such as soldered ball, metal columns
Equal metal materials.
After being packaged processing to wafer 200, the chip-packaging structure that subsequent cutting can be made to obtain passes through the weldering
Ball 216 is connect with external circuit.The photosensitive area 211 of the sensitive chip is after converting optical signals to electric signal, the telecommunications
Number the weld pad 212, metal wiring layer 214 and soldered ball 216 can be passed sequentially through, be transmitted to external circuit and handled.
Multiple encapsulating structures as shown in Figure 2 are formed by cutting technique.
It should be appreciated that although this specification is described in terms of embodiments, but not each embodiment only includes one
A independent technical solution, this description of the specification is merely for the sake of clarity, and those skilled in the art should will say
As a whole, the technical solution in each embodiment may also be suitably combined to form those skilled in the art can for bright book
With the other embodiments of understanding.
The series of detailed descriptions listed above only for feasible embodiment of the invention specifically
Protection scope bright, that they are not intended to limit the invention, it is all without departing from equivalent implementations made by technical spirit of the present invention
Or change should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of sensitive chip encapsulating structure, comprising:
Sensitive chip has the first face and the second face relative to each other, and first face is provided with photosensitive area;
Cover sheet, has each other relative first surface and the second surface, and the first surface is covered to first face;
Light shield layer is set to the second surface of the cover sheet, and opening, opening exposure institute are provided on the light shield layer
State photosensitive area;
It is characterized by:
The light shield layer includes the light-absorption layer on the second surface and the metal layer on the light-absorption layer,
The material of the light-absorption layer is black glue or black photosensitive adhesive.
2. sensitive chip encapsulating structure according to claim 1, which is characterized in that the metal layer by surface melanism at
Reason.
3. sensitive chip encapsulating structure according to claim 2, which is characterized in that the material of the metal layer is aluminium.
4. sensitive chip encapsulating structure according to claim 1, which is characterized in that the first surface of the cover sheet is set
It is equipped with support dam, the first surface formation cavity on the support dam and the cover sheet, the photosensitive area is located at the cavity
It is interior.
5. sensitive chip encapsulating structure according to claim 1, which is characterized in that the sensitive chip encapsulating structure also wraps
It includes: the weld pad for being set to first face and being located at outside the photosensitive area;
The through-hole extended from described second towards first face, the through-hole expose the weld pad;
Cover the insulating layer in second face and the through-hole side wall surface;
On the insulating layer and the metal wiring layer of via bottoms, the metal wiring layer are electrically connected with the weld pad;
Solder mask on the metal wiring layer and the insulating layer is provided with aperture on the solder mask, described to open
Hole bottom exposes metal wiring layer;
The soldered ball of the aperture is filled, the soldered ball is electrically connected with the metal wiring layer.
6. a kind of packaging method of sensitive chip, comprising:
Wafer is provided, the sensitive chip with more array arrangements has relative to each other the first face and the second face, and described the
It is provided with photosensitive area on one side;
Substrate is provided, there are each other relative first surface and the second surface;
The wafer and substrate contraposition are pressed, cover the first surface to first face;
It cuts the wafer and substrate forms more sensitive chip encapsulating structures;
It is characterized by:
Light shield layer is formed on the second surface of the substrate, and open corresponding with the sensitive chip is set on the light shield layer
Mouthful, the opening exposure photosensitive area;
The light shield layer includes the light-absorption layer on the second surface and the metal layer on the light-absorption layer,
The material of the light-absorption layer is black glue or black photosensitive adhesive.
7. packaging method according to claim 6, which is characterized in that the material of the light-absorption layer is black glue, described in formation
The step of light shield layer includes:
Black glue layer is formed in the second surface whole face coating black glue of the substrate;
Deposited metal material forms metal material layer on the black glue layer;
Surface Darkening process is carried out to the metal material layer;
Opening is etched on the metal material layer forms the metal layer;
Using the metal layer as exposure mask, opening is etched on the black glue layer and forms the light-absorption layer.
8. packaging method according to claim 6, which is characterized in that the material of the light-absorption layer is formed for black photosensitive adhesive
The step of light shield layer includes:
Black photosensitive glue-line is formed in the second surface whole face painting black photoresists of the substrate;
Deposited metal material forms metal material layer on the black photosensitive glue-line;
Surface Darkening process is carried out to the metal material layer;
Opening is etched on the metal material layer forms the metal layer;
Using the metal layer as photoresist layer, opening is formed on the black photosensitive glue-line by exposure development technique to obtain
The light-absorption layer.
9. packaging method according to claim 7 or 8, which is characterized in that the metal layer is aluminium layer.
10. packaging method according to claim 6, which is characterized in that the sensitive chip further includes being set to the first face
And it is located at the weld pad outside the photosensitive area;After by wafer and substrate contraposition pressing further include:
The through-hole extended to first face is formed in the second face of the wafer, the through-hole exposes the weld pad;
Form the insulating layer in the second face and the through-hole side wall surface that cover the wafer;
It is formed on the insulating layer and the metal wiring layer of via bottoms, the metal wiring layer is electrically connected with the weld pad
It connects;
The solder mask being located on the metal wiring layer and the insulating layer is formed, is provided with aperture on the solder mask, institute
It states aperture bottom and exposes metal wiring layer;
The soldered ball for filling the aperture is formed, the soldered ball is electrically connected with the metal wiring layer.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510726417.0A CN105244360B (en) | 2015-10-29 | 2015-10-29 | Sensitive chip encapsulating structure and its packaging method |
KR1020187011117A KR20180056720A (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
JP2018520497A JP2018533217A (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
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CN106098645B (en) * | 2016-08-24 | 2019-02-19 | 华天科技(昆山)电子有限公司 | The encapsulating structure of semiconductor devices |
CN110649047A (en) * | 2018-06-26 | 2020-01-03 | 三赢科技(深圳)有限公司 | Photosensitive chip packaging structure and forming method thereof |
CN109360860B (en) * | 2018-09-25 | 2023-10-24 | 苏州科阳光电科技有限公司 | Wafer packaging structure and preparation method thereof |
CN109545805A (en) * | 2018-11-12 | 2019-03-29 | 通富微电子股份有限公司 | A kind of semiconductor chip packaging method |
CN109545807A (en) * | 2018-11-12 | 2019-03-29 | 通富微电子股份有限公司 | A kind of semiconductor packing device |
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CN113471152B (en) * | 2021-06-30 | 2022-11-11 | 上海中航光电子有限公司 | Packaging structure and packaging method, camera module and electronic equipment |
US11929313B2 (en) | 2021-06-30 | 2024-03-12 | Shanghai Tianma Micro-electronics Co., Ltd. | Chip package structure and method for manufacturing the same, and module |
CN113471153B (en) * | 2021-06-30 | 2022-11-11 | 上海中航光电子有限公司 | Packaging structure and packaging method, camera module and electronic equipment |
CN113410129B (en) * | 2021-08-19 | 2021-11-23 | 康希通信科技(上海)有限公司 | Preparation method of semiconductor structure and semiconductor structure |
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