CN105244360A - Packaging structure of photosensitive chip and packaging method thereof - Google Patents
Packaging structure of photosensitive chip and packaging method thereof Download PDFInfo
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- CN105244360A CN105244360A CN201510726417.0A CN201510726417A CN105244360A CN 105244360 A CN105244360 A CN 105244360A CN 201510726417 A CN201510726417 A CN 201510726417A CN 105244360 A CN105244360 A CN 105244360A
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Abstract
The invention provides a packaging structure of a photosensitive chip and a packaging method thereof. The packaging structure comprises a photosensitive chip, a protection cover plate, and a light shielding layer. The photosensitive chip has a first face and a second face, wherein the first face and the second face are opposite to each other; and a photosensitive region is arranged on the first face. The protection cover plate includes a first surface and a second surface, wherein the first surface and the second surface are opposite to each other; and the first surface covers the first face. The light shielding layer is arranged at the second surface of the protection cover plate; an opening is formed in the light shielding layer to expose the photosensitive region; and the light shielding layer contains a light absorption layer arranged on the second surface and a metal layer arranged on the light absorption layer. Because of the light shielding layer formed on the protection cover plate of the packaging structure of the photosensitive chip, defects of poor photosensitive chip imaging and ghost existence and the like can be overcome and the imaging quality of the photosensitive chip can be improved.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly relate to the encapsulation technology of sensitive chip.
Background technology
Along with shooting waits the development of shadow technology, sensitive chip, as the functional chip that the light signal of reception can be converted to the signal of telecommunication, is usually used in the camera of electronic product, has the huge market demand.
Meanwhile, the encapsulation technology of sensitive chip also has tremendous development, the sensitive chip encapsulation technology of main flow is crystal wafer chip dimension encapsulation technology (WaferLevelChipSizePackaging now, WLCSP), be full wafer wafer is encapsulated and after testing again cutting obtain the technology of single finished product chip.Utilize the single finished product chip size after the encapsulation of this kind of encapsulation technology and single crystallite dimension almost, complied with that market is day by day light, little, short to microelectronic product, thinning and low priceization requirement.Crystal wafer chip dimension encapsulation technology is the focus in current encapsulation field and the trend of future development.
Sensitive chip is provided with photosensitive area in its one side; in order to protect in encapsulation process photosensitive area injury-free and pollute; usually; sensitive chip wafer has a covering protection cover plate of photosensitive area; cover sheet, completing wafer-level packaging and can continuing after cutting to retain, protects sensitive chip lastingly in follow-up operation and later use.
Cover sheet has light transmission; with the picked-up of the photosensitive area facilitating sensitive chip light to external world; but due to the existence of cover sheet; it have also been introduced while protection sensitive chip, and some are bad; commonly; there is optical reflection therein in light, cause the phenomenons such as the bad and ghost of imaging after entering cover sheet.This kind of bad those skilled in the art of becoming bite technical problem to be solved.
Illustrating, is a kind of sensitive chip encapsulating structure schematic diagram in prior art with reference to figure 1, Fig. 1.Sensitive chip encapsulating structure comprises: sensitive chip 10, has first surface respect to one another and second; Be positioned at the photosensitive area 20 of sensitive chip 10 first surface; Be positioned at sensitive chip 10 first surface and be positioned at the weld pad 21 of photosensitive area 20 side; From the second through hole (non-label) extended towards the first surface of sensitive chip 10 of sensitive chip 10, described through hole exposes weld pad 21; Be positioned at the insulating barrier 11 of the second surface of described through-hole side wall and sensitive chip 10; On the surface being positioned at insulating barrier 11 and the metal wiring layer 12 of via bottoms, metal wiring layer 12 is electrically connected with weld pad 21; Cover the solder mask 13 of described metal wiring layer 12 and insulating barrier 11, solder mask 13 has perforate; Be positioned at solder mask 13 perforate and the soldered ball 14 be electrically connected with described weld pad 21 by described metal wiring layer 12; Protective substrate 30, it is covered to the first surface of sensitive chip 10; Support dam 21 to be arranged on protective substrate 30, and between protective substrate 30 and sensitive chip 10, support dam 21 and surround photosensitive area.
In the use procedure of above-mentioned sensitive chip; light I1 is incident to protective substrate 30, and some light I2 can expose to the sidewall 30s of protective substrate 30, produces optical reflection phenomenon; if reflection ray is incident to described photosensitive area 20, interference will be caused to the imaging of sensitive chip.Especially; if the incident angle of light I2 meets specified conditions; such as; when described protective substrate 30 is glass; glass is outward air; and the incidence angle of described light I2 is when to be greater than by glass to the critical angle of air; total reflection can be there is in described light I2 at the sidewall 30s place of described protective substrate 30; total reflection light I2 propagates in described protective substrate 30; and refract to photosensitive area 20; severe jamming can be caused to photosensitive area 20, make the imaging of sensitive chip bad or produce ghost, reduce its image quality.
In addition; along with the miniaturization trend of wafer stage chip encapsulation, sensitive chip integrated on wafer stage chip is more, and the size of single finished product chip packing-body is less; the sidewall of protective substrate 30 and the distance at edge, induction zone 20 are also more and more nearer, and above-mentioned interference phenomenon is also more obvious.
Summary of the invention
The problem that the present invention solves is by improving cover sheet, eliminates the defects such as the bad and ghost of sensitive chip imaging, improves the image quality of sensitive chip.
For solving the problem, the invention provides a kind of sensitive chip encapsulating structure, comprising: sensitive chip, have first surface respect to one another and second, described first surface is provided with photosensitive area; Cover sheet, has each other relative first surface and the second surface, and described first surface is covered to described first surface; Light shield layer, is arranged at the second surface of described cover sheet, and described light shield layer is provided with opening, and described opening exposes described photosensitive area; Described light shield layer comprises the light-absorption layer be positioned on described second surface and the metal level be positioned on described light-absorption layer.
Preferably, the material of described light-absorption layer is black glue.
Preferably, the material of described light-absorption layer is black photosensitive adhesive.
Preferably, described metal level is through surperficial Darkening process.
Preferably, the material of described metal level is aluminium.
Preferably, the first surface of described cover sheet is provided with support dam, and the first surface of described support dam and described cover sheet forms cavity, and described photosensitive area is positioned at described cavity.
Preferably, described sensitive chip encapsulating structure also comprises: be arranged at described first surface and be positioned at the weld pad outside described photosensitive area; From the through hole that described second extends towards described first surface, described through hole exposes described weld pad; Cover the insulating barrier on described second and described through-hole side wall surface; Be positioned on described insulating barrier and the metal wiring layer of via bottoms, described metal wiring layer is electrically connected with described weld pad; Be positioned at the solder mask on described metal wiring layer and described insulating barrier, described solder mask is provided with perforate, described aperture bottom exposes metal wiring layer; Fill the soldered ball of described perforate, described soldered ball is electrically connected with described metal wiring layer.
The present invention also provides a kind of method for packing of sensitive chip, comprising: provide wafer, has the sensitive chip of many array arrangements, and have first surface respect to one another and second, described first surface is provided with photosensitive area; Substrate is provided, there is the cover sheet that multiple and described sensitive chip is corresponding, there are each other relative first surface and the second surface; By described wafer and described substrate contraposition pressing, described first surface is made to be covered to described first surface; Cut described wafer and substrate forms many sensitive chip encapsulating structures; The second surface of described substrate forms light shield layer, and described light shield layer arranges the opening corresponding with described sensitive chip, and described opening exposes described photosensitive area; Described light shield layer comprises the light-absorption layer be positioned on described second surface and the metal level be positioned on described light-absorption layer.
Preferably, the material of described light-absorption layer is black glue, and the step forming described light shield layer comprises: form black glue-line at the black glue of whole of the second surface of described substrate coating; On described black glue-line, deposit metallic material forms metal material layer; Surperficial Darkening process is carried out to described metal material layer; Described metal material layer etches opening and forms described metal level; With described metal level for mask, described black glue-line etches opening and forms described light-absorption layer.
Preferably, the material of described light-absorption layer is black photosensitive adhesive, and the step forming described light shield layer comprises: form black photosensitive glue-line at the second surface of described substrate whole painting black photoresists; On described black photosensitive glue-line, deposit metallic material forms metal material layer; Surperficial Darkening process is carried out to described metal material layer; Described metal material layer etches opening and forms described metal level; With described metal level for photoresist layer, on described black photosensitive glue-line, form opening by exposure imaging technique thus obtain described light-absorption layer.
Preferably, described metal level is aluminium lamination.
Preferably, described sensitive chip also comprises and is arranged at first surface and the weld pad be positioned at outside described photosensitive area; Also comprise after by wafer and described substrate contraposition pressing: second at described wafer forms the through hole extended to described first surface, and described through hole exposes described weld pad; Formed and cover second of described wafer and the insulating barrier on described through-hole side wall surface; Being formed is positioned on described insulating barrier and the metal wiring layer of via bottoms, and described metal wiring layer is electrically connected with described weld pad; Form the solder mask be positioned on described metal wiring layer and described insulating barrier, described solder mask is provided with perforate, and described aperture bottom exposes metal wiring layer; Form the soldered ball of filling described perforate, described soldered ball is electrically connected with described metal wiring layer.
The invention has the beneficial effects as follows by forming light shield layer on the cover sheet of sensitive chip encapsulating structure, eliminating the defects such as the bad and ghost of sensitive chip imaging, improving the image quality of sensitive chip.
Accompanying drawing explanation
Fig. 1 is prior art sensitive chip encapsulating structure schematic diagram;
Fig. 2 is one embodiment of the invention sensitive chip encapsulating structure schematic diagram;
Fig. 3 is the plan structure schematic diagram of wafer;
Fig. 4 is the cutaway view of Fig. 3 along A-A1;
Fig. 5 is the cross-sectional schematic of substrate in one embodiment of the invention;
Fig. 6 (a) to Fig. 6 (e) forms the process chart of light shield layer for one embodiment of the invention on substrate;
Fig. 7 (a) to Fig. 7 (e) forms the process chart of light shield layer for another embodiment of the present invention on substrate;
Fig. 8 is the structural representation after wafer and substrate contraposition pressing;
Fig. 9 be to wafer level packaging process after structural representation;
Embodiment
Below with reference to accompanying drawing, the specific embodiment of the present invention is described in detail.But these execution modes do not limit the present invention, the structure that those of ordinary skill in the art makes according to these execution modes, method or conversion functionally are all included in protection scope of the present invention.
It should be noted that, providing the object of these accompanying drawings to be understand embodiments of the invention to contribute to, and should not be construed as and limit improperly of the present invention.For the purpose of clearer, size shown in figure not drawn on scale, may make and amplify, to reduce or other change.In addition, the three-dimensional space of length, width and the degree of depth should be comprised in actual fabrication.In addition, fisrt feature described below second feature it " on " structure can comprise the embodiment that the first and second features are formed as directly contact, also can comprise other feature and be formed in embodiment between the first and second features, such first and second features may not be direct contacts.
Please refer to Fig. 2, be one embodiment of the invention sensitive chip encapsulating structure schematic diagram, sensitive chip encapsulating structure comprises: sensitive chip 210, and have first surface 210a and second 210b respect to one another, first surface 210a is provided with photosensitive area 211; Cover sheet 330, have each other relative first surface 330a and second surface 330b, first surface 330a is covered to first surface 210a; Described first surface 330a has and supports dam 320, supports dam 320 between cover sheet 330 and sensitive chip 210, and photosensitive area 211 is positioned within the cavity that the first surface 330a that supports dam 320 and cover sheet 330 surrounds.
The second surface 330b of cover sheet 330 is provided with light shield layer 511, light shield layer 511 is provided with opening, opening exposes the region of the corresponding photosensitive area 211 of second surface 330b, and namely opening exposes photosensitive area 211.In certain embodiments, the area of opening is equal to, or greater than the area of photosensitive area 211, and the light being incident to cover sheet 330 from opening can enter photosensitive area 211 by pierce through the protection cover plate 330, avoids the interference of light shield layer 511 pairs of photosensitive areas 211.
The light-absorption layer 501 that light shield layer 511 comprises the second surface 330b being positioned at cover sheet 330 and the metal level 502 be positioned on light-absorption layer 501.The Main Function of light-absorption layer 501 is to absorb the light of cover sheet 330 internal transmission to second surface 330b, and the Main Function of metal level 502 is to stop that the extraneous light being incident to light shield layer 511 region enters cover sheet 330 inside and provides protection to light-absorption layer 501.
In the present embodiment, the material of light-absorption layer 501 is black photosensitive adhesive or black glue.The material of metal level 502 is aluminium, and the surface of metal level 502 is through Darkening process, can prevent light to its surface, mirror-reflection occurring and disturbing the image quality of sensitive chip 210.
Material due to light-absorption layer 501 is organic material, material is softer, if do not arrange metal level 502, light-absorption layer 501 is easily scratched in follow-up technique, metal level 502 has enough hardness, scratch resistance antiwear property is comparatively strong, by forming metal level 502 on light-absorption layer 501, light-absorption layer 501 can be prevented to be scratched in follow-up technique.
And due to metal level 502 light tight, therefore, the thickness of light-absorption layer 501 can be thinning and can choose the lower light absorbent of absorptance.If do not arrange metal level 502, higher requirement is had to the absorptance of light-absorption layer 501, such as, absorptance is higher than 95% shaded effect that just can reach, by increasing metal level 502, require to reduce to the absorptance of light-absorption layer 501, choose absorptance be 90% light absorbent can reach good shaded effect, the light absorbent that higher absorptance requires means more high cost, reduces cost by setting up metal level 502.
The first surface 210 of sensitive chip 210 is provided with the weld pad 212 be positioned at outside photosensitive area 211, in the present embodiment, sensitive chip 210 is provided with: the through hole extended to first surface 210a from second 210b of sensitive chip 210, and through hole exposes weld pad 212; Be positioned at the insulating barrier 213 of second 210b and through-hole side wall; Be positioned at the metal wiring layer 214 of insulating barrier 213 and via bottoms, metal wiring layer 214 is electrically connected with weld pad 212; Be positioned at the solder mask 215 on metal wiring layer 214 and insulating barrier 213, solder mask 215 is provided with perforate, aperture bottom exposes metal wiring layer 214; Fill the soldered ball 216 of perforate, soldered ball 216 is electrically connected with metal wiring layer 214.So, make weld pad 212 realize being electrically connected with soldered ball 216 by metal wiring layer 214, and utilize soldered ball 216 to be electrically connected with other circuit outside the electrical connection realizing sensitive chip 210 and other circuit outside.
Accordingly, embodiments provide sensitive chip method for packing, for the formation of sensitive chip encapsulating structure as shown in Figure 2.Please refer to Fig. 3 extremely, is the intermediate structure schematic diagram formed in embodiment of the present invention encapsulation process.
First, with reference to figure 3 and Fig. 4, provide wafer 200, wherein, Fig. 3 is the plan structure schematic diagram of wafer 200, and Fig. 4 is the cutaway view of Fig. 3 along A-A1.
Wafer 200 has first surface 200a and second 200b respect to one another.Wafer 200 has the sensitive chip 210 of many array arrangements and the Cutting Road region 220 between neighboring photosensitive chip 210, after the encapsulation completing wafer 200, cuts along Cutting Road region 220, can form multiple sensitive chip encapsulating structure.
The weld pad 212 that sensitive chip 210 has induction zone 211 and is positioned at outside photosensitive area 211.Photosensitive area 211 can comprise the arrangement of multiple photodiode array, for the light signal exposing to photosensitive area 211 is converted into the signal of telecommunication.The input and output side that weld pad 212 is connected with external circuit as device in photosensitive area 211.Sensitive chip 210 can also comprise other function elements, and the present invention is not restricted this, as long as namely the semiconductor chip with sensitization function can think the sensitive chip of indication of the present invention.
It should be noted that, in the subsequent step of the method for packing of the embodiment of the present invention, for the purpose of simple and clear, be only described for the sectional view in the A-A1 direction along wafer 200 shown in Fig. 3, perform similar processing step in other regions.
Then, with reference to figure 5, provide substrate 300, substrate 300 is covered in the first surface 200a of wafer 200 in subsequent technique, for protecting the photosensitive area 211 on wafer 200.
Because needs light therethrough substrate 300 arrives photosensitive area 211, therefore, substrate 300 adopts light transmissive material, has high light transmittance.Concrete, the material of substrate 300 can for unorganic glass, polymethyl methacrylate or other there is the light transmissive material of certain strength.
Meanwhile, in order to ensure intensity and the light transmission of substrate 300, choosing the thickness of substrate also has certain requirement, and in the present embodiment, the thickness range of substrate 300 is 50 μm ~ 500 μm, such as, can be 400 μm.
Substrate 300 comprises each other relative first surface 300a and second surface 300b, and two surperficial 300a and 300b of substrate 300 are all smooth, smooth, can not produce scattering, diffuse reflection etc. to incident ray.Substrate 300 encapsulates follow-up completing and namely remains as the cover sheet 330 of sensitive chip 210 after cutting.
Form multiple support dam 320 at the first surface 300a of substrate 300, the first surface 300a supporting dam 320 and substrate 300 forms the cavity of multiple array arrangement, the corresponding photosensitive area 211 of each cavity.
Form light shield layer 511 at the second surface 300b of substrate 300, light shield layer 511 has the multiple openings 520 corresponding with photosensitive area 211.The area of opening 520 is more than or equal to the area of photosensitive area 211, after follow-up formation encapsulating structure, for exposing photosensitive area 211.
The light-absorption layer 501 that light shield layer 511 comprises the second surface 300b being positioned at substrate 300 and the metal level 502 be positioned on light-absorption layer 501.
The material of light-absorption layer 501 is light tight or the black organic material of low light transmission, such as black glue or black photosensitive adhesive.So-called black glue is the black glue be usually used in semiconductor technology without photobehavior, as epoxide-resin glue.Black photosensitive adhesive is the organic gel with photobehavior be usually used in semiconductor technology.
Metal level 502 is positioned on another side that light-absorption layer 501 does not contact with second surface 300b, and metal level 502 can, through surperficial Darkening process, make light can not form mirror-reflection on its surface.The material of metal level 502 can be aluminium, aluminium alloy or other suitable metal materials.
When the material of light-absorption layer is black glue, the concrete technology forming light shield layer 511 is as follows, please also refer to Fig. 6 (a) to Fig. 6 (e):
As shown in Fig. 6 (a), adopt spin coating proceeding to be coated with black glue at whole of the second surface 300b of substrate 300 and form black glue-line 5010;
As shown in Fig. 6 (b), on described black glue-line 5010, deposit metallic material forms metal material layer 5020 and carries out surperficial Darkening process to described metal material layer 5020;
As shown in Fig. 6 (c), described metal material layer 5020 forms graphical photoresist layer 503;
As shown in Fig. 6 (d), described metal material layer 5020 etches opening and forms patterned metal level 502;
As shown in Fig. 6 (e), adopt deep dry etch process, on described black glue-line 5010, etch opening using described metal level 502 as mask and form patterned light-absorption layer 501.
When the material of light-absorption layer is black photosensitive adhesive, the concrete technology forming light shield layer 511 ' is as follows, please also refer to Fig. 7 (a) to Fig. 7 (e).
As shown in Fig. 7 (a), spin coating proceeding is adopted to form black photosensitive glue-line 5010 ' at second surface 300b whole painting black photoresists of substrate 300;
As shown in Fig. 7 (b), form metal material layer 5020 ' in the upper deposit metallic material of described black photosensitive glue-line 5010 ' and surperficial Darkening process is carried out to described metal material layer 5020 ';
As shown in Fig. 7 (c), at the graphical photoresist layer 503 ' of the upper formation of described metal material layer 5020 ';
As shown in Fig. 7 (d), described metal material layer 5020 ' etches opening and forms patterned metal level 502 ';
As shown in Fig. 7 (e), using described metal level 502 ' as photoresistance, adopt exposure imaging technique, above form opening at described black photosensitive glue-line 5010 ' thus form patterned light-absorption layer 501 '.
In the present embodiment, described metal level 502 (or metal level 502 ') is aluminium lamination, by soda acid liquid medicine, surperficial Darkening process is carried out to described aluminium lamination, such as, the aqueous slkali of sulfur-bearing can be adopted to process described aluminium lamination, described aluminium lamination is formed the sulfide rete of black, improves the anti-mirror reflection effect of described aluminium lamination.In certain embodiments, the thickness range of the metal level of the surperficial Darkening process of described process is 1 μm ~ 10 μm.
In certain embodiments, the thickness range of described light-absorption layer is 1-10 μm.
It should be noted that, in other embodiments, the second surface 300b of substrate 300 is formed light shield layer 511 can also after substrate 300 with wafer 200 contraposition pressing, can also be formed before supporting dam 320 on the substrate 300, the present invention is not construed as limiting this, can select according to concrete process conditions.
In the present embodiment, the material supporting dam 320 is photoresists, the first surface 300a being formed at substrate 300 by techniques such as spraying or spin coatings forms photosensitive plastic coating, then carries out to described photosensitive plastic coating the support dam 320 graphically forming multiple array arrangement by exposure imaging technique.In certain embodiments, the material supporting dam 320 can also be the insulating dielectric materials such as silica, silicon nitride, silicon oxynitride, and formed by depositing operation, follow-up employing photoetching and etching technics carry out the support dam 320 graphically forming multiple array arrangement.
Then, with reference to figure 8, by the first surface 200a contraposition pressing of the first surface 300a of substrate 300 and wafer 200, support dam 320 and surround cavity (sign) with the first surface 300a of substrate 300, photosensitive area 211 is positioned at described cavity.
In the present embodiment, by adhesive layer (not shown) by substrate 300 and wafer 200 contraposition pressing.Such as, adhesive layer can be formed on the top surface supporting dam 320, form described adhesive layer by silk screen printing or spin coating proceeding, then by the first surface 200a contraposition pressing of the first surface 300a of substrate 300 and wafer 200, be combined by described adhesive layer.Described adhesive layer both can realize bonding effect, can play again insulation and sealing function.Described adhesive layer can be the polymeric materials such as polymeric adhesion material, such as silica gel, epoxy resin, benzocyclobutene.
In the present embodiment, after relative with the first surface 200a of wafer 200 for the first surface 300a of substrate 300 combination, described support dam 320 surrounds cavity with the first surface 200a of wafer 200.The position of described cavity is corresponding with the position of photosensitive area 211, and described cavity area is slightly larger than the area of photosensitive area 211, and photosensitive area 211 can be made to be positioned at described cavity.In the present embodiment, after substrate 300 and wafer 200 being combined, the weld pad 212 on wafer 200 is covered by the support dam 320 on substrate 300.Substrate 300 in subsequent technique, can play the effect of protection wafer 200.
Then, with reference to figure 9, encapsulation process is carried out to wafer 200.
Particularly, first, carry out thinning from second 200b of wafer 200 to wafer 200, so that the etching of follow-up through hole, can mechanical lapping, chemical mechanical milling tech etc. be adopted to the thinning of wafer 200; Then, etch from second 200b of wafer 200 wafer 200, form through hole (sign), described through hole exposes the weld pad 212 of wafer 200 first surface 200a side; Then, insulating barrier 213 is formed on second 200b of wafer 200 and on the sidewall of described through hole, described insulating barrier 213 exposes the weld pad 212 of described via bottoms, described insulating barrier 213 can provide electric insulation for second of wafer 200 200b, the substrate of the wafer 200 that can also expose for described through hole provides electric insulation, and the material of described insulating barrier 213 can be silica, silicon nitride, silicon oxynitride or insulating resin; Then, the metal wiring layer 214 connecting described weld pad 212 is formed on described insulating barrier 213 surface, described weld pad 212 is caused on second 200b of wafer 200, then is connected with external circuit, described metal wiring layer 214 through deposit metal films and to the etching of metallic film after formed; Then, the solder mask 215 with perforate (sign) is formed on described metal wiring layer 214 surface and described insulating barrier 213 surface, described perforate exposes the surface of the described metal wiring layer 214 of part, the material of described solder mask 215 is the insulating dielectric materials such as silica, silicon nitride, for the protection of described metal wiring layer 214; Again then, the surface of described solder mask 215 forms soldered ball 216, described perforate filled by described soldered ball 216, and described soldered ball 216 can be the syndeton such as soldered ball, metal column, and material can be the metal materials such as copper, aluminium, gold, tin or lead.
After carrying out encapsulation process to wafer 200, the chip-packaging structure that follow-up cutting can be made to obtain is connected with external circuit by described soldered ball 216.The photosensitive area 211 of described sensitive chip is after being converted to the signal of telecommunication by light signal, and the described signal of telecommunication can pass through described weld pad 212, metal wiring layer 214 and soldered ball 216 successively, transfers to external circuit and processes.
Multiple encapsulating structure is as shown in Figure 2 formed through cutting technique.
Be to be understood that, although this specification is described according to execution mode, but not each execution mode only comprises an independently technical scheme, this narrating mode of specification is only for clarity sake, those skilled in the art should by specification integrally, technical scheme in each execution mode also through appropriately combined, can form other execution modes that it will be appreciated by those skilled in the art that.
A series of detailed description listed is above only illustrating for feasibility execution mode of the present invention; they are also not used to limit the scope of the invention, all do not depart from the skill of the present invention equivalent implementations done of spirit or change all should be included within protection scope of the present invention.
Claims (12)
1. a sensitive chip encapsulating structure, comprising:
Sensitive chip, have first surface respect to one another and second, described first surface is provided with photosensitive area;
Cover sheet, has each other relative first surface and the second surface, and described first surface is covered to described first surface;
Light shield layer, is arranged at the second surface of described cover sheet, and described light shield layer is provided with opening, and described opening exposes described photosensitive area;
It is characterized in that:
Described light shield layer comprises the light-absorption layer be positioned on described second surface and the metal level be positioned on described light-absorption layer.
2. sensitive chip encapsulating structure according to claim 1, is characterized in that, the material of described light-absorption layer is black glue.
3. sensitive chip encapsulating structure according to claim 1, is characterized in that, the material of described light-absorption layer is black photosensitive adhesive.
4. sensitive chip encapsulating structure according to claim 1, is characterized in that, described metal level is through surperficial Darkening process.
5. sensitive chip encapsulating structure according to claim 4, is characterized in that, the material of described metal level is aluminium.
6. sensitive chip encapsulating structure according to claim 1, is characterized in that, the first surface of described cover sheet is provided with support dam, and the first surface of described support dam and described cover sheet forms cavity, and described photosensitive area is positioned at described cavity.
7. sensitive chip encapsulating structure according to claim 1, is characterized in that, described sensitive chip encapsulating structure also comprises:
Be arranged at described first surface and be positioned at the weld pad outside described photosensitive area;
From the through hole that described second extends towards described first surface, described through hole exposes described weld pad;
Cover the insulating barrier on described second and described through-hole side wall surface;
Be positioned on described insulating barrier and the metal wiring layer of via bottoms, described metal wiring layer is electrically connected with described weld pad;
Be positioned at the solder mask on described metal wiring layer and described insulating barrier, described solder mask is provided with perforate, described aperture bottom exposes metal wiring layer;
Fill the soldered ball of described perforate, described soldered ball is electrically connected with described metal wiring layer.
8. a method for packing for sensitive chip, comprising:
There is provided wafer, have the sensitive chip of many array arrangements, have first surface respect to one another and second, described first surface is provided with photosensitive area;
Substrate is provided, there are each other relative first surface and the second surface;
By described wafer and described substrate contraposition pressing, described first surface is made to be covered to described first surface;
Cut described wafer and substrate forms many sensitive chip encapsulating structures as claimed in claim 1;
It is characterized in that:
The second surface of described substrate forms light shield layer, and described light shield layer arranges the opening corresponding with described sensitive chip, and described opening exposes described photosensitive area;
Described light shield layer comprises the light-absorption layer be positioned on described second surface and the metal level be positioned on described light-absorption layer.
9. method for packing according to claim 8, is characterized in that, the material of described light-absorption layer is black glue, and the step forming described light shield layer comprises:
Black glue-line is formed at the black glue of whole of the second surface of described substrate coating;
On described black glue-line, deposit metallic material forms metal material layer;
Surperficial Darkening process is carried out to described metal material layer;
Described metal material layer etches opening and forms described metal level;
With described metal level for mask, described black glue-line etches opening and forms described light-absorption layer.
10. method for packing according to claim 8, is characterized in that, the material of described light-absorption layer is that black photosensitive adhesive is formed
The step of described light shield layer comprises:
Black photosensitive glue-line is formed at the second surface of described substrate whole painting black photoresists;
On described black photosensitive glue-line, deposit metallic material forms metal material layer;
Surperficial Darkening process is carried out to described metal material layer;
Described metal material layer etches opening and forms described metal level;
With described metal level for photoresist layer, on described black photosensitive glue-line, form opening by exposure imaging technique thus obtain described light-absorption layer.
11. method for packing according to claim 9 or 10, it is characterized in that, described metal level is aluminium lamination.
12. method for packing according to claim 7, is characterized in that, described sensitive chip also comprises and is arranged at first surface and the weld pad be positioned at outside described photosensitive area; Also comprise after by wafer and described substrate contraposition pressing:
Second at described wafer forms the through hole extended to described first surface, and described through hole exposes described weld pad;
Formed and cover second of described wafer and the insulating barrier on described through-hole side wall surface;
Being formed is positioned on described insulating barrier and the metal wiring layer of via bottoms, and described metal wiring layer is electrically connected with described weld pad;
Form the solder mask be positioned on described metal wiring layer and described insulating barrier, described solder mask is provided with perforate, and described aperture bottom exposes metal wiring layer;
Form the soldered ball of filling described perforate, described soldered ball is electrically connected with described metal wiring layer.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510726417.0A CN105244360B (en) | 2015-10-29 | 2015-10-29 | Sensitive chip encapsulating structure and its packaging method |
| KR1020187011117A KR20180056720A (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
| JP2018520497A JP2018533217A (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
| US15/766,781 US20190067352A1 (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
| PCT/CN2016/103791 WO2017071649A1 (en) | 2015-10-29 | 2016-10-28 | Photosensitive chip packaging structure and packaging method thereof |
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| CN201510726417.0A CN105244360B (en) | 2015-10-29 | 2015-10-29 | Sensitive chip encapsulating structure and its packaging method |
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| CN105244360A true CN105244360A (en) | 2016-01-13 |
| CN105244360B CN105244360B (en) | 2019-02-26 |
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