CN105161503B - 非晶硅半导体tft背板结构 - Google Patents

非晶硅半导体tft背板结构 Download PDF

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CN105161503B
CN105161503B CN201510586074.2A CN201510586074A CN105161503B CN 105161503 B CN105161503 B CN 105161503B CN 201510586074 A CN201510586074 A CN 201510586074A CN 105161503 B CN105161503 B CN 105161503B
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amorphous silicon
silicon layer
layer
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lightly doped
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CN105161503A (zh
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吕晓文
苏智昱
蒙艳红
梅文淋
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78627Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78609Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78663Amorphous silicon transistors
    • H01L29/78669Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate

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Abstract

本发明提供一种非晶硅半导体TFT背板结构,其半导体层(4)为多层结构,包括接触栅极绝缘层(3)的底层非晶硅层(41)、接触源级(6)与漏极(7)的N型重掺杂非晶硅层(42)、夹设于底层非晶硅层(41)与N型重掺杂非晶硅层(42)之间的至少两层N型轻掺杂非晶硅层(43)、将每相邻两层轻掺杂非晶硅层(43)间隔开的第一中间非晶硅层(44)、及将N型重掺杂非晶硅层(42)与最靠近该N型重掺杂非晶硅层(42)的轻掺杂非晶硅层(43)间隔开的第二中间非晶硅层(45);这种结构进一步降低了源漏极和半导体层之间的能量势垒,使电子注入更加容易,保证了开态电流不会降低,同时可以提高空穴传输的势垒,降低漏电流,提高TFT的可靠性和电学稳定性。

Description

非晶硅半导体TFT背板结构
技术领域
本发明涉及显示技术领域,尤其涉及一种非晶硅半导体TFT背板结构。
背景技术
平板显示装置具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。现有的平板显示装置主要包括液晶显示装置(Liquid Crystal Display,LCD)及有机电致发光显示装置(Organic Light Emitting Display,OLED)等。
薄膜晶体管(Thin Film Transistor,TFT)是平板显示装置的重要组成部分,可形成在玻璃基板或塑料基板上,通常作为开关器件和驱动器件用在诸如LCD、OLED、电泳显示装置(EPD)上。
按照TFT内半导体材料的不同,TFT通常可分成非晶硅(A-Si)半导体TFT、多晶硅(Poly-Si)半导体TFT、及氧化物半导体TFT。非晶硅在目前的半导体行业中应用最为广泛,非晶硅半导体TFT具有制程简单、成本低、易于进行大面积制程等优点,因此,平板显示装置采用非晶硅半导体TFT最为普遍。
由于非晶硅材料与金属接触时存在较大的势能差,二者之间难以形成欧姆接触,在实际应用中,为了获得金属和非晶硅半导体层之间的欧姆接触,一般对半导体层接触金属层的表面进行N型重掺杂,即对半导体层接触金属层的表面掺杂高浓度的磷(P)元素,以降低金属层和半导体层的接触阻抗。
图1所示为一种现有的非晶硅半导体TFT背板结构,包括基板10、栅极20、栅极绝缘层30、非晶硅半导体层40、源极60、及漏极70。所述非晶硅半导体层40为双层结构,其中接触栅极绝缘层30的底层为未经任何处理的纯非晶硅层41,接触源极60与漏极70的顶层为N型重掺杂非晶硅层42。N型重掺杂非晶硅层42与源极60、及漏极70形成欧姆接触,降低了源极60、漏极70与半导体层40的接触阻抗,提高了电流效率,增大了开态电流(Ion)。
但是上述现有的如图1所示的非晶硅半导体TFT背板结构在增大开态电流的同时,也存在一定的问题,如图3中虚线线型的TFT电流曲线所示,当TFT的栅极电压(Vg)为负电压,且负电压增大到一定程度时,会激发出较多的正电荷形成空穴导电通道,导致产生较大的空穴漏电流(Hole current Ioff),降低了TFT的可靠性,使得TFT的电学稳定性下降。
发明内容
本发明的目的在于提供一种非晶硅半导体TFT背板结构,能够在不降低开态电流的前提下,降低漏电流,提高TFT的可靠性和电学稳定性。
为实现上述目的,本发明提供了一种非晶硅半导体TFT背板结构,包括基板、设于所述基板上的栅极、覆盖所述栅极与基板的栅极绝缘层、于所述栅极上方设于栅极绝缘层上的半导体层、及设于所述栅极绝缘层上分别接触半导体层上表面的源级与漏极;
所述半导体层为多层结构,包括接触栅极绝缘层的底层非晶硅层、接触所述源级与漏极的N型重掺杂非晶硅层、夹设于所述底层非晶硅层与N型重掺杂非晶硅层之间的至少两层N型轻掺杂非晶硅层、将每相邻两层轻掺杂非晶硅层间隔开的第一中间非晶硅层、及将所述N型重掺杂非晶硅层与最靠近该N型重掺杂非晶硅层的轻掺杂非晶硅层间隔开的第二中间非晶硅层;一沟道区于所述半导体层的中部贯穿所述N型重掺杂非晶硅层、第二中间非晶硅层、第一中间非晶硅层、与全部N型轻掺杂非晶硅层。
所述N型轻掺杂非晶硅层的数量为两层。
靠近所述N型重掺杂非晶硅层的轻掺杂非晶硅层的离子掺杂浓度高于靠近所述底层非晶硅层的轻掺杂非晶硅层的离子掺杂浓度。
所述N型轻掺杂非晶硅层与N型重掺杂非晶硅层的厚度相等。
所述半导体层通过化学气相沉积工艺、蚀刻工艺制作。
所述基板为玻璃基板。
所述栅极、源级、与漏极的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述栅极绝缘层的材料为氮化硅、氧化硅、或二者的组合。
本发明的有益效果:本发明提供的一种非晶硅半导体TFT背板结构,其半导体层设置为多层结构,在底层非晶硅层与N型重掺杂非晶硅层之间夹设至少两层N型轻掺杂非晶硅层,每相邻两层轻掺杂非晶硅层之间通过第一中间非晶硅层间隔开,N型重掺杂非晶硅层与最靠近该N型重掺杂非晶硅层的轻掺杂非晶硅层通过第二中间非晶硅层间隔开,这种结构进一步降低了源漏极和半导体层之间的能量势垒,使电子注入更加容易,保证了开态电流不会降低,同时可以提高空穴传输的势垒,分掉更多的TFT栅极与源极之间的电压,从而降低漏电流,提高TFT的可靠性和电学稳定性。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为一种现有的非晶硅半导体TFT背板结构的剖面示意图;
图2为本发明的非晶硅半导体TFT背板结构的剖面示意图;
图3为本发明的非晶硅半导体TFT背板结构与图1所示的现有的非晶硅半导体TFT背板结构的TFT电流曲线的对比示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2,本发明提供一种非晶硅半导体TFT背板结构,包括:基板1、设于所述基板1上的栅极2、覆盖所述栅极2与基板1的栅极绝缘层3、于所述栅极2上方设于栅极绝缘层3上的半导体层4、及设于所述栅极绝缘层3上分别接触半导体层4上表面的源级6与漏极7。
重点需要说明的是,所述半导体层4为多层结构,包括接触栅极绝缘层3的底层非晶硅层41、接触所述源级6与漏极7的N型重掺杂非晶硅层42、夹设于所述底层非晶硅层41与N型重掺杂非晶硅层42之间的至少两层N型轻掺杂非晶硅层43、将每相邻两层轻掺杂非晶硅层43间隔开的第一中间非晶硅层44、及将所述N型重掺杂非晶硅层42与最靠近该N型重掺杂非晶硅层42的轻掺杂非晶硅层43间隔开的第二中间非晶硅层45;一沟道区46于所述半导体层4的中部贯穿所述N型重掺杂非晶硅层42、第二中间非晶硅层45、第一中间非晶硅层44、与全部N型轻掺杂非晶硅层43。
优选的,如图2所示,所述N型轻掺杂非晶硅层43的数量为两层,该两层N型轻掺杂非晶硅层43被第一中间非晶硅层44间隔开,靠近所述N型重掺杂非晶硅层42的轻掺杂非晶硅层43的磷离子掺杂浓度高于靠近所述底层非晶硅层41的轻掺杂非晶硅层43的磷离子掺杂浓度。当然,所述N型轻掺杂非晶硅层43的数量还可为三层、四层甚至更多,每相邻两层轻掺杂非晶硅层43之间设置一第一中间非晶硅层44进行间隔,多层N型轻掺杂非晶硅层43按照从下到上的顺序依次提高磷离子掺杂浓度。
具体地,所述N型轻掺杂非晶硅层43与N型重掺杂非晶硅层42的厚度相等。
以图2所示的非晶硅半导体TFT背板结构为例,所述半导体层4先通过化学气相沉积(Chemical Vapor Deposition,CVD)工艺依次沉积底层非晶硅层41、N型轻掺杂非晶硅层43、第一中间非晶硅层44、N型轻掺杂非晶硅层43、第二中间非晶硅层45、与N型重掺杂非晶硅层42,沉积底层非晶硅层41、第一中间非晶硅层44、第二中间非晶硅层45的时候仅沉积纯非晶硅,而沉积两层N型轻掺杂非晶硅层43、N型重掺杂非晶硅层42的时候在沉积非晶硅的同时,通入含磷离子的气体,并通过调节含磷离子的气体的浓度与流量来控制不同的磷离子掺杂浓度;沉积完成后,再通过蚀刻工艺蚀刻出所述沟道区46。
进一步地,所述基板1为玻璃基板;所述栅极2、源级6、与漏极7的材料为钼(Mo)、钛(Ti)、铝(Al)、铜(Cu)中的一种或多种的堆栈组合;所述栅极绝缘层3的材料为氮化硅(SiNx)、氧化硅(SiOx)、或二者的组合。
请参阅图3,实线线型表示本发明的非晶硅半导体TFT背板结构的TFT电流曲线,与虚线线型所表示的现有的非晶硅半导体TFT背板结构的TFT电流曲线相比,本发明的非晶硅半导体TFT背板结构的TFT开态电流提高,当TFT的栅极电压Vg为负电压且负电压增大到一定程度时,漏电流降低,这是由于所述半导体层4设置为多层结构,在底层非晶硅层41与N型重掺杂非晶硅层42之间夹设至少两层N型轻掺杂非晶硅层43,每相邻两层轻掺杂非晶硅层43之间通过第一中间非晶硅层44间隔开,N型重掺杂非晶硅层42与最靠近该N型重掺杂非晶硅层42的轻掺杂非晶硅层43通过第二中间非晶硅层45间隔开,这种结构进一步降低了源极6、漏极7和半导体层4之间的能量势垒,使电子注入更加容易,保证了开态电流不会降低,同时可以提高空穴传输的势垒,分掉更多的TFT栅极与源极之间的电压,从而降低漏电流,提高TFT的可靠性和电学稳定性。
综上所述,本发明的非晶硅半导体TFT背板结构,其半导体层设置为多层结构,在底层非晶硅层与N型重掺杂非晶硅层之间夹设至少两层N型轻掺杂非晶硅层,每相邻两层轻掺杂非晶硅层之间通过第一中间非晶硅层间隔开,N型重掺杂非晶硅层与最靠近该N型重掺杂非晶硅层的轻掺杂非晶硅层通过第二中间非晶硅层间隔开,这种结构进一步降低了源漏极和半导体层之间的能量势垒,使电子注入更加容易,保证了开态电流不会降低,同时可以提高空穴传输的势垒,分掉更多的TFT栅极与源极之间的电压,从而降低漏电流,提高TFT的可靠性和电学稳定性。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (8)

1.一种非晶硅半导体TFT背板结构,其特征在于,包括:基板(1)、设于所述基板(1)上的栅极(2)、覆盖所述栅极(2)与基板(1)的栅极绝缘层(3)、于所述栅极(2)上方设于栅极绝缘层(3)上的半导体层(4)、及设于所述栅极绝缘层(3)上分别接触半导体层(4)上表面的源极(6)与漏极(7);
所述半导体层(4)为多层结构,包括接触栅极绝缘层(3)的底层非晶硅层(41)、接触所述源极 (6)与漏极(7)的N型重掺杂非晶硅层(42)、夹设于所述底层非晶硅层(41)与N型重掺杂非晶硅层(42)之间的至少两层N型轻掺杂非晶硅层(43)、将每相邻两层轻掺杂非晶硅层(43)间隔开的第一中间非晶硅层(44)、及将所述N型重掺杂非晶硅层(42)与最靠近该N型重掺杂非晶硅层(42)的轻掺杂非晶硅层(43)间隔开的第二中间非晶硅层(45);一沟道区(46)于所述半导体层(4)的中部贯穿所述N型重掺杂非晶硅层(42)、第二中间非晶硅层(45)、第一中间非晶硅层(44)、与全部N型轻掺杂非晶硅层(43);
所述N型轻掺杂非晶硅层(43)按照从下到上的顺序逐层提高磷离子掺杂浓度。
2.如权利要求1所述非晶硅半导体TFT背板结构,其特征在于,所述N型轻掺杂非晶硅层(43)的数量为两层。
3.如权利要求2所述非晶硅半导体TFT背板结构,其特征在于,靠近所述N型重掺杂非晶硅层(42)的轻掺杂非晶硅层(43)的离子掺杂浓度高于靠近所述底层非晶硅层(41)的轻掺杂非晶硅层(43)的离子掺杂浓度。
4.如权利要求2所述非晶硅半导体TFT背板结构,其特征在于,所述N型轻掺杂非晶硅层(43)与N型重掺杂非晶硅层(42)的厚度相等。
5.如权利要求3所述非晶硅半导体TFT背板结构,其特征在于,所述半导体层(4)通过化学气相沉积工艺、蚀刻工艺制作。
6.如权利要求1所述非晶硅半导体TFT背板结构,其特征在于,所述基板(1)为玻璃基板。
7.如权利要求1所述非晶硅半导体TFT背板结构,其特征在于,所述栅极(2)、源极 (6)、与漏极(7)的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
8.如权利要求1所述非晶硅半导体TFT背板结构,其特征在于,所述栅极绝缘层(3)的材料为氮化硅、氧化硅、或二者的组合。
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