CN105045009A - 一种液晶显示面板及其阵列基板 - Google Patents
一种液晶显示面板及其阵列基板 Download PDFInfo
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F2201/40—Arrangements for improving the aperture ratio
Abstract
本发明公开了一种液晶显示面板及其阵列基板。该阵列基板包括基板、多条扫描线、多条数据线以及多条共享扫描线,多条扫描线和多条数据线相交设置在基板上,以形成多个像素单元,每个像素单元包括主像素单元和子像素单元,相邻的两个像素单元的子像素单元相邻设置,相邻的两个子像素单元共用一条共享扫描线,共享扫描线用于同时驱动相邻的两个子像素单元。通过以上方式,本发明能够减少共享扫描线的数量,进而减少共享扫描线占用的开口率,提高像素的开口率。
Description
技术领域
本发明涉及液晶显示技术领域,特别是涉及一种液晶显示面板及其阵列基板。
背景技术
目前采用VA(VerticalAlignment,垂直配向)的液晶显示器通常将像素分为主像素区域和子像素区域,并且子像素区域的像素电压低于主像素单元的像素电压,以使位于子像素区域的液晶的倒向与位于主像素区域的液晶的倒向不同,进而改善大视角色偏。
为了使得子像素区域的像素电压低于主像素单元的像素电压,现有技术通过每个像素均设置有一条共享扫描线,但是共享扫描线会占用像素的开口率,进而影响液晶显示器的穿透率。
发明内容
本发明实施例提供了一种液晶显示面板及其阵列基板,能够减少共享扫描线占用的开口率,提高像素的开口率。
本发明提供一种阵列基板,其包括基板、多条扫描线、多条数据线以及多条共享扫描线,多条扫描线和多条数据线相交设置在基板上,以形成多个像素单元,每个像素单元包括主像素单元和子像素单元,相邻的两个像素单元的子像素单元相邻设置,相邻的两个子像素单元共用一条共享扫描线,共享扫描线用于同时驱动相邻的两个子像素单元。
其中,相邻的两个像素单元包括沿着数据线延伸方向相邻设置的第N个像素单元和第N+1个像素单元,第N个像素单元包括第N个主像素单元、第N个子像素单元以及第N个分享电容,第N+1个像素单元包括第N+1个主像素单元、第N+1个子像素单元以及第N+1个分享电容。
其中,第N个像素单元位于第N条扫描线和第M条共享扫描线之间,第N+1个像素单元位于第M条共享扫描线和第N+1条扫描线之间。
其中,阵列基板还包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管以及第六薄膜晶体管,第一薄膜晶体管的栅极与第N条扫描线连接,第一薄膜晶体管的源极与第N条数据线连接,第一薄膜晶体管的漏极与第N个主像素单元连接;第二薄膜晶体管的栅极与第N条扫描线连接,第二薄膜晶体管的源极与第N条数据线连接,第二薄膜晶体管的漏极与第N个子像素单元连接;第三薄膜晶体管的栅极与第M条共享扫描线连接,第三薄膜晶体管的源极与第N个子像素单元连接,第三薄膜晶体管的漏极与第N个分享电容连接;第四薄膜晶体管的栅极与第N+1条扫描线连接,第四薄膜晶体管的源极与第N条数据线连接,第四薄膜晶体管的漏极与第N+1个主像素单元连接;第五薄膜晶体管的栅极与第N+1条扫描线连接,第五薄膜晶体管的源极与第N条数据线连接,第五薄膜晶体管的漏极与第N+1子像素单元连接;第六薄膜晶体管的栅极与第M条共享扫描线连接,第六薄膜晶体管的源极与第N+1个子像素单元连接,第六薄膜晶体管的漏极与第N+1个分享电容连接。
其中,第N个像素单元和第N+1个像素单元之间的第M条共享扫描线与第N+n条的扫描线连接,其中n为大于或等于2的整数,M、N均为大于或等于1的整数,并且M=(N+1)/2。
其中,第M条共享扫描线与第N+2条扫描线连接。
其中,当第N条扫描线开启,第N+1条扫描线和第N+2条扫描线关闭时,第一薄膜晶体管和第二薄膜晶体管导通,第N条数据线为第N个主像素单元和第N个子像素单元充电;当第N+1条扫描线开启,第N条扫描线和第N+2条扫描线关闭时,第四薄膜晶体管和第五薄膜晶体管导通,第N条数据线为第N+1个主像素单元和第N+1个子像素单元充电。
其中,当第N+2条扫描线开启,第N+1条扫描线和第N条扫描线关闭时,第三薄膜晶体管和第六薄膜晶体管导通,第N个子像素单元与第M个分享电容连接,第N+1个子像素单元与第M个分享电容连接,以降低第N个子像素单元和第N+1个子像素单元的电压。
其中,每个像素单元的像素电极为ITO。
本发明还提供一种液晶显示面板,其包括上述阵列基板。
通过上述方案,本发明的有益效果是:本发明通过设置基板、多条扫描线、多条数据线以及多条共享扫描线,多条扫描线和多条数据线相交设置在基板上,以形成多个像素单元,每个像素单元包括主像素单元和子像素单元,相邻的两个像素单元的子像素单元相邻设置,相邻的两个子像素单元共用一条共享扫描线,共享扫描线用于同时驱动相邻的两个子像素单元,能够减少共享扫描线的数量,进而减少共享扫描线占用的开口率,提高像素的开口率。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。其中:
图1是本发明第一实施例的阵列基板的结构示意图;
图2是图1中相邻的两个像素单元结构的等效电路图;
图3是本发明第一实施例的液晶面板的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
请参见图1所示,图1是本发明第一实施例的阵列基板的结构示意图。如图1所示,本实施例所揭示的阵列基板10包括基板11、多条扫描线12、多条数据线13以及多条共享扫描线14。
多条扫描线12和多条数据线13相交设置在基板11上,以形成多个像素单元15;每个像素单元15均包括主像素单元和子像素单元,其中相邻的两个像素单元15的子像素单元相邻设置。相邻的两个子像素单元共用一条共享扫描线14,共享扫描线14用于同时驱动相邻的两个子像素单元。
优选地,相邻的两个像素单元15包括沿着数据线13延伸方向相邻设置的第N个像素单元151和第N+1个像素单元152,即第N个像素单元151和第N+1个像素单元152为相邻两行的像素单元。第N个像素单元151包括第N个主像素单元161、第N个子像素单元171以及第N个分享电容181,第N+1个像素单元152包括第N+1个主像素单元162、第N+1个子像素单元172以及第N+1个分享电容182;将现有的第N+1个像素单元152旋转180°,以使的第N个子像素单元171与第N+1个子像素单元172相邻设置。其中,N为大于或等于1的整数。
其中,第N个像素单元151位于第N条扫描线12和第M条共享扫描线14之间,第N+1个像素单元152位于第M条共享扫描线14和第N+1条扫描线12之间。阵列基板10还包括第一薄膜晶体管T1、第二薄膜晶体管T2第三薄膜晶体管T3、第四薄膜晶体管T4、第五薄膜晶体管T5以及第六薄膜晶体管T6。
第一薄膜晶体管T1的栅极与第N条扫描线12连接,第一薄膜晶体管T1的源极与第N条数据线13连接,第一薄膜晶体管T1的漏极与第N个主像素单元161连接;第二薄膜晶体管T2的栅极与第N条扫描线12连接,第二薄膜晶体管T2的源极与第N条数据线13连接,第二薄膜晶体管T2的漏极与第N个子像素单元171连接;第三薄膜晶体管T3的栅极与第M条共享扫描线14连接,第三薄膜晶体管T3的源极与第N个子像素单元171连接,第三薄膜晶体管T3的漏极与第N个分享电容181连接;第四薄膜晶体管T4的栅极与第N+1条扫描线12连接,第四薄膜晶体管T4的源极与第N条数据线13连接,第四薄膜晶体管T4的漏极与第N+1个主像素单元162连接;第五薄膜晶体管T5的栅极与第N+1条扫描线12连接,第五薄膜晶体管T5的源极与第N条数据线13连接,第五薄膜晶体管T5的漏极与第N+1子像素单元172连接;第六薄膜晶体管T6的栅极与第M条共享扫描线14连接,第六薄膜晶体管T6的源极与第N+1个子像素单元172连接,第六薄膜晶体管T6的漏极与第N+1个分享电容182连接。
请一并参见图2所示,本实施例所揭示的相邻的两个像素单元15结构的等效电路图。其中,第N个主像素单元161等效于液晶电容Clc1和存储电容Cst1,第N个子像素单元171等效于液晶电容Clc2和存储电容Cst2,第N个分享电容181为电容Cdown1;第N+1个主像素单元162等效于液晶电容Clc3和存储电容Cst3,第N+1子像素单元172等效于液晶电容Clc4和存储电容Cst4,第N+1个分享电容182为电容Cdown2。
当第N条扫描线12打开时,第一薄膜晶体管T1和第二薄膜晶体管T2导通,第N条数据线13为第N个主像素单元161和第N个子像素单元171进行充电,第N个主像素单元161的电压等于第N个子像素单元171的电压,即液晶电容Clc1和存储电容Cst1的电压分别与液晶电容Clc2和存储电容Cst2的电压相等。
当第N+1条扫描线12打开时,第四薄膜晶体管T4和第五薄膜晶体管T5导通,第N+1条数据线13为第N+1个主像素单元162和第N+1个子像素单元172进行充电,第N+1个主像素单元162的电压等于第N+1个子像素单元172的电压,即液晶电容Clc3和存储电容Cst3的电压分别与液晶电容Clc4和存储电容Cst4的电压相等。
当第M条共享扫描线14打开,即第M条共享扫描线14同时驱动第N个子像素单元171与第N+1个子像素单元172时,第三薄膜晶体管T3和第六薄膜晶体管T6导通,第N个子像素单元171通过第三薄膜晶体管T3与第N个分享电容181连接,第N个分享电容181用于分担第N个子像素单元171的电压,以使第N个子像素单元171的电压降低,第N个主像素单元161的电压大于第N个子像素单元171的电压,此时位于第N个主像素单元161的液晶倒向与位于第N个子像素单元171的液晶倒向不同;第N+1个子像素单元172通过第六薄膜晶体管T6与第N+1个分享电容182连接,第N+1个分享电容182用于分担第N+1个子像素单元172的电压,以使第N+1个子像素单元172的电压降低,第N+1个主像素单元162的电压大于第N+1个子像素单元172的电压,此时位于第N+1个主像素单元162的液晶倒向与位于第N+1个子像素单元172的液晶倒向不同。因此,本实施例所揭示的阵列基板10能够改善大视角色偏。
第N个像素单元151和第N+1个像素单元152之间的第M条共享扫描线14与第N+n条的扫描线12连接,其中n为大于或等于2的整数,M为大于或等于1的整数,并且M与N满足以下关系:
M=(N+1)/2
当N=1时,M=1,第1个像素单元151和第2个像素单元152之间的第1条共享扫描线14。
优选地,n等于2,即第M条共享扫描线14与第N+2条的扫描线12连接。其中,第N条扫描线12、第N+1条扫描线12以及第N+2条的扫描线12依次打开,在第N条扫描线12和第N+1条扫描线12关闭后,第N+2条扫描线12打开,即第M条共享扫描线14打开,以使第M条共享扫描线14在第N个像素单元151和第N+1个像素单元152充电完成并关闭后才打开。
值得注意的是,每个像素单元15的像素电极均为ITO(IndiumTinOxides,纳米铟锡)。
本实施例所揭示的阵列基板10通过第N个子像素单元171与第N+1个子像素单元172相邻设置,第N个子像素单元171与第N+1个子像素单元172共用第M条共享扫描线14,第M条共享扫描线14同时驱动第N个子像素单元171与第N+1个子像素单元172,能够减少共享扫描线14的数量,进而减少共享扫描线14占用的开口率,提高像素的开口率,提升产品穿透率和产品品质。
本发明还提供一种液晶显示面板,其在第一实施例所揭示的阵列基板10的基础上进行描述。如图3所示,本实施所揭示的液晶显示面板30包括阵列基板31、彩膜基板32以及设置在阵列基板31和彩膜基板32之间液晶层33,其中阵列基板31和彩膜基板32相对设置,阵列基板31优选为上述的阵列基板10,在此不再赘述。
综上所述,本发明通过第N个子像素单元171与第N+1个子像素单元172相邻设置,第N个子像素单元171与第N+1个子像素单元172共用第M条共享扫描线14,第M条共享扫描线14同时驱动第N个子像素单元171与第N+1个子像素单元172,能够减少共享扫描线14的数量,进而减少共享扫描线14占用的开口率,提高像素的开口率,提升产品穿透率和产品品质。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (10)
1.一种阵列基板,其特征在于,所述阵列基板包括基板、多条扫描线、多条数据线以及多条共享扫描线,所述多条扫描线和所述多条数据线相交设置在所述基板上,以形成多个像素单元,每个所述像素单元包括主像素单元和子像素单元,相邻的两个所述像素单元的子像素单元相邻设置,所述相邻的两个子像素单元共用一条所述共享扫描线,所述共享扫描线用于同时驱动所述相邻的两个子像素单元。
2.根据权利要求1所述的阵列基板,其特征在于,所述相邻的两个像素单元包括沿着所述数据线延伸方向相邻设置的第N个像素单元和第N+1个像素单元,所述第N个像素单元包括第N个主像素单元、第N个子像素单元以及第N个分享电容,所述第N+1个像素单元包括第N+1个主像素单元、第N+1个子像素单元以及第N+1个分享电容。
3.根据权利要求2所述的阵列基板,其特征在于,所述第N个像素单元位于所述第N条扫描线和所述第M条共享扫描线之间,所述第N+1个像素单元位于所述第M条共享扫描线和所述第N+1条扫描线之间。
4.根据权利要求2所述的阵列基板,其特征在于,所述阵列基板还包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管以及第六薄膜晶体管,所述第一薄膜晶体管的栅极与第N条扫描线连接,所述第一薄膜晶体管的源极与第N条数据线连接,所述第一薄膜晶体管的漏极与所述第N个主像素单元连接;所述第二薄膜晶体管的栅极与所述第N条扫描线连接,所述第二薄膜晶体管的源极与所述第N条数据线连接,所述第二薄膜晶体管的漏极与所述第N个子像素单元连接;所述第三薄膜晶体管的栅极与第M条共享扫描线连接,所述第三薄膜晶体管的源极与所述第N个子像素单元连接,所述第三薄膜晶体管的漏极与所述第N个分享电容连接;所述第四薄膜晶体管的栅极与第N+1条扫描线连接,所述第四薄膜晶体管的源极与第N条所述数据线连接,所述第四薄膜晶体管的漏极与所述第N+1个主像素单元连接;所述第五薄膜晶体管的栅极与所述第N+1条扫描线连接,所述第五薄膜晶体管的源极与所述第N条数据线连接,所述第五薄膜晶体管的漏极与所述第N+1子像素单元连接;所述第六薄膜晶体管的栅极与所述第M条共享扫描线连接,所述第六薄膜晶体管的源极与所述第N+1个子像素单元连接,所述第六薄膜晶体管的漏极与所述第N+1个分享电容连接。
5.根据权利要求4所述的阵列基板,其特征在于,所述第N个像素单元和所述第N+1个像素单元之间的所述第M条共享扫描线与第N+n条的扫描线连接,其中n为大于或等于2的整数,M、N均为大于或等于1的整数,并且M=(N+1)/2。
6.根据权利要求4所述的阵列基板,其特征在于,所述第M条共享扫描线与第N+2条扫描线连接。
7.根据权利要求4所述的阵列基板,其特征在于,当所述第N条扫描线开启,所述第N+1条扫描线和第N+2条扫描线关闭时,所述第一薄膜晶体管和第二薄膜晶体管导通,所述第N条数据线为所述第N个主像素单元和所述第N个子像素单元充电;当所述第N+1条扫描线开启,所述第N条扫描线和第N+2条扫描线关闭时,所述第四薄膜晶体管和第五薄膜晶体管导通,所述第N条数据线为所述第N+1个主像素单元和所述第N+1个子像素单元充电。
8.根据权利要求7所述的阵列基板,其特征在于,当所述第N+2条扫描线开启,所述第N+1条扫描线和第N条扫描线关闭时,所述第三薄膜晶体管和第六薄膜晶体管导通,所述第N个子像素单元与所述第M个分享电容连接,所述第N+1个子像素单元与所述第M个分享电容连接,以降低所述第N个子像素单元和第N+1个子像素单元的电压。
9.根据权利要求1所述的阵列基板,其特征在于,每个所述像素单元的像素电极为ITO。
10.一种液晶显示面板,其特征在于,所述液晶显示面板包括如权利要求1-9任意一项所述的阵列基板。
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CN112445036B (zh) * | 2019-09-05 | 2023-10-24 | Jvc建伍株式会社 | 液晶设备及其像素检查方法、以及波长选择光开关装置 |
CN111446262A (zh) * | 2020-04-08 | 2020-07-24 | 深圳市华星光电半导体显示技术有限公司 | 一种阵列基板及其制造方法、显示面板 |
CN113077717A (zh) * | 2021-03-23 | 2021-07-06 | Tcl华星光电技术有限公司 | 显示面板及显示装置 |
CN113077717B (zh) * | 2021-03-23 | 2022-07-12 | Tcl华星光电技术有限公司 | 显示面板及显示装置 |
CN114740662A (zh) * | 2022-05-06 | 2022-07-12 | 滁州惠科光电科技有限公司 | 阵列基板、显示面板和显示装置 |
CN114740662B (zh) * | 2022-05-06 | 2023-08-15 | 滁州惠科光电科技有限公司 | 阵列基板、显示面板和显示装置 |
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US20170146875A1 (en) | 2017-05-25 |
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