CN103728800B - 一种能消除可移动云纹的液晶显示器 - Google Patents

一种能消除可移动云纹的液晶显示器 Download PDF

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CN103728800B
CN103728800B CN201310627486.7A CN201310627486A CN103728800B CN 103728800 B CN103728800 B CN 103728800B CN 201310627486 A CN201310627486 A CN 201310627486A CN 103728800 B CN103728800 B CN 103728800B
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郑华
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明涉及一种阵列基板以及相应的液晶显示器,阵列基板包括配置于一基板上的数据线;门线组以及共用电极线,互相交错于相邻两条数据以定义出一像素结构,所述像素结构包括:薄膜晶体管组件;第一与第二像素电极,配置于门线组以及共用电级线之间;分担电容,配置于门线组与像素电极之间。像素结构沿数据线延伸的方向成多列排列,相邻两列的像素结构以相反的方向依序排列,其中门线组相互靠近的相邻两列像素结构的充电门线并列在一起,集中于像素交界处,利用分担电容的位置配置使像素开口区远离漏光区,在不需要增加黑矩阵的宽度下,解决了现有技术的移动云纹现象以及开口率过低的缺陷。

Description

一种能消除可移动云纹的液晶显示器
技术领域
本发明涉及像素阵列基板以及相应的液晶显示器,特别是涉及一种在垂直配向技术中可消除移动云纹的像素结构。
背景技术
为了改善垂直配向(VA)液晶显示器的移动云纹(MovableMura)现象,现有的液晶像素结构采用电荷分担(Charge-Sharing)的方式来改善大视角色偏。如图1所示,位于第一金属层的充电门线(Charging-Gate)101、分担门线(Sharing-Gate)102、共用电极线103和104以及位于第二金属层的数据线105、有源组件106以及分担电容(Sharing-Capacitor)107,通过接触孔(Hole)108和109,使第一金属层与第二金属层的组件导通。对应阵列基板上方的像素电极层形成光线可通过的开口区,并且区分为主要开口区110与次要开口区111。然而,不论充电门线101与分担门线102是否被驱动,充电门线101与分担门线102上下两侧的区域都会因为彩色滤光片基板上的共用电极而造成正偏压或负偏压,引起液晶偏转,从而形成漏光区112、113、114。
如图2所示,在理想状态下,充电门线101和分担门线102及其上下两侧的漏光区112、113、114会由彩色滤光片基板上的黑矩阵(BlackMatrix)201遮覆,因此不会对黑画面的显示造成影响。但实际上,由于垂直配向的液晶面板的阵列基板与彩色滤光片基板是靠着四边框胶固定在一起,因此很容易会发生两基板的相对位移(Shift)。如图1中的配置方式,由于分担电容107的存在,分担门线102下方的漏光区114因金属层的遮光作用而远离次要开口区111,而充电门线101上方的漏光区112则直接紧邻于主要开口区110。
然而,当彩色滤光片基板相对于阵列基板向上位移时,只要位移长度不超过分担电容107的宽度就不会产生漏光;但是,当彩色滤光片基板相对于阵列基板向下位移时,即使一个很小的位移都会导致漏光,如图3所示,向下位移造成漏光区112的漏光会导致黑画面时出现亮团301,由于该亮团301在拍击面板时会发生移动,因此称之为移动云纹。现有技术的解决方法是在彩色滤光片基板上的黑矩阵201增加宽度,使黑矩阵201向主要开口区110内延伸一段大于向下位移长度的遮光距离,避免漏光区露出,从而消除移动云纹。
上述的缺陷在于,黑矩阵201宽度的增加会导致像素开口率下降,从而降低面板的穿透率。故,有必要提供一种像素结构,以解决现有技术所存在的问题。
发明内容
本发明的目的在于提供一种阵列基板以及相应的液晶显示器,以解决垂直配向液晶显示器的移动云纹现象以及避免像素开口率下降的技术问题。
本发明的另一目的在于提供一种阵列基板以及相应的液晶显示器,可降低数据线的电阻电容延迟(RCDelay),增加像素的供电率。
本发明涉及一种液晶显示器的阵列基板,包括:基板;多条数据线,配置于所述基板上;多个门线组,相交于所述数据线;多条共用电极线,相交于所述数据线,各条共用电极线与所述门线组以及相邻两条数据线定义出一像素结构,所述像素结构包括:薄膜晶体管组件,电连接于所述数据线以及所述门电组;第一与第二像素电极,电连接于所述薄膜晶体管组件,配置于所述门线组以及所述共用电级线之间;以及分担电容,电连接于所述门线组,配置于所述门线组与所述像素电极之间。
为达成本发明的前述目的,本发明提供一种有别于现有技术重复排列像素布局的阵列基板,利用将所述像素结构沿所述数据线延伸的方向成多行排列,相邻两行的所述像素结构以相反的方向依序排列。因此,其中会有门线组相互靠近的相邻两行像素结构的充电门线并列在一起,集中于像素交界处,并且利用两个像素结构中各自对应的分担电容使门线组与像素开口区之间的漏光区自然地远离像素开口区。即使彩色滤光片基板与阵列基板发生上下相对位移,像素开口区也会因为分担电容的位置配置而远离漏光区,因此不需要增加黑矩阵的宽度来覆盖漏光。通过本发明,黑矩阵的开口区可与像素开口区完全重合,像素结构的开口率不会因为增加黑矩阵的宽度而减小,进而使像素结构的开口率达到最大化。因此,本发明可在不损失开口率的情况消除移动云纹。
在此种排列下,其中还会有门线组相互远离的相邻两行像素结构共用所述的共用电极线。整个阵列基板上的数据线相交共用电极线的次数可因此减半,意即数据线与共用电极线所形成的寄生电容大小减半。因此,不但可以有效的降低数据线的电阻电容延迟,提高像素的充电率,也可减少额外拉线的成本。
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合所附图示,做详细说明如下:
附图说明
图1为现有技术的像素结构的结构示意图。
图2为现有技术的阵列基板与彩色滤光片基板的黑矩阵理想遮光示意图。
图3所现有技术的彩色滤光片基板相对于阵列基板向下位移的示意图。
图4为本发明的像素结构示意图。
图5为本发明的阵列基板的像素结构排列示意图。
图6为本发明与现有技术的电性比较图。
图7为本发明阵列基板与彩色滤光片基板的黑矩阵理想遮光示意图。
图8为本发明彩色滤光片基板相对于阵列基板向下位移的示意图。
具体实施方式
以下各实施例的说明是参考附图,用以式例本发明可以用以实施的特定实施例。本发明所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
图4绘示本发明数组基板的像素结构示意图,像素结构400是相邻两条数据线405、充电门线401以及共用电级线403互相交错形成的区域,其中,数据线405用以传送对应像素的信号;充电门线401用以传送门线信号;共用电级线403则用以提供像素的共用电压。像素结构400包括:薄膜晶体管组件406,电连接于数据线405与充电门线401;第一像素电极410与第二像素电极411,分别电连接于薄膜晶体管组件406,用以根据像对应素的信号驱动像素,配置于充电门线401以及共用电级线403之间。此外,在充电门线401和像素电极410之间还配置有分担门线402以及电连接于分担门线402的分担电容407。
如上所述的第一像素电极410以及第二像素电极411,对应形成各所述像素结构的主要开口区与次要开口区。当充电门线401开启时,数据线405通过薄膜晶体管组件406传送对应的影像信号,并且向主要开口区和次要开口区的像素电极410、411充电;当充电门线401关闭,分担门线402随即开启,电连接于分担门线402的分担电容407因此与主要开口区和次要开口区的像素电极410、411导通,分担掉主要开口区和次要开口区的像素电极410、411上原本充满的电荷,使主要开口区和次要开口区的像素电极410、411的电压调整到适当比例。
由于分担电容407配置于分担门线401和第一像素电极410之间,并且与充电门线401和分担门线402一起集中配置于像素结构400的上部位,充电门线401与分担门线402两侧的漏光区412、413、414因此局限于分担电容407的上方,进而使漏光区414自然地远离主要开口区和次要开口区。
其中所述分担电容的宽度可以是介于6-30um之间;所述像素电极为一透明电极,材料优选为氧化铟锡(ITO,IndiumTinOxide)。
图5绘示本发明阵列基板第一优选实施例的像素结构排列示意图,配置于基板500上的像素结构沿数据线405延伸的方向成多行排列,相邻两行的像素结构以相反的方向依序排列,也就是说,在阵列基板500上的像素结构510、520、530、540呈现一上一下的依序排列。在此种排列方式下,其中会有相邻两行的像素结构520和530的充电门线并列在一起,使相邻两行的像素结构520和530的分担门线522、532与分担电容523、533一并集中于像素交界处,利用相邻两行的像素结构520和530中的分担电容523、533使分担门线522、532下方的漏光区524、534自然地远离像素电极520和530的开口区。
在此种排列方式下,其中还会有相邻两行的像素结构530和540的充电门线相互远离,于本发明的第二优选实施例中,可选择使充电门线相互远离的两个像素结构530和540共用同一条共用电极线403,整个阵列基板500上的数据线405相交共用电极线403的次数可因此减半,意即数据线405与共用电极线403形成的寄生电容大小减半。如图6所示,本发明所述的阵列基板结构601设计相较于现有技术的阵列基板602设计所量测到的数据线的电阻电容延迟较低,不但可得到更高的像素的充电率,也可减少额外拉线的成本。
本发明还涉及一种液晶显示器包括:如本发明的第一优选实施例到第二优选实施例所述的阵列基板;彩色滤光片基板,与所述阵列基板相对;以及液晶层,垂直配向于所述阵列基板与所述彩色滤光片基板之间。
图7绘示本发明的第三优选实施例的示意图,其中所述彩色滤光片基板还包含黑矩阵701,对应配置于阵列基板上的数据线405、充电门线721和731、分担门线722和732、分担电容723和733以及共用电极线403上,用于遮蔽由对应阵列基板上的各像素结构的漏光。上述的数据线405、充电门线721和731、分担门线722和732、分担电容723和733以及共用电极线403原本即为不透光的金属组件,因此配置黑矩阵701并不会造成开口率的降低。
由于上述的像素结构沿数据线405延伸的方向成多行排列,相邻两行的像素结构以相反的方向依序排列,自然会有相邻两行的像素结构720和730的充电门线721、731靠在一起,使相邻两行的像素结构720和730的分担门线722、732与分担电容723、733一并集中于像素交界处,利用相邻两行的像素结构720和730中的分担电容723、733使分担门线722、732下方的漏光区724、734自然地远离像素结构720和730的开口区。
如图8所示,即使所述彩色滤光片基板与阵列基板发生上下相对位移,像素结构720和730的开口区也会因为分担电容723或733的位置配置而具有遮光效果。其中,阵列基板与彩色滤光片基板位移的程度一般在0-30um之间,而分担电容723、733的宽度可以是介于6-30um之间。因此通过本发明的像素结构设计,可不需要增加黑矩阵701的宽度来覆盖漏光,意即图7中的黑矩阵开口区702可与像素开口区自然完全重合,像素结构的开口率不会因为增加黑矩阵的宽度而减小,进而使像素的开口率达到最大化。因此,本发明可在不损失开口率的情况消除了移动云纹。
参见图7,利用此种像素结构排列的液晶显示器,其中还会有相邻两行的像素结构730和740的充电门线相互远离,于本发明的第四优选实施例中,可选择使充电门线相互远离的两个像素结构730和740共用同一条共用电极线403,整个阵列基板700上的数据线405相交共用电极线403的次数可因此减半,意即数据线405与共用电极线403形成的寄生电容大小减半。如图6所示,本发明的液晶显示器601相较于现有技术的液晶显示器602具有更低的数据线的电阻电容延迟,因此,不但可得到更高的像素的充电率,也可减少额外拉线的成本。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可做各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (12)

1.一种阵列基板,包括:
基板;
多条数据线,配置于所述基板上;
多个门线组,相交于所述数据线;
多条共用电极线,相交于所述数据线,各条共用电极线与所述门线组以及相邻两条数据线定义出一像素结构,所述像素结构包括:
薄膜晶体管组件,电连接于所述数据线以及所述门线组;
第一像素电极与第二像素电极,电连接于所述薄膜晶体管组件,配置于所述门线组以及所述共用电级线之间;以及
分担电容,电连接于所述门线组,配置于所述门线组与所述第一像素电极之间;
其中,所述门线组包括充电门线以及配置于所述充电门线与所述分担电容之间的分担门线。
2.根据权利要求1所述的阵列基板,其特征在于,所述像素结构沿所述数据线延伸的方向成多行排列,相邻两行的所述像素结构以相反的方向依序排列。
3.根据权利要求2所述的阵列基板,其特征在于,其中门线组相互靠近的相邻两行像素结构的充电门线并列在一起,集中于所述像素结构交界处。
4.根据权利要求2所述的阵列基板,其特征在于,其中门线组相互远离的相邻两行像素结构共享所述的共用电极线。
5.根据权利要求1所述的阵列基板,其特征在于,所述第一像素电极与第二像素电极各为一透明电极。
6.根据权利要求1所述的阵列基板,其特征在于,所述分担电容的宽度在6-30um之间。
7.一种液晶显示器,包括:
阵列基板;
彩色滤光片基板,与所述阵列基板相对;以及
液晶层,配置于所述阵列基板与所述彩色滤光片基板之间;
其特征在于,
所述阵列基板包括:
基板;
多条数据线,配置于所述基板上;
多个门线组,相交于所述数据线;
多条共用电极线,相交于所述数据线,各条共用电极线与所述门线组以及相邻两条数据线定义出一像素结构,所述像素结构包括:
薄膜晶体管组件,电连接于所述数据线以及所述门线组;
第一像素电极与第二像素电极,电连接于所述薄膜晶体管组件,配置于所述门线组以及所述共用电级线之间;以及
分担电容,电连接于所述门线组,配置于所述门线组与所述第一像素电极之间;
其中,所述门线组包括充电门线以及配置于所述充电门线与所述分担电容之间的分担门线。
8.根据权利要求7所述的液晶显示器,其特征在于,所述像素结构沿所述数据线延伸的方向成多行排列,相邻两行的所述像素结构以相反的方向依序排列。
9.根据权利要求8所述的液晶显示器,其特征在于,其中门线组相互靠近的相邻两行像素结构的充电门线并列在一起,集中于所述像素结构交界处。
10.根据权利要求8所述的液晶显示器,其特征在于,其中门线组相互远离的相邻两行像素结构共用所述的共用电极线。
11.根据权利要求7所述的液晶显示器,其特征在于,所述第一像素电极与第二像素电极各为一透明电极。
12.根据权利要求7所述的液晶显示器,其特征在于,所述分担电容的宽度在6-30um之间。
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