CN105009264B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN105009264B CN105009264B CN201480012059.0A CN201480012059A CN105009264B CN 105009264 B CN105009264 B CN 105009264B CN 201480012059 A CN201480012059 A CN 201480012059A CN 105009264 B CN105009264 B CN 105009264B
- Authority
- CN
- China
- Prior art keywords
- region
- source
- pass transistor
- nmos pass
- wiring
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5228—Resistive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
- H01L27/0274—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the field effect transistor, e.g. gate coupled transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
Claims (1)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013-044168 | 2013-03-06 | ||
JP2013044168A JP6100026B2 (ja) | 2013-03-06 | 2013-03-06 | 半導体装置 |
PCT/JP2014/053410 WO2014136548A1 (ja) | 2013-03-06 | 2014-02-14 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105009264A CN105009264A (zh) | 2015-10-28 |
CN105009264B true CN105009264B (zh) | 2017-11-21 |
Family
ID=51491073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201480012059.0A Active CN105009264B (zh) | 2013-03-06 | 2014-02-14 | 半导体装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US9343457B2 (zh) |
EP (1) | EP2966675B1 (zh) |
JP (1) | JP6100026B2 (zh) |
KR (1) | KR102158458B1 (zh) |
CN (1) | CN105009264B (zh) |
TW (1) | TWI580005B (zh) |
WO (1) | WO2014136548A1 (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102013226575B4 (de) | 2013-12-19 | 2021-06-24 | Evonik Operations Gmbh | Zusammensetzung, geeignet zur Herstellung von Polyurethanschäumen, enthaltend mindestens einen ungesättigten Fluorkohlenwasserstoff oder ungesättigten Fluorkohlenwasserstoff als Treibmittel, Polyurethanschäume, Verfahren zu deren Herstellung und deren Verwendung |
US10734330B2 (en) | 2015-01-30 | 2020-08-04 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor devices having an electro-static discharge protection structure |
JP6640049B2 (ja) | 2016-08-02 | 2020-02-05 | 日立オートモティブシステムズ株式会社 | 電子装置 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08139318A (ja) * | 1994-11-11 | 1996-05-31 | Fuji Electric Co Ltd | 横型電界効果トランジスタ |
KR100188135B1 (en) * | 1996-06-27 | 1999-06-01 | Samsung Electronics Co Ltd | Protection device of semiconductor device |
US6147538A (en) * | 1997-02-05 | 2000-11-14 | Texas Instruments Incorporated | CMOS triggered NMOS ESD protection circuit |
US6258672B1 (en) * | 1999-02-18 | 2001-07-10 | Taiwan Semiconductor Manufacturing Company | Method of fabricating an ESD protection device |
KR100918180B1 (ko) * | 2003-03-04 | 2009-09-22 | 삼성전자주식회사 | 쉬프트 레지스터 |
US6849902B1 (en) * | 2004-03-11 | 2005-02-01 | Winbond Electronics Corp. | Input/output cell with robust electrostatic discharge protection |
US7646063B1 (en) * | 2005-06-15 | 2010-01-12 | Pmc-Sierra, Inc. | Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions |
JP2007116049A (ja) | 2005-10-24 | 2007-05-10 | Toshiba Corp | 半導体装置 |
US7977709B2 (en) * | 2008-01-02 | 2011-07-12 | Infineon Technologies Ag | MOS transistor and semiconductor device |
KR100996174B1 (ko) * | 2008-12-15 | 2010-11-24 | 주식회사 하이닉스반도체 | 멀티 핑거 트랜지스터를 구비한 정전기 방전 회로 |
JP5603089B2 (ja) * | 2009-02-23 | 2014-10-08 | セイコーインスツル株式会社 | 半導体装置 |
US9063192B2 (en) * | 2011-03-16 | 2015-06-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Split gate structure and method of using same |
JP2013008715A (ja) * | 2011-06-22 | 2013-01-10 | Semiconductor Components Industries Llc | 半導体装置 |
-
2013
- 2013-03-06 JP JP2013044168A patent/JP6100026B2/ja active Active
-
2014
- 2014-02-14 KR KR1020157023682A patent/KR102158458B1/ko active IP Right Grant
- 2014-02-14 US US14/771,547 patent/US9343457B2/en active Active
- 2014-02-14 WO PCT/JP2014/053410 patent/WO2014136548A1/ja active Application Filing
- 2014-02-14 EP EP14760598.4A patent/EP2966675B1/en active Active
- 2014-02-14 CN CN201480012059.0A patent/CN105009264B/zh active Active
- 2014-02-21 TW TW103105849A patent/TWI580005B/zh active
Also Published As
Publication number | Publication date |
---|---|
US9343457B2 (en) | 2016-05-17 |
TW201511223A (zh) | 2015-03-16 |
EP2966675A1 (en) | 2016-01-13 |
EP2966675A4 (en) | 2016-10-19 |
KR20150125944A (ko) | 2015-11-10 |
JP6100026B2 (ja) | 2017-03-22 |
EP2966675B1 (en) | 2021-04-14 |
CN105009264A (zh) | 2015-10-28 |
KR102158458B1 (ko) | 2020-09-22 |
TWI580005B (zh) | 2017-04-21 |
US20160020200A1 (en) | 2016-01-21 |
JP2014175344A (ja) | 2014-09-22 |
WO2014136548A1 (ja) | 2014-09-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20160328 Address after: Chiba County, Japan Applicant after: DynaFine Semiconductor Co.,Ltd. Address before: Chiba County, Japan Applicant before: Seiko Instruments Inc. |
|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder |
Address after: Chiba County, Japan Patentee after: ABLIC Inc. Address before: Chiba County, Japan Patentee before: DynaFine Semiconductor Co.,Ltd. |
|
CP01 | Change in the name or title of a patent holder | ||
CP02 | Change in the address of a patent holder |
Address after: Nagano Patentee after: ABLIC Inc. Address before: Chiba County, Japan Patentee before: ABLIC Inc. |
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CP02 | Change in the address of a patent holder |