CN104965554B - A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device - Google Patents
A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device Download PDFInfo
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- CN104965554B CN104965554B CN201510316901.6A CN201510316901A CN104965554B CN 104965554 B CN104965554 B CN 104965554B CN 201510316901 A CN201510316901 A CN 201510316901A CN 104965554 B CN104965554 B CN 104965554B
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Abstract
The invention discloses a kind of buffered-display driver high efficiency charge pump stabilized voltage supply device, by dc source S, the control circuit being connected with dc source S-phase, the temperature-compensation circuit being connected with control circuit, and the photo resistance CDS being connected with temperature-compensation circuit, and the beam excitation formula logic amplifying circuit composition being serially connected between dc source S and photo resistance CDS, it is characterised in that between temperature-compensation circuit and photo resistance CDS, it is additionally provided with mu balanced circuit；Meanwhile, between dc source S and mu balanced circuit, three linear buffer drive circuits it are provided with.The present invention can adjust output current value automatically according to the temperature change of external environment condition, and the signal after three linear buffer drive circuit bufferings will not occur bigger decay, it is thus possible to guarantee that the quality of amplification signal and performance are more stable, and effectively reduce circuit self and extraneous Radio frequency interference.
Description
Technical field
The present invention relates to a kind of supply unit, specifically refer to a kind of buffered-display driver high efficiency charge pump voltage stabilizing electricity
Source apparatus.
Background technology
At present, battery manufacturer is typically necessary after having made battery protection circuit and comes with bipolar power supply
The various functions detecting this battery protection circuit is the most up to standard, i.e. utilizes bipolar power supply quickly real
Now overvoltage, the quickly calibrated and test under-voltage, stream excessively to battery protection circuit, is widely used in simultaneously
Power amplification circuit.When so-called bipolar power supply refers to this corona discharge, the electric current of its power source internal is from negative
Pole flows to positive pole, and it is (traditional that from positive pole, the electric current of its power source internal during this power source charges is flowed to negative pole
Its internal electric current of common power the most all can only flow to positive pole from negative pole, and can not be from just
Pole flows to negative pole).But, the bipolar power supply sold the most on the market is not only easily subject to external environment condition
The impact of temperature, and after traditional power amplification circuit carries out power drive amplification, it amplifies signal
Attenuation amplitude is relatively big, and also suffers from the electromagnetic interference of outside, and then makes to amplify signal performance the most not
Stable so that its power supply performance is the most unstable.Therefore using and promoting of its profound level has been had a strong impact on,
Become the difficult problem being badly in need of effectively overcoming and solve.
Summary of the invention
It is an object of the invention to the impact overcoming current bipolar power supply to be easily subject to ambient temperature, enter
And after traditional power amplification circuit carries out power drive amplification, it amplifies the attenuation amplitude of signal relatively
Greatly, and also suffer from the electromagnetic interference of outside, and then it be the most unstable to make to amplify signal performance so that
The defect that its power supply performance is extremely unstable, it is provided that a kind of buffered-display driver high efficiency charge pump voltage-stabilized power supply fills
Put.
The purpose of the present invention is achieved through the following technical solutions: a kind of buffered-display driver high efficiency charge pump voltage stabilizing
Supply unit, by dc source S, the control circuit being connected with dc source S-phase, is connected with control circuit
The temperature-compensation circuit connect, and the photo resistance CDS being connected with temperature-compensation circuit, and concatenation
Beam excitation formula logic amplifying circuit composition between dc source S and photo resistance CDS, meanwhile,
It is additionally provided with mu balanced circuit between temperature-compensation circuit and photo resistance CDS；And it is arranged on dc source
Three linear buffer drive circuits between S and mu balanced circuit；Described mu balanced circuit by power amplifier P2,
One end is connected with temperature-compensation circuit, the other end is connected with the negative input of power amplifier P2
Voltage comparator U, base stage is connected with the output of power amplifier P2, emitter stage is after resistance R8
The triode Q5 being connected with three linear buffer drive circuits, one end inputs with the positive pole of power amplifier P2
The resistance R9 that end is connected, the other end is connected with temperature-compensation circuit, and it is serially connected in voltage comparator
Resistance R7 composition between the colelctor electrode of U and triode Q5；Described three linear buffer drive circuits are by collecting
Become the current collection of block U2, FET MOS, triode Q7, triode Q6, negative pole and triode Q7
Pole is connected, positive pole sequentially after resistance R19, polar capacitor C11, resistance R17 with FET MOS
The polar capacitor C9 that is connected of source electrode, positive pole emitter stage with triode Q7 after resistance R21 is connected
Connect, polar capacitor C8 that negative pole is connected with the CS pin of integrated package U2, positive pole after inductance L2 with collection
The DIM pin becoming block U2 is connected, negative pole HYS pin with integrated package U2 after resistance R20 is connected
Polar capacitor C10, one end is connected with the tie point of resistance R19 with polar capacitor C11, the other end
The resistance R18 that base stage with triode Q7 is connected after inductance L1, the current collection of positive pole and triode Q6
The polar capacitor C12 that pole is connected, negative pole is connected with the LIM pin of integrated package U2 after resistance R16,
Diode D3 that P pole ground connection, N pole are connected with the drain electrode of FET MOS and one end and three poles
The resistance R15 composition that the base stage of pipe Q6 is connected, the other end is connected with the SNS pin of integrated package U2；
The HG pin of described integrated package U2 is connected with the grid of FET MOS, its GND pin ground connection, with
And IN pin is connected with the tie point of inductance L1 with resistance R18；The positive pole of described polar capacitor C10
It is connected with the negative pole of dc source S；The emitter stage of described triode Q6 after resistance R8 with triode
The emitter stage of Q5 is connected.
Described beam excitation formula logic amplifying circuit, mainly by power amplifier P3, NAND gate IC1, with
Not gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P3, positive pole is through light
The polar capacitor C5 of ground connection after diode D1, one end is connected with the positive pole of polar capacitor C5, the other end
The resistance R10 of ground connection after diode D2, positive pole is connected with the tie point of resistance R10 and diode D2
Connect, the polar capacitor C6 of minus earth, one end is connected with the negative input of NAND gate IC1, another
The resistance R11 that end is connected with the electrode input end of power amplifier P3, is serially connected in power amplifier P3
Negative input and output between resistance R12, one end is connected with the output of NAND gate IC1,
The resistance R13 that the other end is connected with the negative input of NAND gate IC3, positive pole is defeated with NAND gate IC2
Go out end be connected, electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end and
The resistance that the positive pole of polar capacitor C6 is connected, the other end is connected with the negative input of NAND gate IC2
R14 forms；The electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P3
Connecing, its output is connected with the electrode input end of NAND gate IC2；The electrode input end of NAND gate IC3 with
The output of power amplifier P3 is connected, and its output is connected with one end of photo resistance CDS；Institute
State the tie point phase of the positive pole of polar capacitor C5 and the negative pole of dc source S with the positive pole of polar capacitor C10
Connect；One end of described photo resistance CDS is connected with the colelctor electrode of triode Q5, its another termination
Ground.
Further, described control circuit, by triode Q1, triode Q2, is serially connected in the collection of triode Q1
Resistance R1 between the colelctor electrode of electrode and triode Q2, is serially connected in emitter stage and the direct current of triode Q1
RC filter circuit between the negative pole of power supply S, is serially connected in the base stage of triode Q1 with dc source S's
Resistance R2 between negative pole, and the resistance R5 composition in parallel with dc source S-phase；Described triode
The emitter stage of Q2 is connected with the positive pole of dc source S, and the base stage of triode Q2 also with triode Q1
Colelctor electrode be connected.
Described temperature-compensation circuit, by triode Q3, triode Q4, power amplifier P1, is serially connected in
Resistance R4 between colelctor electrode and the colelctor electrode of triode Q2 of triode Q3, is serially connected in power amplifier
Electric capacity C2 between electrode input end and the output of P1, is serially connected in the negative pole input of power amplifier P1
Holding the electric capacity C3 between output, negative pole is connected with the emitter stage of triode Q4, positive pole and three poles
The electric capacity C4 that the colelctor electrode of pipe Q5 is connected, and the resistance R6 composition being in parallel with electric capacity C4；Institute
The colelctor electrode of the electrode input end and triode Q4 of stating power amplifier P1 is connected, its negative input
It is connected with the emitter stage of triode Q3；The colelctor electrode of described triode Q4 and the current collection of triode Q2
Pole is connected, its base earth；The base stage of triode Q3 is connected with the positive pole of dc source S, described
The tie point of voltage comparator U and resistance R7 is connected with the output of power amplifier P1, and three poles
The emitter stage of pipe Q4 then after resistance R9 electrode input end with power amplifier P2 be connected.
Described RC filtered electrical routing resistance R3, and the electric capacity C1 composition being in parallel with resistance R3.
The driving integrated package that described integrated package U2 uses model to be LM3401.
(1) overall structure of the present invention is simple, and it makes and very easy to use.
(2) present invention can adjust output current value, Er Qiejing automatically according to the temperature change of external environment condition
Signal after power amplification circuit amplifies will not occur bigger decay, it is thus possible to guarantee to amplify the quality of signal
And performance, really make its performance more stable, and effectively reduce circuit self and extraneous Radio frequency interference.
(3) present invention use three linear buffer drive circuits have step-down, voltage stabilizing, programmable current limit,
Overcurrent protection.
(4) present invention is provided with mu balanced circuit, not only can ensure that stablizing of output voltage, and itself and temperature
Compensation circuit, with the use of rear, can significantly improve temperature compensation coefficient, and then guarantee stablizing of duty.
Accompanying drawing explanation
Fig. 1 is the structural representation of the present invention.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but the enforcement of the present invention
Mode is not limited to this.
As it is shown in figure 1, temperature-compensating voltage-stabilized power supply of the present invention is mainly by dc source S, with direct current
The control circuit that power supply S-phase connects, the temperature-compensation circuit being connected with control circuit, with temperature-compensating electricity
The photo resistance CDS that road is connected, is serially connected in the light beam between dc source S and photo resistance CDS and swashs
Hairdo logic amplifying circuit, meanwhile, is arranged on the voltage stabilizing between temperature-compensation circuit and photo resistance CDS
Circuit, and the three linear buffer drive circuit compositions being arranged between dc source S and mu balanced circuit.
Wherein, this mu balanced circuit is by power amplifier P2, voltage comparator U, resistance R8, triode
Q5 and resistance R7 and resistance R9 composition.During connection, one end of voltage comparator U and temperature-compensation circuit
Being connected, its other end is connected with the negative input of power amplifier P2.The base stage of triode Q5
Be connected with the output of power amplifier P2, its emitter stage after resistance R8 with the transmitting of triode Q6
Pole is connected；One end of resistance R9 is connected with the electrode input end of power amplifier P2, its other end
It is connected with temperature-compensation circuit；Resistance R7 is then serially connected in the current collection of voltage comparator U and triode Q5
Between pole.One end of described photo resistance CDS is connected with the colelctor electrode of triode Q5, its another
End ground connection.
Described three linear buffer drive circuits are by integrated package U2, FET MOS, triode Q7, three
Pole pipe Q6, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20,
Resistance R21, polar capacitor C8, polar capacitor C9, polar capacitor C10, polar capacitor C11, polarity
Electric capacity C12, and diode D3 composition.
During connection, the negative pole of polar capacitor C9 is connected with the colelctor electrode of triode Q7, positive pole sequentially warp
After resistance R19, polar capacitor C11, resistance R17, the source electrode with FET MOS is connected.Polarity
The positive pole of electric capacity C8 emitter stage with triode Q7 after resistance R21 is connected, negative pole and integrated package U2
CS pin be connected.The positive pole of polar capacitor C10 after inductance L2 with the DIM pin phase of integrated package U2
Connect, negative pole HYS pin with integrated package U2 after resistance R20 is connected.
One end of resistance R18 is connected with the tie point of resistance R19 with polar capacitor C11, other end warp
After inductance L1, the base stage with triode Q7 is connected.The positive pole of polar capacitor C12 is with triode Q6's
Colelctor electrode is connected, negative pole LIM pin with integrated package U2 after resistance R16 is connected.Diode D3
P pole ground connection, N pole is connected with the drain electrode of FET MOS.And one end of resistance R15 and three
The base stage of pole pipe Q6 is connected, the other end is connected with the SNS pin of integrated package U2.
During use, the driving integrated package that described integrated package U2 uses model to be LM3401, it uses
MSOP-8 encapsulates；It is the controllable current source that a kind of buck regulator is derivative, by controlling external MOS2
Field effect transistor switch pipe, output electric current may be up to 4A.Its input supply voltage scope is 4.5～35V, work
Time electric current be 1.05mA, reference voltage is 200mV, maximum operation frequency 3MHz.
During connection, the HG pin of integrated package U2 is connected with the grid of FET MOS, its GND pin
Ground connection, and its IN pin is connected with the tie point of inductance L1 with resistance R18；Described polar capacitor C10
Positive pole be connected with the negative pole of dc source S；The emitter stage of described triode Q6 after resistance R8 with
The emitter stage of triode Q5 is connected.
Described control circuit by triode Q1, triode Q2, resistance R1, resistance R2, resistance R5 with
And RC filter circuit composition.During connection, resistance R1 is serially connected in colelctor electrode and the triode of triode Q1
Between the colelctor electrode of Q2, RC filter circuit is then serially connected in emitter stage and the dc source S of triode Q1
Negative pole between.Resistance R2 is serially connected between the base stage of triode Q1 and the negative pole of dc source S,
Resistance R5 is then in parallel with dc source S-phase.
Meanwhile, the emitter stage of triode Q2 is connected with the positive pole of dc source S, its base stage also with three poles
The colelctor electrode of pipe Q1 is connected.For guaranteeing operational effect, resistance R1, resistance R2, resistance R3 and electricity
The resistance of resistance R5 is 10K Ω.RC filtered electrical routing resistance R3 in the application, and and resistance
The electric capacity C1 composition that R3 is in parallel.
Described beam excitation formula logic amplifying circuit, mainly by power amplifier P3, NAND gate IC3, with
Not gate IC1, NAND gate IC2, polar capacitor C5, polar capacitor C6, optical diode D1, diode
D2, resistance R10 resistance R11, resistance R12, resistance R13, and resistance R14 form.
During connection, the electrode input end of described power amplifier P3 after polar capacitor C5 with dc source S
Negative pole be connected；The positive pole of polar capacitor C5 is connected with the N pole of optical diode D1 simultaneously, and light
The P3 pole then ground connection of diode D1；Resistance R10 one end is connected with the positive pole of polar capacitor C5, its
The other end is ground connection after diode D2.
The positive pole of described polar capacitor C6 is connected with the tie point of resistance R10 and diode D2, and it is born
Pole ground connection；One end of resistance R11 is connected with NAND gate IC1 negative input, its other end and power
The electrode input end of amplifier P3 is connected；The negative pole that resistance R12 is then serially connected in power amplifier P3 is defeated
Enter between end and output.
One end of resistance R13 is connected with NAND gate IC1 output, and its other end is born with NAND gate IC3
Pole input is connected；Meanwhile, the positive pole of electric capacity C7 is connected with NAND gate IC2 output, its negative pole
Also it is connected with NAND gate IC3 negative input.One end of described resistance R14 is with polar capacitor C6 just
Pole is connected, and its other end is connected with NAND gate IC2 negative input.
Described NAND gate IC1 electrode input end is connected with the negative input of power amplifier P3, and it is defeated
Go out end to be connected with NAND gate IC2 electrode input end, NAND gate IC3 electrode input end and power amplifier
The output of P3 is connected, and its output is connected with one end of photo resistance CDS；Described polar capacitor
The positive pole of C5 is connected with the tie point of the positive pole of polar capacitor C10 with the negative pole of dc source S.
Temperature-compensation circuit power back-off when ambient temperature changes, it is by triode Q3, and three
Pole pipe Q4, power amplifier P1, be serially connected in the colelctor electrode of triode Q3 and the colelctor electrode of triode Q2
Between resistance R4, be serially connected in the electric capacity C2 between electrode input end and the output of power amplifier P1,
It is serially connected in the electric capacity C3 between negative input and the output of power amplifier P1, negative pole and triode
The electric capacity C4 that the emitter stage of Q4 is connected, positive pole is connected with the colelctor electrode of triode Q5, and with electricity
Hold the resistance R6 composition that C4 is in parallel.
The electrode input end of power amplifier P1 is connected with the colelctor electrode of triode Q4, and its negative pole inputs
End is connected with the emitter stage of triode Q3.Meanwhile, the colelctor electrode of triode Q4 also with triode Q2
Colelctor electrode be connected, and its base earth.The output of power amplifier P1 and voltage comparator U and
The tie point of resistance R7 is connected, and the other end of resistance R9 then emitter stage with triode Q4 is connected,
The i.e. emitter stage of triode Q4 electrode input end with power amplifier P2 after resistance R9 is connected, and
The output of power amplifier P1 then after voltage comparator U with the negative input of power amplifier P2
It is connected.
As it has been described above, just can preferably realize the present invention.
Claims (5)
1. a buffered-display driver high efficiency charge pump stabilized voltage supply device, by dc source S, with direct current
The control circuit that power supply S-phase connects, the temperature-compensation circuit being connected with control circuit, and mend with temperature
Repay the photo resistance CDS that circuit is connected, and be serially connected between dc source S and photo resistance CDS
Beam excitation formula logic amplifying circuit composition, it is characterised in that in temperature-compensation circuit and photo resistance
Mu balanced circuit it is additionally provided with between CDS；Meanwhile, between dc source S and mu balanced circuit, it is provided with three linear
Buffering drive circuit；Described mu balanced circuit by power amplifier P2, one end is connected with temperature-compensation circuit,
The voltage comparator U that the other end is connected with the negative input of power amplifier P2, base stage is put with power
The output of big device P2 is connected, emitter stage is connected with three linear buffer drive circuits after resistance R8
Triode Q5, one end is connected with the electrode input end of power amplifier P2, the other end and temperature-compensating
The resistance R9 that circuit is connected, and be serially connected between the colelctor electrode of voltage comparator U and triode Q5
Resistance R7 composition；Described three linear buffer drive circuits are by integrated package U2, FET MOS, three
Pole pipe Q7, triode Q6, negative pole is connected with the colelctor electrode of triode Q7, positive pole sequentially through resistance R19,
The polar capacitor C9 being connected with the source electrode of FET MOS after polar capacitor C11, resistance R17,
Positive pole emitter stage with triode Q7 after resistance R21 is connected, the CS pin of negative pole and integrated package U2
The polar capacitor C8 being connected, positive pole DIM pin with integrated package U2 after inductance L2 is connected, negative
The polar capacitor C10 that pole is connected with the HYS pin of integrated package U2 after resistance R20, one end and resistance
R19 is connected with the tie point of polar capacitor C11, the other end after inductance L1 with the base of triode Q7
The resistance R18 that pole is connected, positive pole is connected with the colelctor electrode of triode Q6, negative pole is after resistance R16
Polar capacitor C12, P pole ground connection, N pole and the FET being connected with the LIM pin of integrated package U2
The diode D3 that the drain electrode of MOS is connected, and one end is connected with the base stage of triode Q6, another
The resistance R15 composition that end is connected with the SNS pin of integrated package U2；The HG pin of described integrated package U2 with
The grid of FET MOS is connected, its GND pin ground connection, and its IN pin and inductance L1 are with electric
The tie point of resistance R18 is connected；The positive pole of described polar capacitor C10 is connected with the negative pole of dc source S
Connect；The emitter stage of described triode Q6 emitter stage with triode Q5 after resistance R8 is connected；Institute
The driving integrated package that the integrated package U2 stated uses model to be LM3401.
A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device the most according to claim 1,
It is characterized in that, described beam excitation formula logic amplifying circuit, mainly by power amplifier P3, NAND gate
IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P3,
Positive pole is the polar capacitor C5 of ground connection after optical diode D1, one end is connected with the positive pole of polar capacitor C5,
The other end is the resistance R10 of ground connection after diode D2, positive pole and resistance R10 and the connection of diode D2
Point is connected, the polar capacitor C6 of minus earth, one end is connected with the negative input of NAND gate IC1,
The resistance R11 that the other end is connected with the electrode input end of power amplifier P3, is serially connected in power amplifier
Resistance R12 between negative input and the output of P3, one end is connected with the output of NAND gate IC1
Connect, resistance R13 that the other end is connected with the negative input of NAND gate IC3, positive pole and NAND gate IC2
Output is connected, negative pole is connected with the negative input of NAND gate IC3 electric capacity C7, Yi Jiyi
End is connected with the positive pole of polar capacitor C6, the other end is connected with the negative input of NAND gate IC2
Resistance R14 forms；The electrode input end of described NAND gate IC1 and the negative input of power amplifier P3
Being connected, its output is connected with the electrode input end of NAND gate IC2；The positive pole input of NAND gate IC3
End is connected with the output of power amplifier P3, and its output is connected with one end of photo resistance CDS；
The positive pole of described polar capacitor C5 and the negative pole of dc source S and the tie point of the positive pole of polar capacitor C10
It is connected；One end of described photo resistance CDS is connected with the colelctor electrode of triode Q5, its other end
Ground connection.
A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device the most according to claim 2,
It is characterized in that, described control circuit, by triode Q1, triode Q2, is serially connected in the collection of triode Q1
Resistance R1 between the colelctor electrode of electrode and triode Q2, is serially connected in emitter stage and the direct current of triode Q1
RC filter circuit between the negative pole of power supply S, is serially connected in the base stage of triode Q1 with dc source S's
Resistance R2 between negative pole, and the resistance R5 composition in parallel with dc source S-phase；Described triode
The emitter stage of Q2 is connected with the positive pole of dc source S, and the base stage of triode Q2 also with triode Q1
Colelctor electrode be connected.
A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device the most according to claim 3,
It is characterized in that, described temperature-compensation circuit by triode Q3, triode Q4, power amplifier P1,
The resistance R4 being serially connected between the colelctor electrode of triode Q3 and the colelctor electrode of triode Q2, is serially connected in power
Electric capacity C2 between electrode input end and the output of amplifier P1, is serially connected in the negative of power amplifier P1
Electric capacity C3 between pole input and output, negative pole is connected with the emitter stage of triode Q4, positive pole
The electric capacity C4 being connected with the colelctor electrode of triode Q5, and the resistance R6 group being in parallel with electric capacity C4
Become；The electrode input end of described power amplifier P1 is connected with the colelctor electrode of triode Q4, its negative pole
Input is connected with the emitter stage of triode Q3；The colelctor electrode of described triode Q4 and triode Q2
Colelctor electrode be connected, its base earth；The base stage of triode Q3 is connected with the positive pole of dc source S,
The tie point of described voltage comparator U and resistance R7 is connected with the output of power amplifier P1, and
The emitter stage of triode Q4 then after resistance R9 electrode input end with power amplifier P2 be connected.
A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device the most according to claim 4,
It is characterized in that, described RC filtered electrical routing resistance R3, and the electric capacity C1 being in parallel with resistance R3
Composition.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510316901.6A CN104965554B (en) | 2014-11-25 | 2015-06-11 | A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device |
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| CN2014106876955 | 2014-11-25 | ||
| CN201410687695.5A CN104460800A (en) | 2014-11-25 | 2014-11-25 | Temperature compensation type logic amplification and voltage stabilization power supply device |
| CN201510316901.6A CN104965554B (en) | 2014-11-25 | 2015-06-11 | A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device |
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| CN104965554A CN104965554A (en) | 2015-10-07 |
| CN104965554B true CN104965554B (en) | 2016-08-24 |
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| CN201510316901.6A Expired - Fee Related CN104965554B (en) | 2014-11-25 | 2015-06-11 | A kind of buffered-display driver high efficiency charge pump stabilized voltage supply device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101237186A (en) * | 2007-01-29 | 2008-08-06 | 安葳科技股份有限公司 | Framework for efficient charge pump regulator |
| CN101763130A (en) * | 2009-12-11 | 2010-06-30 | 康佳集团股份有限公司 | Voltage-stabilizing circuit with temperature compensation |
| CN103631294A (en) * | 2013-11-28 | 2014-03-12 | 中国科学院微电子研究所 | Automatic power supply voltage adjusting device and method |
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| Publication number | Publication date |
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| CN104965554A (en) | 2015-10-07 |
| CN104460800A (en) | 2015-03-25 |
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