Summary of the invention
The object of the invention is to overcome the impact that current bipolar power supply is easily subject to ambient temperature, and then and carry out after power drive amplification through traditional power amplification circuit, the attenuation amplitude of its amplifying signal is larger, but also outside electromagnetic interference (EMI) can be subject to, and then make amplifying signal performance comparatively unstable, make the defect that its power supply performance is extremely unstable, a kind of buffered-display driver high efficiency charge pump stabilized voltage supply device is provided.
Object of the present invention is achieved through the following technical solutions: a kind of buffered-display driver high efficiency charge pump stabilized voltage supply device, by direct supply S, the control circuit be connected with direct supply S-phase, the temperature-compensation circuit be connected with control circuit, and the photoresistance CDS to be connected with temperature-compensation circuit, and the beam excitation formula logic amplifying circuit be serially connected between direct supply S and photoresistance CDS forms, meanwhile, between temperature-compensation circuit and photoresistance CDS, be also provided with mu balanced circuit, and the three linear buffer driving circuits be arranged between direct supply S and mu balanced circuit, described mu balanced circuit is by power amplifier P2, the voltage comparator U that one end is connected with temperature-compensation circuit, the other end is connected with the negative input of power amplifier P2, the triode Q5 that base stage is connected with the output terminal of power amplifier P2, emitter is connected with three linear buffer driving circuits after resistance R8, the resistance R9 that one end is connected with the electrode input end of power amplifier P2, the other end is connected with temperature-compensation circuit, and the resistance R7 between the collector being serially connected in voltage comparator U and triode Q5 forms, described three linear buffer driving circuits are by integrated package U2, field effect transistor MOS, triode Q7, triode Q6, negative pole is connected with the collector of triode Q7, positive pole is in turn through resistance R19, polar capacitor C11, the polar capacitor C9 be connected with the source electrode of field effect transistor MOS after resistance R17, positive pole is connected with the emitter of triode Q7 after resistance R21, the polar capacitor C8 that negative pole is connected with the CS pin of integrated package U2, positive pole is connected with the DIM pin of integrated package U2 after inductance L 2, the polar capacitor C10 that negative pole is connected with the HYS pin of integrated package U2 after resistance R20, one end is connected with the tie point of polar capacitor C11 with resistance R19, the resistance R18 that the other end is connected with the base stage of triode Q7 after inductance L 1, positive pole is connected with the collector of triode Q6, the polar capacitor C12 that negative pole is connected with the LIM pin of integrated package U2 after resistance R16, P pole ground connection, the diode D3 that N pole is connected with the drain electrode of field effect transistor MOS and one end are connected with the base stage of triode Q6, the resistance R15 that the other end is connected with the SNS pin of integrated package U2 forms, the HG pin of described integrated package U2 is connected with the grid of field effect transistor MOS, its GND pin ground connection, and its IN pin is connected with the tie point of inductance L 1 with resistance R18, the positive pole of described polar capacitor C10 is connected with the negative pole of direct supply S, the emitter of described triode Q6 is connected with the emitter of triode Q5 after resistance R8.
Described beam excitation formula logic amplifying circuit, primarily of power amplifier P3, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, negative pole is connected with the electrode input end of power amplifier P3, the polar capacitor C5 of positive pole ground connection after optical diode D1, one end is connected with the positive pole of polar capacitor C5, the resistance R10 of other end ground connection after diode D2, positive pole is connected with the tie point of diode D2 with resistance R10, the polar capacitor C6 of minus earth, one end is connected with the negative input of Sheffer stroke gate IC1, the resistance R11 that the other end is connected with the electrode input end of power amplifier P3, be serially connected in the resistance R12 between the negative input of power amplifier P3 and output terminal, one end is connected with the output terminal of Sheffer stroke gate IC1, the resistance R13 that the other end is connected with the negative input of Sheffer stroke gate IC3, positive pole is connected with the output terminal of Sheffer stroke gate IC2, the electric capacity C7 that negative pole is connected with the negative input of Sheffer stroke gate IC3, and one end is connected with the positive pole of polar capacitor C6, the resistance R14 that the other end is connected with the negative input of Sheffer stroke gate IC2 forms, the electrode input end of described Sheffer stroke gate IC1 is connected with the negative input of power amplifier P3, and the electrode input end of its output terminal Sheffer stroke gate IC2 is connected, the electrode input end of Sheffer stroke gate IC3 is connected with the output terminal of power amplifier P3, and its output terminal is connected with one end of photoresistance CDS, the positive pole of described polar capacitor C5 is connected with the tie point of the positive pole of polar capacitor C10 with the negative pole of direct supply S, one end of described photoresistance CDS is connected with the collector of triode Q5, its other end ground connection.
Further, described control circuit is by triode Q1, triode Q2, be serially connected in the resistance R1 between the collector of triode Q1 and the collector of triode Q2, be serially connected in the RC filtering circuit between the emitter of triode Q1 and the negative pole of direct supply S, be serially connected in the resistance R2 between the base stage of triode Q1 and the negative pole of direct supply S, and the resistance R5 in parallel with direct supply S-phase forms; The emitter of described triode Q2 is connected with the positive pole of direct supply S, and the base stage of triode Q2 is also connected with the collector of triode Q1.
Described temperature-compensation circuit is by triode Q3, triode Q4, power amplifier P1, be serially connected in the resistance R4 between the collector of triode Q3 and the collector of triode Q2, be serially connected in the electric capacity C2 between the electrode input end of power amplifier P1 and output terminal, be serially connected in the electric capacity C3 between the negative input of power amplifier P1 and output terminal, the electric capacity C4 that negative pole is connected with the emitter of triode Q4, positive pole is connected with the collector of triode Q5, and form with the resistance R6 that electric capacity C4 is in parallel; The electrode input end of described power amplifier P1 is connected with the collector of triode Q4, and its negative input is connected with the emitter of triode Q3; The collector of described triode Q4 is connected with the collector of triode Q2, its base earth; The base stage of triode Q3 is connected with the positive pole of direct supply S, described voltage comparator U is connected with the output terminal of power amplifier P1 with the tie point of resistance R7, and the emitter of triode Q4 is then connected with the electrode input end of power amplifier P2 after resistance R9.
Described RC filtered electrical routing resistance R3, and form with the electric capacity C1 that resistance R3 is in parallel.
Described integrated package U2 employing model is the driving integrated package of LM3401.
(1) one-piece construction of the present invention is simple, and it makes and very easy to use.
(2) the present invention can adjust output current value automatically according to the temperature variation of external environment condition, and larger decay can not be there is in the signal after power amplification circuit amplifies, thus the quality and performance of amplifying signal can be guaranteed, really make its performance more stable, and effectively reduce circuit self and extraneous Radio frequency interference (RFI).
(3) the present invention adopts three linear buffer driving circuits to have step-down, voltage stabilizing, programmable current restriction, overcurrent protection.
(4) the present invention is provided with mu balanced circuit, can not only guarantee the stable of output voltage, and its with temperature-compensation circuit with the use of rear, temperature compensation coefficient can be improved significantly, and then guarantee stablizing of duty.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
As shown in Figure 1, temperature compensation stabilized voltage supply of the present invention is primarily of direct supply S, the control circuit be connected with direct supply S-phase, the temperature-compensation circuit be connected with control circuit, the photoresistance CDS be connected with temperature-compensation circuit, be serially connected in the beam excitation formula logic amplifying circuit between direct supply S and photoresistance CDS, simultaneously, be arranged on the mu balanced circuit between temperature-compensation circuit and photoresistance CDS, and the three linear buffer driving circuits be arranged between direct supply S and mu balanced circuit form.
Wherein, this mu balanced circuit is by power amplifier P2, and voltage comparator U, resistance R8, triode Q5 and resistance R7 and resistance R9 form.During connection, one end of voltage comparator U is connected with temperature-compensation circuit, and its other end is connected with the negative input of power amplifier P2.The base stage of triode Q5 is connected with the output terminal of power amplifier P2, and its emitter is ground connection after resistance R8; One end of resistance R9 is connected with the electrode input end of power amplifier P2, and its other end is connected with temperature-compensation circuit; Resistance R7 is then serially connected between the collector of voltage comparator U and triode Q5.One end of described photoresistance CDS is connected with the collector of triode Q5, its other end ground connection.
Described three linear buffer driving circuits by integrated package U2, field effect transistor MOS, triode Q7, triode Q6, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, polar capacitor C8, polar capacitor C9, polar capacitor C10, polar capacitor C11, polar capacitor C12, and diode D3 forms.
During connection, the negative pole of polar capacitor C9 is connected with the collector of triode Q7, positive pole is connected with the source electrode of field effect transistor MOS in turn after resistance R19, polar capacitor C11, resistance R17.The positive pole of polar capacitor C8 is connected with the emitter of triode Q7 after resistance R21, negative pole is connected with the CS pin of integrated package U2.The positive pole of polar capacitor C10 is connected with the DIM pin of integrated package U2 after inductance L 2, negative pole is connected with the HYS pin of integrated package U2 after resistance R20.
One end of resistance R18 is connected with the tie point of polar capacitor C11 with resistance R19, the other end is connected with the base stage of triode Q7 after inductance L 1.The positive pole of polar capacitor C12 is connected with the collector of triode Q6, negative pole is connected with the LIM pin of integrated package U2 after resistance R16.The P pole ground connection of diode D3, N pole are connected with the drain electrode of field effect transistor MOS.And one end of resistance R15 is connected with the base stage of triode Q6, the other end is connected with the SNS pin of integrated package U2.
During use, described integrated package U2 employing model is the driving integrated package of LM3401, and it adopts MSOP-8 to encapsulate; It is the controllable current source that a kind of buck regulator derives, and by controlling external MOS2 field effect transistor switch pipe, output current can up to 4A.Its input supply voltage scope is 4.5 ~ 35V, and during work, electric current is 1.05mA, and reference voltage is 200mV, maximum operation frequency 3MHz.
During connection, the HG pin of integrated package U2 is connected with the grid of field effect transistor MOS, its GND pin ground connection, and its IN pin is connected with the tie point of inductance L 1 with resistance R18; The positive pole of described polar capacitor C10 is connected with the negative pole of direct supply S; The emitter of described triode Q6 is connected with the emitter of triode Q5 after resistance R8.
Described control circuit is by triode Q1, and triode Q2, resistance R1, resistance R2, resistance R5 and RC filtering circuit form.During connection, resistance R1 is serially connected between the collector of triode Q1 and the collector of triode Q2, and RC filtering circuit is then serially connected between the emitter of triode Q1 and the negative pole of direct supply S.Resistance R2 is serially connected between the base stage of triode Q1 and the negative pole of direct supply S, and resistance R5 is then in parallel with direct supply S-phase.
Meanwhile, the emitter of triode Q2 is connected with the positive pole of direct supply S, and its base stage is also connected with the collector of triode Q1.For guaranteeing operational effect, the resistance of resistance R1, resistance R2, resistance R3 and resistance R5 is 10K Ω.RC filtered electrical routing resistance R3 in the application, and form with the electric capacity C1 that resistance R3 is in parallel.
Described beam excitation formula logic amplifying circuit, primarily of power amplifier P3, Sheffer stroke gate IC5, Sheffer stroke gate IC1 Sheffer stroke gate IC2 polar capacitor C5, polar capacitor C6, optical diode D1, diode D2, resistance R10 resistance R11, resistance R12, resistance R13, and resistance R14 forms.
During connection, the electrode input end of described power amplifier P3 is connected with the negative pole of direct supply S; The positive pole of polar capacitor C5 is connected with the N pole of optical diode D1 simultaneously, the P3 pole then ground connection of optical diode D1; Resistance R10 one end is connected with the positive pole of polar capacitor C5, and its other end is ground connection after diode D2.
The positive pole of described polar capacitor C6 is connected with the tie point of diode D2 with resistance R1, its minus earth; One end of resistance R11 is connected with Sheffer stroke gate IC1 negative input, and its other end is connected with the electrode input end of power amplifier P3; Between the negative input that resistance R12 is then serially connected in power amplifier P3 and output terminal.
One end of resistance R13 is connected with Sheffer stroke gate IC1 output terminal, and its other end is connected with Sheffer stroke gate IC3 negative input; Meanwhile, the positive pole of electric capacity C7 is connected with Sheffer stroke gate IC2 output terminal, and its negative pole is also connected with Sheffer stroke gate IC3 negative input.One end of described resistance R14 is connected with the positive pole of polar capacitor C6, and its other end is connected with Sheffer stroke gate IC2 negative input.
Described Sheffer stroke gate IC1 electrode input end is connected with the negative input of power amplifier P3, its output terminal is connected with Sheffer stroke gate IC2 electrode input end, Sheffer stroke gate IC3 electrode input end is connected with the output terminal of power amplifier P3, and its output terminal is connected with one end of photoresistance CDS; The positive pole of described polar capacitor C5 is connected with the tie point of the positive pole of polar capacitor C10 with the negative pole of direct supply S.
Temperature-compensation circuit is used for power back-off during ambient temperature change, it is by triode Q3, triode Q4, power amplifier P1, be serially connected in the resistance R4 between the collector of triode Q3 and the collector of triode Q2, be serially connected in the electric capacity C2 between the electrode input end of power amplifier P1 and output terminal, be serially connected in the electric capacity C3 between the negative input of power amplifier P1 and output terminal, the electric capacity C4 that negative pole is connected with the emitter of triode Q4, positive pole is connected with the collector of triode Q5, and form with the resistance R6 that electric capacity C4 is in parallel.
The electrode input end of power amplifier P1 is connected with the collector of triode Q4, and its negative input is connected with the emitter of triode Q3.Meanwhile, the collector of triode Q4 is also connected with the collector of triode Q2, and its base earth.The output terminal of power amplifier P1 is connected with the tie point of resistance R7 with voltage comparator U, the other end of resistance R9 is then connected with the emitter of triode Q4, namely the emitter of triode Q4 is connected with the electrode input end of power amplifier P2 after resistance R9, and the output terminal of power amplifier P1 is then connected with the negative input of power amplifier P2 after voltage comparator U.
As mentioned above, just the present invention can be realized preferably.