Summary of the invention
It is an object of the invention to the impact overcoming current bipolar power supply to be easily subject to ambient temperature, enter
And causing the defect of unstable properties, it is provided that a kind of three linear buffer drive-types amplify supply unit.
The purpose of the present invention is achieved through the following technical solutions: a kind of three linear buffer drive-types amplify power supply dress
Put, by DC source S, the control circuit being connected with DC source S-phase, the temperature being connected with control circuit
Degree compensates circuit, and the photoconductive resistance CDS being connected with temperature-compensation circuit, is serially connected in DC source S
And the beam excitation formula logic amplifying circuit composition between photoconductive resistance CDS;It is characterized in that, at direct current
Three linear buffer drive circuits also it are serially connected with between power supply S and photoconductive resistance CDS;Described three linear buffers
Drive circuit is by integrated package U1, field effect transistor MOS, audion Q5, audion Q6, negative pole and three poles
The colelctor electrode of pipe Q5 is connected, positive pole sequentially after resistance R17, polar capacitor C11, resistance R15 with
The polar capacitor C9 that the source electrode of field effect transistor MOS is connected, positive pole after resistance R19 with audion Q5
The polar capacitor C8 that emitter stage is connected, negative pole is connected with the CS foot of integrated package U1, positive pole is through electricity
Sense L2 after be connected with the DIM foot of integrated package U1, negative pole after resistance R18 with integrated package U1's
The polar capacitor C10 that HYS foot is connected, the junction point phase of one end and resistance R17 Yu polar capacitor C11
Connect, resistance R16 that other end base stage with audion Q5 after inductance L1 is connected, positive pole and three
The colelctor electrode of pole pipe Q6 is connected, negative pole is connected with the LIM foot of integrated package U1 after resistance R14
The diode D3 that polar capacitor C12, P pole ground connection, N pole are connected with the drain electrode of field effect transistor MOS,
And one end is connected with the base stage of audion Q6, the other end is connected with the SNS foot of integrated package U1
Resistance R13 forms;The HG foot of described integrated package U1 is connected with the grid of field effect transistor MOS, its
GND foot ground connection, and its IN foot is connected with the junction point of inductance L1 with resistance R16;Described polarity
The positive pole of electric capacity C10 is connected with the negative pole of DC source S;The emitter stage of described audion Q6 is with photosensitive
One end of resistance CDS is connected.
Described beam excitation formula logic amplifying circuit, mainly by power amplifier P2, NAND gate IC1, with
Not gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P2, positive pole is through light
The polar capacitor C5 of ground connection after diode D1, one end is connected with the positive pole of polar capacitor C5, the other end
The resistance R8 of ground connection after diode D2, positive pole is connected with the junction point of resistance R8 and diode D2,
The polar capacitor C6 of minus earth, one end is connected with the negative input of NAND gate IC1, the other end with
The resistance R9 that the electrode input end of power amplifier P2 is connected, is serially connected in the negative pole of power amplifier P2
Resistance R10 between input and outfan, one end is connected with the outfan of NAND gate IC1, the other end
The resistance R11 being connected with the negative input of NAND gate IC3, the outfan phase of positive pole and NAND gate IC2
The electric capacity C7 that connection, negative pole are connected with the negative input of NAND gate IC3, and one end is electric with polarity
Hold the resistance R12 group that positive pole is connected, the other end is connected of C6 with the negative input of NAND gate IC2
Become;The electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P2, its
The electrode input end of outfan NAND gate IC2 is connected;The electrode input end of NAND gate IC3 and power amplification
The outfan of device P2 is connected, one end of its outfan and photoconductive resistance CDS and the transmitting of audion Q6
The junction point of pole is connected;The electrode input end of described power amplifier P2 and the negative pole phase of DC source S
Connect;Described control circuit by audion Q1, audion Q2, be serially connected in the colelctor electrode of audion Q1 with
Resistance R1 between the colelctor electrode of audion Q2, is serially connected in emitter stage and the DC source S of audion Q1
Negative pole between RC filter circuit, be serially connected in the base stage of audion Q1 and DC source S negative pole it
Between resistance R2, and resistance R5 in parallel with DC source S-phase composition;Described audion Q2 sends out
Emitter-base bandgap grading is connected with the positive pole of DC source S, and the base stage of audion Q2 also with the current collection of audion Q1
Pole is connected;The N pole of described optical diode D1 and the negative pole of DC source S are with polar capacitor C10's
The junction point of positive pole is connected.
Further, described temperature-compensation circuit by audion Q3, audion Q4, power amplifier P1,
The resistance R4 being serially connected between the colelctor electrode of audion Q3 and the colelctor electrode of audion Q2, is serially connected in power
Electric capacity C2 between electrode input end and the outfan of amplifier P1, is serially connected in the negative of power amplifier P1
Electric capacity C3 between pole input and outfan, negative pole is connected with the emitter stage of audion Q4, positive pole
The electric capacity C4 of ground connection after photoconductive resistance CDS, the resistance R6 being in parallel with electric capacity C4, and one end with
The outfan of power amplifier P1 is connected, the other end forms through the resistance R7 of photoconductive resistance CDS ground connection;
The electrode input end of described power amplifier P1 is connected with the colelctor electrode of audion Q4, and its negative pole inputs
End is connected with the emitter stage of audion Q3;The colelctor electrode of described audion Q4 and the collection of audion Q2
Electrode is connected, its base earth;The base stage of audion Q3 is connected with the positive pole of DC source S.
Described RC filtered electrical routing resistance R3, and the electric capacity C1 composition being in parallel with resistance R3.
Described electric capacity C2, electric capacity C3 and electric capacity C4 are polar capacitor.
The driving integrated package that described integrated package U1 uses model to be LM3402.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) overall structure of the present invention is simple, and it makes and very easy to use.
(2) present invention use three linear buffer drive circuits have blood pressure lowering, voltage stabilizing, programmable current limit,
Overcurrent protection.
(3) present invention can adjust output current value, Er Qiejing automatically according to the variations in temperature of external environment condition
Signal after power amplification circuit amplifies will not occur bigger decay, it is thus possible to guarantee to amplify the quality of signal
And performance, really make its performance more stable, and effectively reduce circuit self and extraneous Radio frequency interference..
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but the enforcement of the present invention
Mode is not limited to this.
As it is shown in figure 1, temp. compensation type power supply of the present invention is mainly by DC source S, by direct current
Power supply S, the control circuit being connected with DC source S-phase, the temperature-compensation circuit being connected with control circuit,
And the photoconductive resistance CDS being connected with temperature-compensation circuit, it is serially connected in DC source S and photoconductive resistance
Beam excitation formula logic amplifying circuit between CDS, meanwhile, at DC source S and photoconductive resistance CDS
Between be also serially connected with three linear buffer drive circuits composition.
Wherein, control circuit is by audion Q1, audion Q2, resistance R1, resistance R2, resistance R5
And RC filter circuit composition.During connection, resistance R1 is serially connected in colelctor electrode and three poles of audion Q1
Between the colelctor electrode of pipe Q2, RC filter circuit is then serially connected in emitter stage and the unidirectional current of audion Q1
Between the negative pole of source S.Resistance R2 is serially connected between the base stage of audion Q1 and the negative pole of DC source S
, resistance R5 is then in parallel with DC source S-phase.
Meanwhile, the emitter stage of audion Q2 is connected with the positive pole of DC source S, its base stage also with three poles
The colelctor electrode of pipe Q1 is connected.For guaranteeing operational effect, resistance R1, resistance R2, resistance R3 and electricity
The resistance of resistance R5 is 10K Ω.RC filtered electrical routing resistance R3 in the application, and and resistance
The electric capacity C1 composition that R3 is in parallel.
Described three linear buffer drive circuits by integrated package U1, field effect transistor MOS, audion Q5, three
Pole pipe Q6, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18,
Resistance R19, polar capacitor C8, polar capacitor C9, polar capacitor C10, polar capacitor C11, polarity
Electric capacity C12, and diode D3 composition.
For guaranteeing using effect, resistance R19 uses current setting resistor, and its resistance value is 25K Ω;Electricity
Resistance R14 uses current-limiting resistor.
During connection, the negative pole of polar capacitor C9 is connected with the colelctor electrode of audion Q5, positive pole sequentially warp
It is connected with the source electrode of field effect transistor MOS after resistance R17, polar capacitor C11, resistance R15.Polarity
The positive pole of electric capacity C8 emitter stage with audion Q5 after resistance R19 is connected, negative pole and integrated package U1
CS foot be connected.The positive pole of polar capacitor C10 after inductance L2 with the DIM foot phase of integrated package U1
Connect, negative pole HYS foot with integrated package U1 after resistance R18 is connected.One end of resistance R16 with
Resistance R17 is connected with the junction point of polar capacitor C11, the other end after inductance L1 with audion Q5
Base stage be connected.The positive pole of polar capacitor C12 is connected with the colelctor electrode of audion Q6, negative pole is through electricity
It is connected with the LIM foot of integrated package U1 after resistance R14.The P pole ground connection of diode D3, N pole are imitated with field
Should the drain electrode of pipe MOS be connected.And one end of resistance R13 is connected with the base stage of audion Q6,
The other end is connected with the SNS foot of integrated package U1.
During use, the driving integrated package that described integrated package U1 uses model to be LM3402, it uses
MSOP-9 encapsulates;It is the controllable current source that a kind of buck regulator is derivative, by controlling external MOS
Field effect transistor switch pipe, output electric current may be up to 6A.Its input supply voltage scope is 4.5~35V, work
Time electric current be 2.05mA, reference voltage is 400mV, maximum operation frequency 5MHz.
The HG foot of described integrated package U1 is connected with the grid of field effect transistor MOS, its GND foot ground connection,
And its IN foot is connected with the junction point of inductance L1 with resistance R16;Described polar capacitor C10 is just
Pole is connected with the negative pole of DC source S;The emitter stage of described audion Q6 is with photoconductive resistance CDS's
One end is connected.
Described beam excitation formula logic amplifying circuit, mainly by power amplifier P2, NAND gate IC5, with
Not gate IC1 NAND gate IC2 polar capacitor C5, polar capacitor C6, optical diode D1, diode D2,
Resistance R8 resistance R9, resistance R10, resistance R11, and resistance R12 form.
During connection, the electrode input end of described power amplifier P2 is connected with the negative pole of DC source S;
The positive pole of polar capacitor C5 is connected with the N pole of optical diode D1 simultaneously, and the P2 of optical diode D1
Pole then ground connection;Resistance R8 one end is connected with the positive pole of polar capacitor C5, and its other end is through diode D2
Rear ground connection.
The positive pole of described polar capacitor C6 is connected with the junction point of resistance R1 and diode D2, its negative pole
Ground connection;One end of resistance R9 is connected with NAND gate IC1 negative input, its other end and power amplification
The electrode input end of device P2 is connected;Resistance R10 is then serially connected in the negative input of power amplifier P2
And between outfan.
One end of resistance R11 is connected with NAND gate IC1 outfan, and its other end is born with NAND gate IC3
Pole input is connected;Meanwhile, the positive pole of electric capacity C7 is connected with NAND gate IC2 outfan, its negative pole
Also it is connected with NAND gate IC3 negative input.One end of described resistance R12 is with polar capacitor C6 just
Pole is connected, and its other end is connected with NAND gate IC2 negative input.
Described NAND gate IC1 electrode input end is connected with the negative input of power amplifier P2, and it is defeated
Go out end to be connected with NAND gate IC2 electrode input end, NAND gate IC3 electrode input end and power amplifier
The outfan of P2 is connected, the outfan of IC3 and one end of photoconductive resistance CDS and sending out of audion Q6
The junction point of emitter-base bandgap grading is connected.
The positive pole of the N pole of described optical diode D1 and the negative pole of DC source S and polar capacitor C10
Junction point is connected.
Temperature-compensation circuit power back-off when ambient temperature changes, it is by audion Q3, and three
Pole pipe Q4, power amplifier P1, be serially connected in the colelctor electrode of audion Q3 and the colelctor electrode of audion Q2
Between resistance R4, be serially connected in the electric capacity C2 between electrode input end and the outfan of power amplifier P1,
It is serially connected in the electric capacity C3 between negative input and the outfan of power amplifier P1, negative pole and audion
The emitter stage of Q4 is connected, positive pole electric capacity C4 of ground connection after photoconductive resistance CDS, with electric capacity C4 phase also
The resistance R6 of connection, and one end is connected with the outfan of power amplifier P1, the other end is through photoconductive resistance
The resistance R7 composition of CDS ground connection.
The electrode input end of power amplifier P1 is connected with the colelctor electrode of audion Q4, and its negative pole inputs
End is connected with the emitter stage of audion Q3.Meanwhile, the colelctor electrode of audion Q4 also with audion Q2
Colelctor electrode be connected, and its base earth.
For guaranteeing using effect, described electric capacity C2, electric capacity C3 and electric capacity C4 the most preferentially uses polarity electricity
Hold and realize.
As it has been described above, just can preferably realize the present invention.