CN105007048A - Novel switch power amplification type field intensity detection system - Google Patents

Novel switch power amplification type field intensity detection system Download PDF

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Publication number
CN105007048A
CN105007048A CN201510317793.4A CN201510317793A CN105007048A CN 105007048 A CN105007048 A CN 105007048A CN 201510317793 A CN201510317793 A CN 201510317793A CN 105007048 A CN105007048 A CN 105007048A
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resistance
power amplifier
triode
output
electric capacity
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雷明方
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Chengdu Jiesheng Technology Co Ltd
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Chengdu Jiesheng Technology Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a novel switch power amplification type field intensity detection system. The system comprises a light beam excitation logic amplification circuit, a power amplifier P1, a power amplifier P2, a power amplifier P3, a triode Q1, a triode Q2 and so on. A base electrode of the triode Q1 is connected with an output end of the power amplifier P1, and a collector electrode of the triode Q1 is connected with a positive electrode input end of the power amplifier P3 through a resistor R3. A base electrode of the triode Q2 is connected with an emitting electrode of the triode Q1, and a collector electrode of the triode Q2 is connected with a negative electrode input end of the power amplifier P3 through a resistor R4. The system is characterized in that an amplification type field intensity detection circuit is also connected in series between the light beam excitation logic amplification circuit and an output end of the power amplifier P3. The whole structure of the system is simple, and the system is easy to manufacture, popularize and use. The system can lower the attenuation amplitude of an amplification signal effectively, and can effectively improve the stability of circuit current of the amplification signal.

Description

A kind of novel switched power amplification formula field intensity detection system
Technical field
The present invention relates to a kind of amplifying circuit detection system, specifically refer to a kind of novel switched power amplification formula field intensity detection system.
Background technology
At present, power amplification testing circuit uses widely, and its Main Function according to demand relevant voltage signal, current signal and other pulse signals is carried out power amplification process.But, traditional power amplification testing circuit is after carrying out power drive amplification, not only the attenuation amplitude of its amplifying signal is comparatively large, circuital current extremely unstable, but also easily cause amplifying circuit temperature too high, thus cause power amplification testing circuit can be subject to outside electromagnetic interference, make its amplifying signal performance comparatively unstable, serious constrains using and promoting of its profound level.
Summary of the invention
The object of the invention is to overcome that signal attenuation amplitude after the amplification that current power amplification circuit exists is comparatively large, circuital current also extremely unstable thus cause the defect of the high and amplified signal unstable properties of circuit temperature, a kind of novel switched power amplification formula field intensity detection system is provided.
Object of the present invention is achieved through the following technical solutions: a kind of novel switched power amplification formula field intensity detection system, by beam excitation formula logic amplifying circuit, power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R1 between the output of power amplifier P1 and negative input and electric capacity C1, be serially connected in the resistance R2 between the output of power amplifier P2 and electrode input end and electric capacity C2, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R4, base stage is connected with the output of power amplifier P2 after resistance R6, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R5, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C4 of ground connection, the electric capacity C3 be in parallel with resistance R6, one end is connected with the base stage of triode Q3, the resistance R7 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R8 of the external-4V voltage of the other end, the electric capacity C5 be in parallel with resistance R8, and N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P forms.Meanwhile, between beam excitation formula logic amplifying circuit and the output of power amplifier P3, amplifying type field intensity testing circuit is also serially connected with, described amplifying type field intensity testing circuit is by integrated package U1, power amplifier P5, positive pole is connected with the DD pin of integrated package U1 after resistance R19, negative pole is in turn through resistance R20, resistance R23, diode D5, the polar capacitor C11 be connected with the COMP pin of integrated package U1 after resistance R21, N pole is connected with the negative input of power amplifier P5 after resistance R18, P pole is in turn through resistance R17, polar capacitor C10, resistance R16, resistance R14, resistance R15, the diode D4 be connected with the electrode input end of power amplifier P5 after electric capacity C9, base stage is connected with the SW pin of integrated package U1 after resistance R25, its emitter is in turn through resistance R22, resistance R24, be connected with the output of power amplifier P5 after resistance R27, the triode Q4 of its grounded collector, one end is connected with the tie point of resistance R24 with resistance R22, the resistance R26 that the other end is connected with the COMP pin of integrated package U1 forms, the SENSE pin of described integrated package U1 is connected with the tie point of resistance R17 with polar capacitor C10, its PWM pin is connected with the positive pole of polar capacitor C11, its ADJ pin is connected with the negative pole of polar capacitor C11, its IN pin and resistance R14 are connected with resistance R16 tie point and be connected with the output of amplifier P3 as input, its GND pin ground connection, the tie point ground connection of described resistance R20 and resistance R23, the tie point of described resistance R22 and resistance R24 is as output, the negative input of described power amplifier P1 is connected with the electrode input end of power amplifier P2.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R9 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R9, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R10 that the other end is connected with the electrode input end of power amplifier P4, be serially connected in the resistance R11 between the negative input of power amplifier P4 and output, one end is connected with the output of NAND gate IC1, the resistance R12 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R13 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P4, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P4, the positive pole of described polar capacitor C6 is connected with the tie point of resistance 22 with resistance R24, and the positive pole of polar capacitor C8 is connected with the emitter of triode Q3.
For guaranteeing result of use of the present invention, described electric capacity C1 and electric capacity C2 is patch capacitor; Described electric capacity C3, electric capacity C4 and electric capacity C5 are then electrochemical capacitor, and meanwhile, the resistance of described resistance R1, resistance R2 is 10K Ω, and the resistance of resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 is 20K Ω.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) overall structure of the present invention is comparatively simple, is convenient to make and apply.
(2) the present invention can effectively reduce the attenuation amplitude of amplifying signal, thus guarantees the performance of amplifying signal.
(3) the present invention can effectively reduce the interference of external electromagnetic environment, thus avoids amplifying signal to mix remaining electromagnetic wave, ensures the purity of amplifying signal.
(4) the present invention effectively can improve the stability of circuital current, thus the temperature effectively reducing circuit is beneficial to the stable performance of connected Circuits System.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is amplifying type field intensity testing circuit structural representation of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, the present invention is by amplifying type field intensity testing circuit, beam excitation formula logic amplifying circuit, power amplifier P1, power amplifier P2, power amplifier P3, triode Q1, triode Q2, triode Q3, be serially connected in the one-level RC filter circuit between the output of power amplifier P1 and negative input, be serially connected in the secondary RC filter circuit between the output of power amplifier P2 and electrode input end, and resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, electric capacity C3, electric capacity C4, electric capacity C5 and diode D1 form.
Wherein, described one-level RC filtered electrical routing resistance R1 and electric capacity C1 is formed in parallel, namely between resistance R1 and the electric capacity C1 negative input that is all serially connected in power amplifier P1 and output; Described secondary RC filter circuit is then formed in parallel by resistance R2 and electric capacity C2, namely between resistance R2 and the electric capacity C2 electrode input end that is all serially connected in power amplifier P2 and output.Meanwhile, the negative input of power amplifier P1 is also connected with the electrode input end of power amplifier P2.
The base stage of triode Q1 is connected with the output of power amplifier P1, and its collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, and its emitter is then connected with the base stage of triode Q2; The collector electrode of triode Q2 is connected with the negative input of power amplifier P3 after resistance R4, meanwhile, and the collector electrode also external+10V voltage of this triode Q2.
The base stage of triode Q3 is connected with the output of power amplifier P2 after resistance R6, and its collector electrode is then connected with the base stage of triode Q2 after resistance R5.Electric capacity C3 is then in parallel with resistance R6, and for guaranteeing effect, this electric capacity C3 preferentially adopts electrochemical capacitor to realize.During connection, the negative pole of electric capacity C3 is connected with the base stage of triode Q3, and its positive pole is then connected with the output of power amplifier P2.The positive pole of electric capacity C4 is connected with the negative input of power amplifier P3, and its negative pole is then connected with the emitter of triode Q2.Meanwhile, the negative pole of this electric capacity C4 and the equal ground connection of emitter of triode Q2.
One end of resistance R7 is connected with the base stage of triode Q3, the voltage of the external-4V of its other end; And one end of resistance R8 is connected with the emitter of triode Q3, the voltage of its other end then external equally-4V.Electric capacity C5 is then in parallel with resistance R8.Equally, described electric capacity C4 and electric capacity C5 also all adopts electrochemical capacitor to realize.The N pole of described diode D1 is connected with the collector electrode of triode Q1, and its P pole is at the voltage of external-4V.
As shown in Figure 2, it is by integrated package U1, power amplifier P5, resistance R14 for the structure of described amplifying type field intensity testing circuit, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, resistance R22, resistance R23, resistance R24, resistance R25, resistance R26, resistance R27, electric capacity C9, polar capacitor C10, polar capacitor C11, diode D4, diode D5, triode Q7 form.
During connection, the positive pole of polar capacitor C11 is connected with the DD pin of integrated package U1 after resistance R19, negative pole is connected with the COMP pin of integrated package U1 in turn after resistance R20, resistance R23, diode D5, resistance R21.The N pole of diode D4 is connected with the negative input of power amplifier P5 after resistance R18, P pole is connected with the electrode input end of power amplifier P5 in turn after resistance R17, polar capacitor C10, resistance R16, resistance R14, resistance R15, electric capacity C9.
The base stage of triode Q4 is connected with the SW pin of integrated package U1 after resistance R25, its emitter is connected with the output of power amplifier P5 in turn after resistance R22, resistance R24, resistance R27, its grounded collector.One end of resistance R26 is connected with the tie point of resistance R24 with resistance R22, the other end is connected with the COMP pin of integrated package U1.
During use, this integrated package U1 preferentially adopts model to be that SD42524 type integrated circuit realizes, and it has the functions such as the protection of overcurrent homeostasis, overtemperature prote.Wherein, the integrated IN pin of SD42524 is power voltage input terminal, and its input voltage range is 12 ~ 36V; SENSE pin is current detecting end, and its current margin is 6.5 ~ 20mA maximum output current is 6A; PWM is brightness adjustment control end; ADJ is linearity light adjusting end.
During connection, the SENSE pin of integrated package U1 is connected with the tie point of resistance R17 with polar capacitor C10, its PWM pin is connected with the positive pole of polar capacitor C11, its ADJ pin is connected with the negative pole of polar capacitor C11, its IN pin and resistance R14 are connected with resistance R16 tie point and are connected and its GND pin ground connection with the output of amplifier P3 as input; The tie point ground connection of described resistance R20 and resistance R23; The tie point of described resistance 22 and resistance R24 is as output.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R9 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R9, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R10 that the other end is connected with the electrode input end of power amplifier P4, be serially connected in the resistance R11 between the negative input of power amplifier P4 and output, one end is connected with the output of NAND gate IC1, the resistance R12 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R13 that the other end is connected with the negative input of NAND gate IC2 forms.
Meanwhile, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P4, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P4.
The positive pole of described polar capacitor C6 is connected with the tie point of resistance 22 with resistance R24, and the positive pole of polar capacitor C8 is connected with the emitter of triode Q3.For guaranteeing the normal operation of power amplifier P1 and power amplifier P2, this electric capacity C1 and electric capacity C2 all preferentially adopts patch capacitor to realize.And the resistance of resistance R1, resistance R2 is 10K Ω, the resistance of resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 is 20K Ω.
Now, the electrode input end of power amplifier P1 draws the input forming whole switch power amplifying circuit together with the negative input of power amplifier P2, and the output of NAND gate IC3 then forms the output of whole switch power amplifying circuit.
As mentioned above, just the present invention can well be realized.

Claims (4)

1. a novel switched power amplification formula field intensity detection system, by beam excitation formula logic amplifying circuit, power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R1 between the output of power amplifier P1 and negative input and electric capacity C1, be serially connected in the resistance R2 between the output of power amplifier P2 and electrode input end and electric capacity C2, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R4, base stage is connected with the output of power amplifier P2 after resistance R6, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R5, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C4 of ground connection, the electric capacity C3 be in parallel with resistance R6, one end is connected with the base stage of triode Q3, the resistance R7 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R8 of the external-4V voltage of the other end, the electric capacity C5 be in parallel with resistance R8, and N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P forms, it is characterized in that, amplifying type field intensity testing circuit is also serially connected with between beam excitation formula logic amplifying circuit and the output of power amplifier P3, described amplifying type field intensity testing circuit is by integrated package U1, power amplifier P5, positive pole is connected with the DD pin of integrated package U1 after resistance R19, negative pole is in turn through resistance R20, resistance R23, diode D5, the polar capacitor C11 be connected with the COMP pin of integrated package U1 after resistance R21, N pole is connected with the negative input of power amplifier P5 after resistance R18, P pole is in turn through resistance R17, polar capacitor C10, resistance R16, resistance R14, resistance R15, the diode D4 be connected with the electrode input end of power amplifier P5 after electric capacity C9, base stage is connected with the SW pin of integrated package U1 after resistance R25, its emitter is in turn through resistance R22, resistance R24, be connected with the output of power amplifier P5 after resistance R27, the triode Q4 of its grounded collector, one end is connected with the tie point of resistance R24 with resistance R22, the resistance R26 that the other end is connected with the COMP pin of integrated package U1 forms, the SENSE pin of described integrated package U1 is connected with the tie point of resistance R17 with polar capacitor C10, its PWM pin is connected with the positive pole of polar capacitor C11, its ADJ pin is connected with the negative pole of polar capacitor C11, its IN pin and resistance R14 are connected with resistance R16 tie point and be connected with the output of amplifier P3 as input, its GND pin ground connection, the tie point ground connection of described resistance R20 and resistance R23, the tie point of described resistance R22 and resistance R24 is as output, the negative input of described power amplifier P1 is connected with the electrode input end of power amplifier P2.
2. one according to claim 1 novel switched power amplification formula field intensity detection system, it is characterized in that, described beam excitation formula logic amplifying circuit is primarily of power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P4, the polar capacitor C6 of positive pole ground connection after optical diode D2, one end is connected with the positive pole of polar capacitor C6, the resistance R9 of other end ground connection after diode D3, positive pole is connected with the tie point of diode D3 with resistance R9, the polar capacitor C8 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R10 that the other end is connected with the electrode input end of power amplifier P4, be serially connected in the resistance R11 between the negative input of power amplifier P4 and output, one end is connected with the output of NAND gate IC1, the resistance R12 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C8, the resistance R13 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P4, and its output is connected with the electrode input end of NAND gate IC2, and the electrode input end of NAND gate IC3 is connected with the output of power amplifier P4, the positive pole of described polar capacitor C6 is connected with the tie point of resistance 22 with resistance R24, and the positive pole of polar capacitor C8 is connected with the emitter of triode Q3.
3. one according to claim 1 novel switched power amplification formula field intensity detection system, is characterized in that, described electric capacity C1 and electric capacity C2 is patch capacitor; Described electric capacity C3, electric capacity C4 and electric capacity C5 are then electrochemical capacitor.
4. one according to claim 1 novel switched power amplification formula field intensity detection system, it is characterized in that, the resistance of described resistance R1, resistance R2 is 10K Ω, and the resistance of resistance R3, resistance R4, resistance R5, resistance R6, resistance R7 and resistance R8 is 20K Ω.
CN201510317793.4A 2014-11-25 2015-06-11 Novel switch power amplification type field intensity detection system Withdrawn CN105007048A (en)

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CN201510317793.4A CN105007048A (en) 2014-11-25 2015-06-11 Novel switch power amplification type field intensity detection system

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CN201410687547.3A CN104467705A (en) 2014-11-25 2014-11-25 Novel excitation-type switching power amplification system
CN201510317793.4A CN105007048A (en) 2014-11-25 2015-06-11 Novel switch power amplification type field intensity detection system

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CN201510317793.4A Withdrawn CN105007048A (en) 2014-11-25 2015-06-11 Novel switch power amplification type field intensity detection system

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