CN204392624U - A kind of new power amplifying type logic control system - Google Patents
A kind of new power amplifying type logic control system Download PDFInfo
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- CN204392624U CN204392624U CN201420725147.2U CN201420725147U CN204392624U CN 204392624 U CN204392624 U CN 204392624U CN 201420725147 U CN201420725147 U CN 201420725147U CN 204392624 U CN204392624 U CN 204392624U
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Abstract
The utility model discloses a kind of new power amplifying type logic control system, primarily of switch power amplifying circuit, and the logic amplifying circuit be connected with switch power amplifying circuit forms; Described logic amplifying circuit is by power amplifier P4; NAND gate IC1; NAND gate IC2; NAND gate IC3; NAND gate IC4; the compositions such as the resistance R11 that one end is connected with the electrode input end of power amplifier P4, the other end is connected with the output of NAND gate IC4 through diode D3 in turn after resistance R16, is characterized in that, be also provided with virtual protection amplifying circuit.The utility model make use of the stability characteristic (quality) of switch power amplifying circuit fully, can guarantee the stability of logic control signal, goes for different field settings.
Description
Technical field
The utility model relates to a kind of logic control system, specifically refers to a kind of new power amplifying type logic control system.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, its needs are driven by special drive circuit, have therefore just occurred the protection system for preventing drive system from disturbing from inner or outside unfavorable factor miscellaneous on the market.
Logic control circuit is an important control section in LED protection system, and whether the speed of its speed of service and stable performance directly determine the scope of application and the performance quality of LED protection system.But the structure of these logic control circuits is all comparatively complicated at present, and not only its energy consumption is higher, and its speed of service is comparatively slow, well can not embody the advantage of quick, the low energy consumption of logic control.
Utility model content
The purpose of this utility model is to overcome the logic control circuit complex structure of current LED protection system, energy consumption is higher, the speed of service is slower defect, provides a kind of new power amplifying type logic control system.
The purpose of this utility model is achieved through the following technical solutions: a kind of new power amplifying type logic control system, and primarily of switch power amplifying circuit, and the logic amplifying circuit be connected with switch power amplifying circuit forms, described logic amplifying circuit is by power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, one end is connected with the electrode input end of power amplifier P4, the other end is in turn through resistance R11 that diode D3 is connected with the output of NAND gate IC4 after resistance R16, one end is connected with the output of NAND gate IC3, the resistance R15 that the other end is connected with the tie point of resistance R16 with diode D3, N pole is connected with the electrode input end of power amplifier P4, P pole is in turn through diode D2 that resistance R10 is connected with the electrode input end of power amplifier P4 after electric capacity C6, the resistance R9 be in parallel with diode D2, one end is connected with the negative input of power amplifier P4, the resistance R12 that the other end is connected with the negative input of NAND gate IC1, one end is connected with the electrode input end of NAND gate IC1, the resistance R13 that the other end is connected with the negative input of NAND gate IC4, one end is connected with the output of NAND gate IC1, the resistance R14 that the other end is connected with the negative input of NAND gate IC4, and positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC4 forms, the output of NAND gate IC1 is connected with the electrode input end of NAND gate IC2, and the negative input of NAND gate IC2 is also connected with the negative input of power amplifier P4, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P4, and its negative input is then connected with the electrode input end of NAND gate IC4.
Meanwhile, between diode D3 and the tie point of resistance R16 and resistance R15, virtual protection amplifying circuit is also serially connected with, this virtual protection amplifying circuit is primarily of power amplifier P5, power amplifier P6, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P5, the polar capacitor C8 that positive pole is connected with the negative input of NAND gate IC6 after resistance R20, one end is connected with the negative input of NAND gate IC5, the resistance R17 that the other end is connected with the electrode input end of power amplifier P5, be serially connected in the resistance R18 between the negative input of power amplifier P5 and output, one end is connected with the output of NAND gate IC5, the resistance R19 that the other end is connected with the negative input of power amplifier P6, be serially connected in the polar capacitor C9 between the electrode input end of power amplifier P6 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C10 that voltage stabilizing didoe D4 is connected with the output of power amplifier P5 after resistance R21, P pole is connected with the output of power amplifier P6, N pole is in turn through diode D5 that resistance R23 is connected with the tie point of resistance R21 with voltage stabilizing didoe D4 after resistance R22, and N pole is connected with the negative pole of electric capacity C10, the voltage stabilizing didoe D6 that P pole is connected with the tie point of resistance R23 with diode D5 forms, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P5, the electrode input end of the output NAND gate IC6 of power amplifier P6 is connected, and its electrode input end is then connected with the output of power amplifier P5, the positive pole of described polar capacitor C7 is then connected with the N pole of diode D3, and resistance R23 is then connected with the tie point of resistance R16 with resistance R15 with the tie point of resistance R22.
Further, described switch power amplifying circuit is primarily of power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R1 between the output of power amplifier P1 and negative input and electric capacity C1, be serially connected in the resistance R2 between the output of power amplifier P2 and electrode input end and electric capacity C2, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R4, base stage is connected with the output of power amplifier P2 after resistance R6, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R5, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C4 of ground connection, the electric capacity C3 be in parallel with resistance R6, one end is connected with the base stage of triode Q3, the resistance R7 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R8 of the external-4V voltage of the other end, the electric capacity C5 be in parallel with resistance R8, and N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P forms, the electrode input end of described power amplifier P1 is connected with the tie point of diode D3 with resistance R11, its negative input is then connected with the electrode input end of power amplifier P2, and the negative input of power amplifier P2 is then connected with the tie point of resistance R16 with resistance R15.
For guaranteeing result of use, described electric capacity C1, electric capacity C2, electric capacity C6 and electric capacity C7 are patch capacitor; Described electric capacity C3, electric capacity C4 and electric capacity C5 are electrochemical capacitor.
The utility model comparatively prior art is compared, and has the following advantages and beneficial effect:
(1) overall structure of the present utility model is simple, and it makes and very easy to use.
(2) the utility model adopts logic electronic components to realize its logic control function completely, and therefore its energy consumption is very low, fast operation.
(3) the utility model make use of the stability characteristic (quality) of switch power amplifying circuit fully, can guarantee the stability of logic control signal, goes for different field settings.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present utility model.
Fig. 2 is virtual protection amplification circuit structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with embodiment, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1, the utility model is primarily of switch power amplifying circuit, and virtual protection amplifying circuit, the logic amplifying circuit be connected with switch power amplifying circuit forms.Wherein, described logic amplifying circuit is by power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, diode D2, diode D3, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14, electric capacity C6 and electric capacity C7 form.
During connection, one end of resistance R11 is connected with the electrode input end of power amplifier P4, and its other end is connected with the output of NAND gate IC4 after resistance R16 through diode D3 in turn.One end of resistance R15 is connected with the output of NAND gate IC3, and its other end is connected with the tie point of resistance R16 with diode D3.The N pole of described diode D2 is connected with the electrode input end of power amplifier P4, and its P pole is connected with the electrode input end of power amplifier P4 after electric capacity C6 through resistance R10 in turn; Resistance R9 and diode D2 is in parallel.
One end of described resistance R12 is connected with the negative input of power amplifier P4, and its other end is connected with the negative input of NAND gate IC1; One end of resistance R13 is connected with the electrode input end of NAND gate IC1, and its other end is connected with the negative input of NAND gate IC4.One end of resistance R14 is connected with the output of NAND gate IC1, and its other end is connected with the negative input of NAND gate IC4; The described positive pole of electric capacity C7 is connected with the output of NAND gate IC2, and its negative pole is connected with the negative input of NAND gate IC4.
Meanwhile, the output of NAND gate IC1 is connected with the electrode input end of NAND gate IC2, and the negative input of NAND gate IC2 is also connected with the negative input of power amplifier P4; The electrode input end of NAND gate IC3 is connected with the output of power amplifier P4, and its negative input is then connected with the electrode input end of NAND gate IC4.Described virtual protection amplifying circuit is then serially connected between the N pole of diode D3 and the tie point of resistance R15 and resistance R16.
As shown in Figure 2, this virtual protection amplifying circuit is by power amplifier P5, power amplifier P6, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P5, the polar capacitor C8 that positive pole is connected with the negative input of NAND gate IC6 after resistance R20, one end is connected with the negative input of NAND gate IC5, the resistance R17 that the other end is connected with the electrode input end of power amplifier P5, be serially connected in the resistance R18 between the negative input of power amplifier P5 and output, one end is connected with the output of NAND gate IC5, the resistance R19 that the other end is connected with the negative input of power amplifier P6, be serially connected in the polar capacitor C9 between the electrode input end of power amplifier P6 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C10 that voltage stabilizing didoe D4 is connected with the output of power amplifier P5 after resistance R21, P pole is connected with the output of power amplifier P6, N pole is in turn through diode D5 that resistance R23 is connected with the tie point of resistance R21 with voltage stabilizing didoe D4 after resistance R22, and N pole is connected with the negative pole of electric capacity C10, the voltage stabilizing didoe D6 that P pole is connected with the tie point of resistance R23 with diode D5 forms.
Meanwhile, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P5; The electrode input end of the output NAND gate IC6 of power amplifier P6 is connected, and its electrode input end is then connected with the output of power amplifier P5; The positive pole of described polar capacitor C7 is then connected with the N pole of diode D3, and resistance R23 is then connected with the tie point of resistance R16 with resistance R15 with the tie point of resistance R22.
Described switch power amplifying circuit is primarily of power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R1 between the output of power amplifier P1 and negative input and electric capacity C1, be serially connected in the resistance R2 between the output of power amplifier P2 and electrode input end and electric capacity C2, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R4, base stage is connected with the output of power amplifier P2 after resistance R6, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R5, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C4 of ground connection, the electric capacity C3 be in parallel with resistance R6, one end is connected with the base stage of triode Q3, the resistance R7 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R8 of the external-4V voltage of the other end, the electric capacity C5 be in parallel with resistance R8, and N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P forms.
During connection, the electrode input end of described power amplifier P1 is connected with the tie point of diode D3 with resistance R11, its negative input is then connected with the electrode input end of power amplifier P2, and the negative input of power amplifier P2 is then connected with the tie point of resistance R16 with resistance R15.
For guaranteeing practical function, described electric capacity C1, electric capacity C2, electric capacity C6 and electric capacity C7 are patch capacitor; Described electric capacity C3, electric capacity C4 and electric capacity C5 are electrochemical capacitor.
As mentioned above, just the utility model can well be realized.
Claims (3)
1. a new power amplifying type logic control system, primarily of switch power amplifying circuit, and the logic amplifying circuit be connected with switch power amplifying circuit forms, described logic amplifying circuit is by power amplifier P4, NAND gate IC1, NAND gate IC2, NAND gate IC3, NAND gate IC4, one end is connected with the electrode input end of power amplifier P4, the other end is in turn through resistance R11 that diode D3 is connected with the output of NAND gate IC4 after resistance R16, one end is connected with the output of NAND gate IC3, the resistance R15 that the other end is connected with the tie point of resistance R16 with diode D3, N pole is connected with the electrode input end of power amplifier P4, P pole is in turn through diode D2 that resistance R10 is connected with the electrode input end of power amplifier P4 after electric capacity C6, the resistance R9 be in parallel with diode D2, one end is connected with the negative input of power amplifier P4, the resistance R12 that the other end is connected with the negative input of NAND gate IC1, one end is connected with the electrode input end of NAND gate IC1, the resistance R13 that the other end is connected with the negative input of NAND gate IC4, one end is connected with the output of NAND gate IC1, the resistance R14 that the other end is connected with the negative input of NAND gate IC4, and positive pole is connected with the output of NAND gate IC2, the electric capacity C7 that negative pole is connected with the negative input of NAND gate IC4 forms, the output of NAND gate IC1 is connected with the electrode input end of NAND gate IC2, and the negative input of NAND gate IC2 is also connected with the negative input of power amplifier P4, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P4, its negative input is then connected with the electrode input end of NAND gate IC4, it is characterized in that, between diode D3 and the tie point of resistance R16 and resistance R15, be also serially connected with virtual protection amplifying circuit, this virtual protection amplifying circuit is primarily of power amplifier P5, power amplifier P6, NAND gate IC5, NAND gate IC6, negative pole is connected with the electrode input end of power amplifier P5, the polar capacitor C8 that positive pole is connected with the negative input of NAND gate IC6 after resistance R20, one end is connected with the negative input of NAND gate IC5, the resistance R17 that the other end is connected with the electrode input end of power amplifier P5, be serially connected in the resistance R18 between the negative input of power amplifier P5 and output, one end is connected with the output of NAND gate IC5, the resistance R19 that the other end is connected with the negative input of power amplifier P6, be serially connected in the polar capacitor C9 between the electrode input end of power amplifier P6 and output, positive pole is connected with the output of NAND gate IC6, negative pole is in turn through electric capacity C10 that voltage stabilizing didoe D4 is connected with the output of power amplifier P5 after resistance R21, P pole is connected with the output of power amplifier P6, N pole is in turn through diode D5 that resistance R23 is connected with the tie point of resistance R21 with voltage stabilizing didoe D4 after resistance R22, and N pole is connected with the negative pole of electric capacity C10, the voltage stabilizing didoe D6 that P pole is connected with the tie point of resistance R23 with diode D5 forms, the electrode input end of described NAND gate IC5 is connected with the negative input of power amplifier P5, the electrode input end of the output NAND gate IC6 of power amplifier P6 is connected, and its electrode input end is then connected with the output of power amplifier P5, the positive pole of described polar capacitor C7 is then connected with the N pole of diode D3, and resistance R23 is then connected with the tie point of resistance R16 with resistance R15 with the tie point of resistance R22.
2. a kind of new power amplifying type logic control system according to claim 1, it is characterized in that, described switch power amplifying circuit is primarily of power amplifier P1, power amplifier P2, power amplifier P3, be serially connected in the resistance R1 between the output of power amplifier P1 and negative input and electric capacity C1, be serially connected in the resistance R2 between the output of power amplifier P2 and electrode input end and electric capacity C2, base stage is connected with the output of power amplifier P1, the triode Q1 that collector electrode is connected with the electrode input end of power amplifier P3 after resistance R3, base stage is connected with the emitter of triode Q1, the triode Q2 that collector electrode is connected with the negative input of power amplifier P3 after resistance R4, base stage is connected with the output of power amplifier P2 after resistance R6, the triode Q3 that collector electrode is connected with the base stage of triode Q2 after resistance R5, positive pole is connected with the negative input of power amplifier P3, and negative pole is connected with the emitter of triode Q2 and the electric capacity C4 of ground connection, the electric capacity C3 be in parallel with resistance R6, one end is connected with the base stage of triode Q3, the resistance R7 of the external-4V voltage of the other end, one end is connected with the emitter of triode Q3, the resistance R8 of the external-4V voltage of the other end, the electric capacity C5 be in parallel with resistance R8, and N pole is connected with the collector electrode of triode Q1, the diode D1 of the extremely external-4V voltage of P forms, the electrode input end of described power amplifier P1 is connected with the tie point of diode D3 with resistance R11, its negative input is then connected with the electrode input end of power amplifier P2, and the negative input of power amplifier P2 is then connected with the tie point of resistance R16 with resistance R15.
3. a kind of new power amplifying type logic control system according to claim 2, it is characterized in that, described electric capacity C1, electric capacity C2, electric capacity C6 and electric capacity C7 are patch capacitor; Described electric capacity C3, electric capacity C4 and electric capacity C5 are electrochemical capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420725147.2U CN204392624U (en) | 2014-11-27 | 2014-11-27 | A kind of new power amplifying type logic control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420725147.2U CN204392624U (en) | 2014-11-27 | 2014-11-27 | A kind of new power amplifying type logic control system |
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| Publication Number | Publication Date |
|---|---|
| CN204392624U true CN204392624U (en) | 2015-06-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420725147.2U Expired - Fee Related CN204392624U (en) | 2014-11-27 | 2014-11-27 | A kind of new power amplifying type logic control system |
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| Country | Link |
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| CN (1) | CN204392624U (en) |
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2014
- 2014-11-27 CN CN201420725147.2U patent/CN204392624U/en not_active Expired - Fee Related
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150610 Termination date: 20181127 |
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| CF01 | Termination of patent right due to non-payment of annual fee |