CN104953961A - Double-stage inversing D-class power amplifying circuit and radio frequency power amplifier - Google Patents
Double-stage inversing D-class power amplifying circuit and radio frequency power amplifier Download PDFInfo
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- CN104953961A CN104953961A CN201510337759.3A CN201510337759A CN104953961A CN 104953961 A CN104953961 A CN 104953961A CN 201510337759 A CN201510337759 A CN 201510337759A CN 104953961 A CN104953961 A CN 104953961A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
Abstract
The invention is suitable for the field of radio frequency communication, and provides a double-stage inversing D-class power amplifying circuit and a radio frequency power amplifier. The circuit comprises an input passive component connected with a block condenser, a positive and negative double-way driving-stage F-class amplifier, a positive and negative double-way amplifying-stage inversing F-class amplifier and an output passive component, wherein the two input ends of the positive and negative double-way driving-stage F-class amplifier are connected with the two output ends of the input passive component through two block coupling condensers, the two input ends of the positive and negative double-way amplifying-stage inversing F-class amplifier are connected with the two output ends of the positive and negative double-way driving-stage F-class amplifier through two condensers, and the two input ends of the output passive component are connected with the two output ends of the positive and negative double-way amplifying-stage inversing F-class amplifier through the two condensers. By utilizing an F-class driving inversing F-class push-pull structure, according to the harmonic shaping technology, the efficiency, the power and the gain of the power amplifier are improved, the independent control from a fundamental wave to a triple frequency harmonic impedance is achieved, the design difficulty is lowered, and the tedious debugging work in the later period is lowered. In addition, due to the positive and negative double-way structural design, the power and the gain are further improved.
Description
Technical field
The invention belongs to field of radio frequency communication, particularly relate to a kind of twin-stage against D class power amplification circuit and radio-frequency power amplifier.
Background technology
The fast development of wireless communications industry, makes the life of people day by day convenient, and this causes wireless communication system to become the indispensable part of people.The continuous progress of the communication technology and the continuous reinforcement of mankind's environmental consciousness, the key content making energy-saving and emission-reduction become Nowadays communication System Development must to consider.As the radio-frequency power amplifier that wireless communication system consumes energy the most, consume the power of more than 85% in transceiver, therefore how the efficiency of bring to power amplifier becomes the core of energy-saving and emission-reduction; Simultaneously transmitter signal power through multistage amplifications time, the power gain of final power amplifier is also by the whole work efficiency of influential system, so the power gain of lifting final power amplifier also has great importance; Again, for improving transmitting power, power synthetic technique is also the research emphasis problem in Amplifier Design field always.So, realize power amplifier high efficiency, high power gain, raising power output index compromise be an important and valuable engineering problem.
Inverse D-type power amplifier is a kind of switch power amplifier, and ideally, its efficiency can reach 100%.Inverse D-type power amplifier structure is very close with the structure of recommending class-b amplifier, composition graphs 1 (a), but its output is not the ohmic load in a broadband, but RLC series resonant network.Inverse class-D amplifier comprises transistor M1, M2 of two push-pull configurations, two transistor M1, M2 alternations when amplifying signal, and another cut-off of front half period conducting, rear half cycle switch operating state is exchanged, and therefore can regard desirable switch as.Due to the existence of RLC series resonant network, the voltage of this network two-port only should have fundamental component, namely voltage should be desirable sinusoidal signal, thus the voltage at output transformer chopped-off head coil two ends is also desirable sinusoidal signal, again because two each conducting half period of transistor, then when a transistor cutoff, the voltage of its drain electrode should be half-sine wave, and another transistor is because conducting, so drain voltage should be 0.Can be drawn by analysis above, drain current on each transistor is ideal square wave, drain voltage is desirable half-sine wave, and its phase difference is 90 °, composition graphs 1 (b), the drain voltage waveform on ideally each transistor and drain current wavefonn do not have overlapping, and transistor does not have energy loss, power is all converted to power output, and the drain efficiency of ideal inverse D-type power amplifier is 100%.By the impact of parasitic parameter, under inverse D-type power amplifier high frequency, the switch time delay of transistor be can not ignore, due to the non-ideal characteristic of transistor, transistor two ends are caused to there is the voltage and current of nonzero value at synchronization, flow through the overlay region that the current waveform of transistor and voltage waveform will occur, produce DC power.
The transistor drain electric current of inverse D-type power amplifier is ideal square wave, and drain voltage is desirable half-sine wave, and this is the same with the output waveform of inverse F power-like amplifier.Therefore the inverse F power-like amplifier of two-way push-pull configuration can be equivalent to against D-type power amplifier.For inverse F power-like amplifier, impedance of fundamental frequency must meet best base Impedance matching, must meet even-order harmonic open circuit, odd harmonic short circuit during high order harmonic component is anti-.When transistor output load impedance second harmonic open circuit, triple-frequency harmonics short circuit, transistor drain electric current comprises once and triple-frequency harmonics composition, and drain voltage comprises once and second harmonic composition, and now power amplifier can realize the efficiency of 75%.Meet even-order harmonic open circuit, during odd harmonic short circuit, the higher efficiency then against F class power amplifier of the harmonic wave comprised is higher.But in actual F class power amplifier design, owing to can influence each other between each harmonic impedance control circuit, want to meet all high-order even-order harmonic impedances open circuit, the situation of all high-order odd harmonics short circuit is very difficult.In general, often triple-frequency harmonics impedance is only considered in side circuit design.
In recent years, in order to realize high efficiency against D class radio-frequency power amplifier, the inverse D class radio-frequency power amplifier that general parallel resonance laod network realizes makes efficiency and operating frequency all to be improved, but the power gain of the single-stage power amplifier of current design is low, generally only has about 12dB, the control of circuit separate compensation is not carried out for transistor parasitic parameter yet, thus cause parasitic parameter to affect the impedance matching of amplifier, simultaneously when carrying out harmonic impedance design, each harmonic impedance control circuit can have an impact each other, therefore cannot realize controlling the independence of each harmonic impedance, this just considerably increases the design complexities of circuit designers, require a great deal of time and carry out circuit simulation and debugging.
Summary of the invention
The object of the embodiment of the present invention is to provide a kind of twin-stage against D class power amplification circuit, the power gain being intended to solve the existing inverse D class rf power amplifier circuit single-stage power amplifier utilizing parallel resonance laod network to realize is low, the problem that operating efficiency and power output are not high and artificial debugging is lengthy and tedious.
The embodiment of the present invention is achieved in that a kind of twin-stage is against D class power amplification circuit, and described circuit comprises:
Input Ba Lun, the input of described input Ba Lun is connected with one end of capacitance C0, the other end of described capacitance C0 is the input of described twin-stage against D class power amplification circuit, first output of described input Ba Lun, the second output respectively with every straight coupling capacitance C5, be connected every one end of straight coupling capacitance C5 ';
Positive and negative two-way driving stage F class A amplifier A, the input of described positive and negative two-way driving stage F class A amplifier A is connected every straight coupling capacitance C5, the described other end every straight coupling capacitance C5 ' with described respectively, the output of described positive and negative two-way driving stage F class A amplifier A respectively with every straight coupling capacitance C1, be connected every one end of straight coupling capacitance C1 ';
Positive and negative two-way amplifying stage is against F class A amplifier A, described positive and negative two-way amplifying stage is connected every straight coupling capacitance C1, the described other end every straight coupling capacitance C1 ' with described respectively against the input of F class A amplifier A, described positive and negative two-way amplifying stage against F class A amplifier A output respectively with every straight coupling capacitance C6, be connected every one end of straight coupling capacitance C6 ';
Export Ba Lun, first input end, second input of described output Ba Lun are connected every straight coupling capacitance C6, the described other end every straight coupling capacitance C6 ' with described respectively, the output of described output Ba Lun is connected with the one end every straight coupling capacitance C10, and the described other end every straight coupling capacitance C10 is the output of described twin-stage against D class power amplification circuit.
Another object of the embodiment of the present invention is, provides a kind of and adopts above-mentioned twin-stage against the radio-frequency power amplifier of D class power amplification circuit.
The embodiment of the present invention utilizes F class to drive the push-pull configuration of inverse F class, the efficiency of power amplifier is improved by harmonic wave shaping technique, power amplifier is made to have the characteristic of high power, high-gain, and the output matching circuit of F class driving stage and inverse F class amplifying stage can also realize from first-harmonic to triple-frequency harmonics impedance independent, accurately control, reduce the energy loss of transistor, effectively improve design efficiency, reduce design difficulty, decrease the lengthy and tedious work of later stage debugging.Meanwhile, by the twin-stage based on harmonic wave shaping technique against D class power amplification structural design, compare than the E class power amplifier of single tube structure and there is higher power output capacity, the power gain of bring to power amplifier greatly.
Accompanying drawing explanation
Fig. 1 (a) is existing inverse D class power amplification circuit structure chart;
Fig. 1 (b) is transistor drain output end current and voltage waveform view figure in ideal situation subinverse D class power amplification circuit;
The twin-stage that Fig. 2 provides for the embodiment of the present invention is against the structure chart of D class power amplification circuit;
The twin-stage that Fig. 3 (a) provides for the embodiment of the present invention is against the exemplary construction figure of driving stage F class A amplifier A in D class power amplification circuit;
The twin-stage that Fig. 3 (b) provides for the embodiment of the present invention is against amplifying stage in D class power amplification circuit against the exemplary construction figure of F class A amplifier A;
The bipolar preferred structure figure against driving stage F class A amplifier A in D class power amplification circuit that Fig. 4 (a) provides for the embodiment of the present invention;
The bipolar preferred structure figure against amplifying stage in D class power amplification circuit against F class A amplifier A that Fig. 4 (b) provides for the embodiment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.In addition, if below in described each execution mode of the present invention involved technical characteristic do not form conflict each other and just can mutually combine.
The embodiment of the present invention utilizes F class to drive the push-pull configuration of inverse F class, the efficiency of power amplifier, power and gain is improved by harmonic wave shaping technique, and realize controlling from first-harmonic to the independence of triple-frequency harmonics impedance, reduce design difficulty, decrease the lengthy and tedious work of later stage debugging, also improve power and gain further by positive and negative two-channel structure design in addition.
Below in conjunction with specific embodiment, realization of the present invention is described in detail:
Fig. 2 shows twin-stage that the embodiment of the present invention provides against the structure of D class power amplification circuit, for convenience of explanation, illustrate only part related to the present invention.
As one embodiment of the invention, this twin-stage can be applied in any radio-frequency power amplifier against D class power amplification circuit, comprising:
Input Ba Lun 3, the input of input Ba Lun 3 is connected with one end of capacitance C0, the other end of capacitance C0 is the input of twin-stage against D class power amplification circuit, input first output of Ba Lun 3, the second output respectively with every straight coupling capacitance C5, be connected every one end of straight coupling capacitance C5 ';
Positive and negative two-way driving stage F class A amplifier A 1, the input of positive and negative two-way driving stage F class A amplifier A 1 respectively with every straight coupling capacitance C5, be connected every the other end of straight coupling capacitance C5 ', composition graphs 4 (a) every straight coupling capacitance C5, be respectively middle node, negative intermediate node every the other end of straight coupling capacitance C5 ', the output of positive and negative two-way driving stage F class A amplifier A 1 respectively with every straight coupling capacitance C1, be connected every one end of straight coupling capacitance C1 ';
Positive and negative two-way amplifying stage is against F class A amplifier A 2, positive and negative two-way amplifying stage against F class A amplifier A 2 input respectively with every straight coupling capacitance C1, be connected every the other end of straight coupling capacitance C1 ', positive and negative two-way amplifying stage against F class A amplifier A 2 output respectively with every straight coupling capacitance C6, be connected every one end of straight coupling capacitance C6 ';
Export Ba Lun 4, export the first input end of Ba Lun 4, the second input respectively with every straight coupling capacitance C6, be connected every the other end of straight coupling capacitance C6 ', the output exporting Ba Lun 4 is connected with the one end every straight coupling capacitance C10, and the other end every straight coupling capacitance C10 is the output of twin-stage against D class power amplification circuit.
The embodiment of the present invention utilizes F class to drive the push-pull configuration of inverse F class, the efficiency of power amplifier is improved by harmonic wave shaping technique, power amplifier is made to have the characteristic of high power, high-gain, and the output matching circuit of F class driving stage and inverse F class amplifying stage can also realize from first-harmonic to triple-frequency harmonics impedance independent, accurately control, reduce the energy loss of transistor, effectively improve design efficiency, reduce design difficulty, decrease the lengthy and tedious work of later stage debugging.Meanwhile, by the twin-stage based on harmonic wave shaping technique against D class power amplification structural design, compare than the E class power amplifier of single tube structure and there is higher power output capacity, the power gain of bring to power amplifier greatly.
As one embodiment of the invention, the internal structure of positive and negative two-way driving stage F class A amplifier A 1 is identical, positive and negative two-way amplifying stage is identical against the internal structure of F class A amplifier A 2, and following Jin Dui mono-tunnel driving stage F class A amplifier A 1 and a road amplifying stage are described against the structure of F class A amplifier A 2.
Composition graphs 3 (a), driving stage F class A amplifier A 1 comprises:
The input that the power signal input (grid) of the first transistor M, the first transistor M is driving stage F class A amplifier A 1, current output terminal (source electrode) ground connection of transistor M;
First parasitic parameter regulon 11, for regulating transistor parasitic parameter for the impact of F power-like amplifier, the input of the first parasitic parameter regulon 11 is connected with the power signal output (drain electrode) of the first transistor M;
In embodiments of the present invention, for N-type metal-oxide-semiconductor, from the angle of power signal flow graph, the low-power level signal that grid inputs is enlarged into the high-power signal that drain electrode exports by N-type metal-oxide-semiconductor, the source ground of N-type metal-oxide-semiconductor, the signal that first parasitic parameter regulon 11 processes, had both comprised ac voltage signal and had also comprised ac current signal.
F rahmonic impedance control unit 12, for the second harmonic of transistor power signal output part to four-time harmonic independently control group coupling, the input of F rahmonic impedance control unit 12 is connected with the output of the first parasitic parameter regulon 11;
First fundamental wave matching unit 13, for mating the first-harmonic independence control group of transistor power signal output part, the input of first fundamental wave matching unit 13 is connected with the output of F rahmonic impedance control unit 12, and the output of first fundamental wave matching unit 13 is the output of driving stage F class A amplifier A 1.
In embodiments of the present invention, the parasitic parameter model of the first transistor M comprises: the parasitic capacitance C between transistor drain and source electrode
ds, stray inductance L
dwith encapsulation parasitic capacitance C
pdeng.
As one embodiment of the invention, the first parasitic parameter regulon (network) 11 can be made up of L-type microstrip line construction.
As one embodiment of the present invention, composition graphs 4 (a), the first parasitic parameter regulon (network) 11, between the power signal output and F rahmonic impedance control unit 12 of the first transistor M, is Z by characteristic impedance
0l-type microstrip line in the first transmission line TL1 and the second transmission line TL2 form.Be θ by reasonably selecting the electrical length of the first transmission line TL1
1with the electrical length θ of the second transmission line TL2
2occurrence, realize the Parasitic compensation to harmonic impedance.
Wherein, the electrical length θ of the first transmission line TL1
1with the electrical length θ of the second transmission line TL2
2can be obtained by following equations:
In above-mentioned formula, n is integer, Z
0for the characteristic impedance of micro-band, unit is Ω; ω
0for first-harmonic angular frequency, unit is rad/s; C
dsfor parasitic capacitance, unit is pF; L
dfor stray inductance, unit is nH; C
pfor encapsulation parasitic capacitance, unit is pF, R
optoptimum load impedance.
When actual design, the electrical length of the first transmission line TL1 is θ
1the minimum value being greater than zero is got with the electrical length of the second transmission line TL2.
In embodiments of the present invention, by reasonably selecting the electrical length of the first transmission line TL1 to be θ
1with the electrical length θ of the second transmission line TL2
2occurrence, realize the Parasitic compensation to harmonic impedance.
To F power-like amplifier, the impedance of fundamental frequency needed for transistor power signal output part is Z
fund, the impedance of fundamental frequency of first fundamental wave matching unit 13 input is Z
match, known required Z
fundjust can in the hope of the Z of correspondence
match, both sides relation can show with following formula table:
When the impedance of fundamental frequency of impedance of fundamental frequency net control meets corresponding Z
matchjust can realize impedance of fundamental frequency coupling needed for transistor ports.
F rahmonic impedance control unit 12 can be Z by three sections of characteristic impedances
0microstrip line construction form, comprising:
First series connection microstrip line, the first open circuit microstrip line and the first short-circuit micro-band line;
One end of first series connection microstrip line is the input of F rahmonic impedance control unit 12, the other end of the first series connection microstrip line is connected with first one end of opening a way microstrip line and the first short-circuit micro-band line while of being the output of F rahmonic impedance control unit 12, the other end ground connection of the first short-circuit micro-band line;
First series connection microstrip line, the first open circuit microstrip line are identical with the characteristic impedance of the first short-circuit micro-band line.
Wherein, the electrical length of the first series connection microstrip line is λ
0the electrical length of the/4, first open circuit microstrip line is λ
0the electrical length of the/12, first short-circuit micro-band line is λ
0/ 4, λ
0for the wavelength of fundamental frequency.
For steady job frequency, this F rahmonic impedance control unit 12 can realize simultaneously input port place second harmonic short circuit, triple-frequency harmonics open circuit, four-time harmonic short circuit.In Fig. 3 (a), S represents harmonic impedance short circuit, and O represents that harmonic impedance is opened a way.That is, 2S represents second harmonic short circuit, and 3S represents triple-frequency harmonics short circuit, and 4S represents four-time harmonic short circuit, and 1O represents that first-harmonic is opened a way, and 3O represents that triple-frequency harmonics is opened a way.
The concrete principle of second harmonic and triple-frequency harmonics impedance Control is described below:
According to the second harmonic short circuit of harmonic controling circuit input end realization, the impedance conditions of triple-frequency harmonics open circuit, the equiva lent impedance from the intrinsic drain electrode of transistor to load direction can be obtained.To second harmonic, the load impedance obtaining intrinsic drain electrode place of transistor is:
Wherein, Z
tL=jZ
0tan (2 θ
1), ω
0first-harmonic angular frequency, the parasitic capacitance C between transistor drain and source electrode
ds, stray inductance L
dwith encapsulation parasitic capacitance C
p.
Similarly, to triple-frequency harmonics, by the equivalent electric circuit of correspondence, the load impedance obtaining intrinsic drain electrode place of transistor is:
Wherein, Z '
tL=-jZ
0/ tan (3 θ
1+ 3 θ
2), ω
0first-harmonic angular frequency, the parasitic capacitance C between transistor drain and source electrode
ds, stray inductance L
dwith encapsulation parasitic capacitance C
p.
As one embodiment of the invention, first fundamental wave matching unit (network) 13 can be made up of L-type microstrip line construction, and comprise the 3rd microstrip line TL3 and the 4th microstrip line TL4, its characteristic impedance is Z
0;
One end of 3rd microstrip line TL3 is the input of first fundamental wave matching unit 13, and the other end of the 3rd microstrip line TL3 is that the output of first fundamental wave matching unit 13 is connected with one end of the 4th microstrip line TL4.
The embodiment of the present invention, by reasonably selecting the occurrence of the 3rd microstrip line TL3 and the 4th microstrip line TL4, can realize the impedance of fundamental frequency coupling of F power-like amplifier, not affect the control of front end secondary to four-time harmonic impedance simultaneously.
Composition graphs 3 (b), amplifying stage comprises against F class A amplifier A 2:
The power signal input (grid) of transistor seconds Mb, transistor seconds Mb for amplifying stage is against the input of F class A amplifier A 2, current output terminal (source electrode) ground connection of transistor seconds Mb;
Second parasitic parameter regulon 11b, for regulating transistor parasitic parameter for the impact of inverse F power-like amplifier, the input of the second parasitic parameter regulon 11b is connected with the power signal output (drain electrode) of transistor seconds Mb;
Inverse F rahmonic impedance control unit 12b, for to the second harmonic of transistor power signal output part to four-time harmonic independently control group coupling, the input of inverse F rahmonic impedance control unit 12b is connected with the output of the second parasitic parameter regulon 11b;
Second fundamental wave matching unit 13b, for mating the first-harmonic independence control group of transistor power signal output part, the input of second fundamental wave matching unit 13b is connected with the output of inverse F rahmonic impedance control unit 12b, and the output of second fundamental wave matching unit 13b is the output of amplifying stage against F class A amplifier A 2.
In embodiments of the present invention, the second parasitic parameter regulon 11b is identical with the structure of the first parasitic parameter regulon 11, and second fundamental wave matching unit 13b is identical with the structure of first fundamental wave matching unit 13.
As one embodiment of the invention, inverse F rahmonic impedance control unit 12b comprises:
Second series connection microstrip line, the 3rd series connection microstrip line, the second open circuit microstrip line and the second short-circuit micro-band line;
One end of second series connection microstrip line is the input of inverse F rahmonic impedance control unit 12b, the other end of the second series connection microstrip line connect with the 3rd simultaneously microstrip line, the second short-circuit micro-band line one end be connected, the other end ground connection of short-circuit micro-band line, the other end of the second short-circuit micro-band line is that the output of inverse F rahmonic impedance control unit 12b is connected with second one end of opening a way microstrip line.
In embodiments of the present invention, the second series connection microstrip line, the 3rd series connection microstrip line, the second open circuit microstrip line are identical with the characteristic impedance of the second short-circuit micro-band line, are Z
0, wherein, the electrical length of the second series connection microstrip line is λ
0the electrical length of the/8, three series connection microstrip line is λ
0the electrical length of the/24, second short-circuit micro-band line is λ
0the electrical length of the/4, second open circuit microstrip line is λ
0/ 12, λ
0for the wavelength of fundamental frequency.
For steady job frequency, this can realize second harmonic short circuit, the triple-frequency harmonics open circuit at input port place against F rahmonic impedance control unit 12b simultaneously.In Fig. 3 (b), S represents harmonic impedance short circuit, and O represents that harmonic impedance is opened a way.That is, 2S represents second harmonic short circuit, and 3S represents triple-frequency harmonics short circuit, and 1O represents that first-harmonic is opened a way, and 3O represents that triple-frequency harmonics is opened a way.
The embodiment of the present invention is by reasonably selecting the occurrence of each microstrip line electrical length, and the impedance of fundamental frequency that can realize against F power-like amplifier mates, and does not affect the control of front end secondary to triple-frequency harmonics impedance simultaneously.
Fig. 4 (a), Fig. 4 (b) to respectively illustrate in the bipolar inverse D class power amplification circuit that the embodiment of the present invention provides driving stage F class A amplifier A and amplifying stage against the preferred structure of F class A amplifier A, for convenience of explanation, illustrate only part related to the present invention.
In embodiments of the present invention, the structure of two-way driving stage F class A amplifier A 1 is identical, and Jin Dui mono-tunnel is described herein, composition graphs 4 (a), and driving stage F class A amplifier A 1 can also comprise the circuit of power amplifier importation:
The input of the first input stabilization element 14, first input stabilization element 14 is the input of driving stage F class A amplifier A 1;
The input that first input first-harmonic matching unit 15, first inputs first-harmonic matching unit 15 is connected with the first output inputting stabilization element 14, and the output of the first input first-harmonic matching unit 15 is connected with the gate input of the first transistor M.
Preferably, the first input stabilization element 14 comprises:
Resistance R1, resistance R2, electric capacity C2;
One end of resistance R2 is connected with one end of electric capacity C2 and one end of resistance R1 while of being the input of the first input stabilization element 14, the other end ground connection of resistance R1, the other end of resistance R2 is connected with the other end of electric capacity C2, is the output of the first input stabilization element 14 simultaneously.
First input first-harmonic matching unit 15 comprises:
5th microstrip line TL5, the 6th microstrip line TL6, the 7th microstrip line TL7 and the first direct current biasing line TL0;
5th microstrip line TL5, the 6th microstrip line TL6, the 7th microstrip line TL7 form L-type microstrip line construction, 6th microstrip line TL6 is connected with one end of the 7th microstrip line TL7, it is the input of the first input first-harmonic matching unit 15 simultaneously, the other end of the 6th microstrip line TL6 is connected with one end of the 5th microstrip line TL5 and the first direct current biasing line TL0 simultaneously, the other end of the 5th microstrip line TL5 is the output of the first input first-harmonic matching unit 15, and the other end of the first direct current biasing line TL0 is the feed end of the first input first-harmonic matching unit 15.
The electrical length of this first direct current biasing line TL0 is λ
0/ 4, five microstrip line TL5, the 6th microstrip line TL6, the 7th microstrip line TL7 need, according to basic L minor matters matching process, the output load impedance of amplifier is transformed to best first-harmonic matched load matched impedance.
Further, driving stage F class A amplifier A 1 can also comprise:
First grid direct current biasing unit (network) 16 and the first drain electrode direct current biasing unit (network) 17;
The DC feedback end that the feed end and first of first grid direct current biasing unit 16 inputs first-harmonic matching unit 15 is connected, and the offset side of first grid direct current biasing unit 16 is connected with gate bias voltage Vg;
The feed end of the first drain electrode direct current biasing unit 17 is connected with the DC feedback end of F rahmonic impedance control unit 12, and the offset side of the first drain electrode direct current biasing unit 17 is connected with drain bias voltage Vd.
Preferably, first grid direct current biasing unit 16 comprises:
8th microstrip line TL8 and electric capacity C3;
One end of 8th microstrip line TL8 is that the feed end of first grid direct current biasing unit 16 is connected with one end of electric capacity C3, and the other end of the 8th microstrip line TL8 is the offset side of first grid direct current biasing unit 16, the other end ground connection of electric capacity C3.
Preferably, the first drain electrode direct current biasing unit 17 comprises:
9th microstrip line TL9 and electric capacity C4;
One end of 9th microstrip line TL9 is that the feed end of the first drain electrode direct current biasing unit 17 is connected with one end of electric capacity C4, and the other end of the 9th microstrip line TL9 is the offset side of the first drain electrode direct current biasing unit 17, the other end ground connection of electric capacity C4.
In embodiments of the present invention, two-way amplifying stage is identical against the structure of F class A amplifier A 2, and Jin Dui mono-tunnel is described herein, composition graphs 4 (b), and amplifying stage can also comprise the circuit of power amplifier importation against F class A amplifier A 2:
Second input stabilization element 14b, the input of the second input stabilization element 14b is the input of amplifying stage against F class A amplifier A 2;
Second input first-harmonic matching unit 15b, the input of the second input first-harmonic matching unit 15b is connected with the second output inputting stabilization element 14b, and the output of the second input first-harmonic matching unit 15b is connected with the gate input of transistor seconds Mb.
Preferably, the second input stabilization element 14b comprises:
Resistance R1b, resistance R2b, electric capacity C2b;
One end of resistance R2b is connected with one end of electric capacity C2b and one end of resistance R1b while of being the input of the second input stabilization element 14b, the other end ground connection of resistance R1b, the other end of resistance R2b is connected with the other end of electric capacity C2b, is the output of the second input stabilization element 14b simultaneously.
Second input first-harmonic matching unit 15b comprises:
5th microstrip line TL5b, the 6th microstrip line TL6b, the 7th microstrip line TL7b and the second direct current biasing line TL0b;
5th microstrip line TL5b, the 6th microstrip line TL6b, the 7th microstrip line TL7b form L-type microstrip line construction, 6th microstrip line TL6b is connected with one end of the 7th microstrip line TL7b, it is the input of the second input first-harmonic matching unit 15b simultaneously, the other end of the 6th microstrip line TL6b is connected with one end of the 5th microstrip line TL5b and the second direct current biasing line TL0b simultaneously, the other end of the 5th microstrip line TL5b is the output of the second input first-harmonic matching unit 15b, and the other end of the second direct current biasing line TL0b is the feed end of the second input first-harmonic matching unit 15b.
The electrical length of this second direct current biasing line TL0b is λ
0/ 4, microstrip line TL5b, TL6b, TL7b need, according to basic L minor matters matching process, the output load impedance of amplifier is transformed to best first-harmonic matched load matched impedance.
Further, amplifying stage can also comprise against F class A amplifier A 2:
Second grid direct current biasing unit (network) 16b and second drain electrode direct current biasing unit (network) 17b;
The DC feedback end that the feed end and second of second grid direct current biasing unit 16b inputs first-harmonic matching unit 15b is connected, and the offset side of second grid direct current biasing unit 16b is connected with gate bias voltage Vg;
The feed end of the second drain electrode direct current biasing unit 17b is connected with the DC feedback end of F rahmonic impedance control unit 12b, and the offset side of the second drain electrode direct current biasing unit 17b is connected with drain bias voltage Vd.
Preferably, second grid direct current biasing unit 16b comprises:
8th microstrip line TL8b and electric capacity C3b;
One end of 8th microstrip line TL8b is that the feed end of second grid direct current biasing unit 16b is connected with one end of electric capacity C3b, and the other end of the 8th microstrip line TL8b is the offset side of second grid direct current biasing unit 16b, the other end ground connection of electric capacity C3b.
Preferably, the second drain electrode direct current biasing unit 17b comprises:
9th microstrip line TL9b and electric capacity C4b;
One end of 9th microstrip line TL9b is that the feed end of the second drain electrode direct current biasing unit 17b is connected with one end of electric capacity C4b, and the other end of the 9th microstrip line TL9b is the end of the second drain electrode direct current biasing unit 17b, the other end ground connection of electric capacity C4b.
In actual design, transistor M, transistor Ma, transistor Mb, transistor Mc all can select model to be the 6W GaN HEMT transistor of Cree CGH40006P or the 10W GaN HEMT of CGH40010F, and the transistor of other types and model also can be adopted to realize.
Another object of the embodiment of the present invention is, provides a kind of radio-frequency power amplifier adopting above-mentioned inverse D class power amplification circuit.
The embodiment of the present invention utilizes F class to drive the push-pull configuration of inverse F class, the efficiency of power amplifier is improved by harmonic wave shaping technique, power amplifier is made to have the characteristic of high power, high-gain, and the output matching circuit of F class driving stage and inverse F class amplifying stage can also realize from first-harmonic to triple-frequency harmonics impedance independent, accurately control, reduce the energy loss of transistor, effectively improve design efficiency, reduce design difficulty, decrease the lengthy and tedious work of later stage debugging.Meanwhile, by the twin-stage based on harmonic wave shaping technique against D class power amplification structural design, compare than the E class power amplifier of single tube structure and there is higher power output capacity, the power gain of bring to power amplifier greatly.
These are only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. twin-stage is against a D class power amplification circuit, it is characterized in that, described twin-stage comprises against D class power amplification circuit:
Input Ba Lun, the input of described input Ba Lun is connected with one end of capacitance C0, the other end of described capacitance C0 is the input of described twin-stage against D class power amplification circuit, first output of described input Ba Lun, the second output respectively with every straight coupling capacitance C5, be connected every one end of straight coupling capacitance C5 ';
Positive and negative two-way driving stage F class A amplifier A, the input of described positive and negative two-way driving stage F class A amplifier A is connected every straight coupling capacitance C5, the described other end every straight coupling capacitance C5 ' with described respectively, the output of described positive and negative two-way driving stage F class A amplifier A respectively with every straight coupling capacitance C1, be connected every one end of straight coupling capacitance C1 ';
Positive and negative two-way amplifying stage is against F class A amplifier A, described positive and negative two-way amplifying stage is connected every straight coupling capacitance C1, the described other end every straight coupling capacitance C1 ' with described respectively against the input of F class A amplifier A, described positive and negative two-way amplifying stage against F class A amplifier A output respectively with every straight coupling capacitance C6, be connected every one end of straight coupling capacitance C6 ';
Export Ba Lun, first input end, second input of described output Ba Lun are connected every straight coupling capacitance C6, the described other end every straight coupling capacitance C6 ' with described respectively, the output of described output Ba Lun is connected with the one end every straight coupling capacitance C10, and the described other end every straight coupling capacitance C10 is the output of described twin-stage against D class power amplification circuit.
2. twin-stage as claimed in claim 1 is against D class power amplification circuit, and it is characterized in that, described driving stage F class A amplifier A comprises:
The first transistor, the power signal input of described the first transistor is the input of described driving stage F class A amplifier A;
First parasitic parameter regulon, for regulating transistor parasitic parameter for the impact of F power-like amplifier, the described input of the first parasitic parameter regulon is connected with the power signal output of described the first transistor;
F rahmonic impedance control unit, for the second harmonic of transistor power signal output part to four-time harmonic independently control group coupling, the input of described F rahmonic impedance control unit is connected with the output of described first parasitic parameter regulon;
First fundamental wave matching unit, for mating the first-harmonic independence control group of transistor power signal output part, the input of described first fundamental wave matching unit is connected with the output of described F rahmonic impedance control unit, and the output of described first fundamental wave matching unit is the output of described driving stage F class A amplifier A.
3. twin-stage as claimed in claim 2 is against D class power amplification circuit, and it is characterized in that, described F rahmonic impedance control unit comprises:
First series connection microstrip line, the first open circuit microstrip line and the first short-circuit micro-band line;
One end of described first series connection microstrip line is the input of described F rahmonic impedance control unit, the other end of described first series connection microstrip line is connected with described first one end of opening a way microstrip line and described first short-circuit micro-band line while of being the output of described F rahmonic impedance control unit, the other end ground connection of described first short-circuit micro-band line;
Described first series connection microstrip line, described first open circuit microstrip line are identical with the characteristic impedance of described first short-circuit micro-band line.
4. twin-stage as claimed in claim 2 is against D class power amplification circuit, and it is characterized in that, described driving stage F class A amplifier A also comprises:
First input stabilization element, the input of described first input stabilization element is the input of described driving stage F class A amplifier A;
First input first-harmonic matching unit, the input of described first input first-harmonic matching unit is connected with the described first output inputting stabilization element, and the output of described first input first-harmonic matching unit is connected with the gate input of described the first transistor.
5. twin-stage as claimed in claim 4 is against D class power amplification circuit, it is characterized in that, described first input first-harmonic matching unit comprises:
5th microstrip line, the 6th microstrip line, the 7th microstrip line and the first direct current biasing line;
Described 5th microstrip line, described 6th microstrip line, described 7th microstrip line form L-type microstrip line construction, described 6th microstrip line is connected with one end of described 7th microstrip line, it is the input of described first input first-harmonic matching unit simultaneously, the other end of described 6th microstrip line is connected with one end of described 5th microstrip line and described first direct current biasing line simultaneously, the other end of described 5th microstrip line is the output of described first input first-harmonic matching unit, and the other end of described first direct current biasing line is the feed end of described first input first-harmonic matching unit.
6. twin-stage as claimed in claim 4 is against D class power amplification circuit, and it is characterized in that, described driving stage F class A amplifier A also comprises:
First grid direct current biasing unit and the first drain electrode direct current biasing unit;
The DC feedback end that the feed end and described first of described first grid direct current biasing unit inputs first-harmonic matching unit is connected, and the offset side of described first grid direct current biasing unit is connected with gate bias voltage;
The feed end of described first drain electrode direct current biasing unit is connected with the DC feedback end of described F rahmonic impedance control unit, and the offset side of described first drain electrode direct current biasing unit is connected with drain bias voltage.
7. twin-stage as claimed in claim 1 is against D class power amplification circuit, and it is characterized in that, described amplifying stage comprises against F class A amplifier A:
Transistor seconds, the power signal input of described transistor seconds is the input of described amplifying stage against F class A amplifier A;
Second parasitic parameter regulon, for regulating transistor parasitic parameter for the impact of inverse F power-like amplifier, the described input of the second parasitic parameter regulon is connected with the power signal output of described transistor seconds;
Inverse F rahmonic impedance control unit, for to the second harmonic of transistor power signal output part to four-time harmonic independently control group coupling, the input of described inverse F rahmonic impedance control unit is connected with the output of described second parasitic parameter regulon;
Second fundamental wave matching unit, for mating the first-harmonic independence control group of transistor power signal output part, the input of described second fundamental wave matching unit is connected with the output of described inverse F rahmonic impedance control unit, and the output of described second fundamental wave matching unit is the output of described amplifying stage against F class A amplifier A.
8. twin-stage as claimed in claim 7 is against D class power amplification circuit, it is characterized in that, described inverse F rahmonic impedance control unit comprises:
Second series connection microstrip line, the 3rd series connection microstrip line, the second open circuit microstrip line and the second short-circuit micro-band line;
One end of described second series connection microstrip line is the input of described inverse F rahmonic impedance control unit, the other end of described second series connection microstrip line connect with the described 3rd simultaneously microstrip line, described second short-circuit micro-band line one end be connected, the other end ground connection of described short-circuit micro-band line, the other end of described second short-circuit micro-band line is that the described output against F rahmonic impedance control unit is connected with described second one end of opening a way microstrip line.
9. twin-stage as claimed in claim 7 is against D class power amplification circuit, and it is characterized in that, described amplifying stage also comprises against F class A amplifier A:
Second input stabilization element, the input of described second input stabilization element is the input of described amplifying stage against F class A amplifier A;
Second input first-harmonic matching unit, the input of described second input first-harmonic matching unit is connected with the described second output inputting stabilization element, and the output of described second input first-harmonic matching unit is connected with the gate input of described transistor seconds;
Second grid direct current biasing unit, the DC feedback end that the feed end and described second of described second grid direct current biasing unit inputs first-harmonic matching unit is connected, and the offset side of described second grid direct current biasing unit is connected with gate bias voltage;
Second drain electrode direct current biasing unit, the feed end of described second drain electrode direct current biasing unit is connected with the DC feedback end of described inverse F rahmonic impedance control unit, and the offset side of described second drain electrode direct current biasing unit is connected with drain bias voltage.
10. a radio-frequency power amplifier, is characterized in that, described radio-frequency power amplifier comprises twin-stage as described in any one of claim 1 to 9 against D class power amplification circuit.
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| CN201510337759.3A CN104953961B (en) | 2015-06-17 | 2015-06-17 | A kind of twin-stage is against D classes power amplification circuit and radio-frequency power amplifier |
| PCT/CN2015/095533 WO2016201897A1 (en) | 2015-06-17 | 2015-11-25 | Double-stage inverse d-class power amplification circuit and radio frequency power amplifier |
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| CN201510337759.3A CN104953961B (en) | 2015-06-17 | 2015-06-17 | A kind of twin-stage is against D classes power amplification circuit and radio-frequency power amplifier |
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| WO2016201897A1 (en) | 2016-12-22 |
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