CN104885208A - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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CN104885208A
CN104885208A CN201480003314.5A CN201480003314A CN104885208A CN 104885208 A CN104885208 A CN 104885208A CN 201480003314 A CN201480003314 A CN 201480003314A CN 104885208 A CN104885208 A CN 104885208A
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capillary
wire
electrode
liner
junction surface
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CN104885208B (zh
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熊本信二
关根直希
中泽基树
长岛康雄
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Shinkawa Ltd
Arakawa Co Ltd
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Arakawa Co Ltd
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Abstract

在半导体装置(100)交替地形成接合部(75)～接合部(72)及环接部(85)～环接部(82)，所述接合部(75)～接合部(72)使导线(12)的侧面接合于衬垫(65)～衬垫(62)，所述环接部(85)～环接部(82)自接合部(75)～接合部(72)环接至与衬垫(65)～衬垫(62)邻接的其他衬垫(64)～衬垫(61)上为止。而且，在衬垫(65)～衬垫(61)自半导体芯片(55)～半导体芯片(51)的表面凹陷的情况下，将共用的导线(12)压扁至比衬垫(65)～衬垫(61)的凹陷深度厚的厚度而形成扁平形状。由此，在半导体装置中，减少对半导体芯片造成的损伤且以少的结合次数进行导线的连接，并且对自半导体芯片的表面凹陷的电极有效率地进行结合。

Description

半导体装置以及半导体装置的制造方法
技术领域
本发明涉及一种半导体装置的构造以及半导体装置的制造方法。
背景技术
近年来，根据半导体装置的大容量化的要求，多使用将多个半导体芯片层叠于基板或引线框架(lead frame)上而构成的层叠型半导体装置。而且，此种层叠型半导体装置中，同时有薄型化、小形化的要求，因而使用如下的打线结合(wire bonding)方法，即，并非将各层的半导体芯片的衬垫(pad)与引线框架分别加以连接，而是将邻接的各半导体芯片的衬垫间或半导体芯片的衬垫与引线框架的引线之间利用导线依次连接。就该方法而言，使用的是如下的方法，即，为了在打线结合时不对半导体芯片造成损伤，首先，在各半导体芯片的各衬垫上形成凸块(bump)，然后，自引线框架的引线朝向半导体芯片的衬垫上进行逆结合，进而，自结合好的凸块上朝向邻接的半导体芯片的凸块上进行下一逆结合，以此方式将导线自引线框架朝向最上层的半导体芯片的衬垫依次连接(例如，参照专利文献1)。
而且，提出有如下方法：在位于层叠型半导体装置的中间层的各衬垫面形成凸块，对最上层的半导体芯片的衬垫进行球形结合，将导线环接(looping)至形成于中间层的衬垫上的凸块上而结合在凸块上，然后进而将导线环接至下一半导体芯片的凸块上来进行结合，以此方式利用导线将邻接的中间层的衬垫间予以连接(例如，参照专利文献2)。
[现有技术文献]
[专利文献]
[专利文献1]日本专利第3573133号说明书
[专利文献2]日本专利第3662461号说明书
发明内容
[发明所要解决的问题]
然而，专利文献1中记载的现有技术中，是在各半导体芯片的衬垫上形成凸块之后进行打线结合，因而存在步骤数多且结合耗费时间、成本的问题。例如，层叠为两层的层叠型半导体的各衬垫与引线的连接需要：在两层的各半导体芯片的衬垫上形成各个凸块的步骤(2个步骤)、引线与第一层半导体芯片的衬垫上的凸块之间的结合、第一层凸块与第二层半导体芯片的衬垫上的凸块之间的结合总计4个步骤。而且，专利文献2中记载的现有技术中，是在位于中间层的半导体芯片的衬垫上形成凸块之后进行结合，因而步骤数比专利文献1记载的现有技术少，但须有别于结合步骤而另外设置凸块形成步骤，从而无法解决步骤数多的问题。
而且，半导体芯片中也多使用衬垫自半导体芯片的表面凹陷的半导体芯片。如此，在自半导体芯片的表面凹陷的衬垫上进行结合的情况下，为了抑制毛细管(capillary)的前端触碰到衬垫周边的半导体芯片的表面，而无法增大导线的按压量(毛细管下沉量)。因此，如专利文献1、专利文献2中记载的现有技术般，必须在衬垫上临时形成凸块后，在该凸块上进行结合，从而存在无法进行有效率的结合的问题。
本发明的目的在于在半导体装置中，减少对半导体芯片造成的损伤且以少的结合次数进行导线的连接。而且，本发明的目的在于对自半导体芯片的表面凹陷的电极有效率地进行结合。
[解决问题的技术手段]
本发明的半导体装置的特征在于：交替地形成有接合部以及环接部，所述接合部是使侧面接合于电极，所述环接部则是自接合部环接至其他电极上为止，且上述半导体装置包括将3个以上的电极依次连接的共用的导线。
本发明的半导体装置中，适宜为电极为半导体芯片的衬垫，且适宜为半导体装置为层叠着半导体芯片的层叠体，共用的导线将邻接层的半导体芯片的电极间依次连接。
本发明的半导体装置中，适宜为接合部为压扁至共用的导线的直径的1/4～1/2的厚度的扁平形状，环接部包括自接合部向斜上方向弯折而延伸的根(heel)部，根部的厚度为共用的导线的直径的1/2～4/5的厚度。
而且，本发明的半导体装置中，适宜为电极自半导体芯片的表面凹陷，接合部的厚度比电极的凹陷深度厚。
本发明的半导体装置的制造方法是利用共用的导线将3个以上的半导体芯片或基板的电极依次连接的打线结合方法，上述半导体装置的制造方法的特征在于交替地重复接合步骤及环接步骤，从而利用共用的导线将3个以上的电极依次连接，所述接合步骤是利用毛细管将导线的侧面按压至一电极，而将导线的侧面接合于一电极，所述环接步骤则是在接合步骤之后，利用毛细管使导线环接至其他电极上为止。
本发明的半导体装置的制造方法中，适宜为接合步骤利用毛细管将共用的导线压扁至其直径的1/4～1/2的厚度而形成扁平形状，并且进行超声波激振而将共用的导线接合于各电极。
本发明的半导体装置的制造方法中，适宜为环接步骤包括：第一上升步骤，在接合步骤之后，使毛细管自一电极垂直地上升；第一倾斜移动步骤，在第一上升步骤之后，使毛细管朝向其他电极而向斜下方向移动；第二上升步骤，在第一倾斜移动步骤之后，再次使毛细管垂直地上升；反向步骤，在第二上升步骤之后，使毛细管朝向其他电极的相反侧而向斜下方向移动；第二倾斜移动步骤，在反向步骤之后，使毛细管向斜上方向移动至一电极正上方为止；第三上升步骤，在第二倾斜移动步骤之后，再次使毛细管垂直地上升；以及弧状移动步骤，在第三上升步骤之后，使毛细管朝向其他电极的正上方呈弧状地移动。
本发明的半导体装置的制造方法中，适宜为反向步骤使毛细管移动至相对于通过接合部且与电极垂直的线的角度为10°～20°的点为止。
本发明的半导体装置的制造方法中，适宜为电极中的至少一个为自半导体芯片的表面凹陷的衬垫，接合步骤利用毛细管将共用的导线压扁至比衬垫的凹陷深度厚的厚度而形成扁平形状，并且进行超声波激振而将共用的导线接合于衬垫。
[发明的效果]
本发明在半导体装置中，实现如下的效果：可减少对半导体芯片造成的损伤且以少的结合次数进行导线的连接，并且对自半导体芯片的表面凹陷的电极有效率地进行结合。
附图说明
图1是表示本发明的实施形态的半导体装置的构造的剖面图。
图2是表示本发明的实施形态的半导体装置的接合部的立体图。
图3是表示形成本发明的实施形态的半导体装置的接合部的步骤的说明图。
图4是本发明的实施形态的半导体装置的接合部的侧面图。
图5是制造本发明的实施形态的半导体装置的打线结合装置的系统图。
图6是表示使用图5所示的打线结合装置制造本发明的半导体装置的步骤的说明图。
图7是表示使用图5所示的打线结合装置制造本发明的半导体装置的步骤的说明图。
图8是表示制造本发明的半导体装置时的环接步骤中毛细管前端的轨迹的说明图。
图9是本发明的另一实施形态的半导体装置的接合部的侧面图。
具体实施方式
以下，一面参照图式一面对本发明的实施形态进行说明。如图1所示，本实施形态的半导体装置100是在基板10上层叠多层半导体芯片56～半导体芯片51的层叠体，利用1根共用的导线12将设置于各半导体芯片56～半导体芯片51的表面的电极即衬垫66～衬垫61依次连接而成。如图1所示，半导体芯片56～半导体芯片51为相互邻接的层的半导体芯片，各衬垫66～衬垫61为相互邻接的层的衬垫。而且，各衬垫66～衬垫61也为相互邻接的衬垫。共用的导线12可为金线，也可为铝线、铜线等。共用的导线12球形结合(ball bonding)于最上层的半导体芯片56的衬垫66上，且在衬垫66上形成着压接球90。本实施形态的半导体装置100形成着环接部86，该环接部86是使导线12自压接球90侧的始端部86a朝向下一层的半导体芯片55的衬垫65侧的终端部86b呈弧状地环接而成。在环接部86的终端部86b，将导线12的侧面按压并接合于衬垫65上而形成接合部75。而且，再次使导线12自接合部75侧的始端部85a朝向下一层的半导体芯片54的衬垫64侧的终端部85b呈弧状地环接，形成自衬垫65侧的始端部85a朝向衬垫64侧的终端部85b的弧状的环接部85。在环接部85的终端部85b，将导线12的侧面按压并接合于衬垫64上而形成接合部74。同样地，依次形成环接部84、接合部73、环接部83、接合部72、环接部82、接合部71，最后导线12自衬垫61环接至基板10的电极70上而其侧面接合于电极70上之后被切断。如此，本实施形态的半导体装置100中，利用1个共用的导线12将各半导体芯片56～半导体芯片51的各衬垫66～衬垫61、及基板10的电极70依次连接。
亦即，本实施形态的半导体装置100如图1所示，交替地形成环接部86～环接部82、接合部75～接合部71，且将邻接层的半导体芯片55～半导体芯片51的5个衬垫65～衬垫61利用1根导线12依次连接而成。另外，本实施形态中，在最上层的半导体芯片56的衬垫66进行球形结合而将导线12与衬垫66予以接合并进行了说明，但接合的方法并不限定于此，也可如接合部75～接合部72般，将导线12的侧面接合于衬垫66的表面。
其次，一边参照图2～图4，一边对本实施形态的半导体装置100的接合部75～接合部71、环接部86～环接部82的终端部86b～终端部82b、环接部85～环接部81的始端部85a～始端部81a的详情进行说明。如图2所示，接合部75～接合部71为厚度(高度)H1的椭圆形的扁平板状，环接部86～环接部82的终端部86b～终端部82b与环接部85～环接部81的始端部85a～始端部81a分别自接合部75～接合部71的各长径端朝向斜上方向延伸，并且其剖面形状自扁平形状变为直径D的圆形。如图2所示，环接部85～环接部81的始端部85a～始端部81a相对于衬垫66～衬垫61的表面以角度θ1向斜上方向延伸，根部75b～根部71b的厚度(高度)为厚度(高度)H2。
如图3所示，接合部75～接合部71是将毛细管16的前端面16b如图3所示的箭头p般按压至导线12的侧面，将剖面为直径D的圆形的导线12压扁至厚度(高度)H1的圆形或椭圆形的扁平的板状而成。接合部75～接合部71的厚度(高度)H1为导线12的直径D的1/4～1/2左右的厚度(高度)。而且，导线12利用毛细管16的前端面16b压扁至扁平形状，并且如图3的横方向的箭头q所示，沿水平方向被施加超声波振动，由此，形成图3所示的金属接合部75a～金属接合部71a，从而将导线12的侧面金属接合于衬垫65～衬垫61上。
而且，如图4所示，在邻接于接合部75～接合部71的金属接合部75a～金属接合部71a的部分，导线12的侧面成为与衬垫65～衬垫61的表面相接的状态，在图4的点75c～点71c导线12的侧面自衬垫65～衬垫61的表面上升，且以角度θ1向斜上方延伸而与环接部85～环接部81的始端部85a～始端部81a相连。自图4所示的接合部75～接合部71经由点75c～点71c而与环接部85～环接部81的始端部85a～始端部81a相连为止的部分是根部75b～根部71b。根部75b～根部71b的接合部75～接合部71侧的剖面与接合部75～接合部71同样地成为导线12的直径D的1/4～1/2的扁平形状，并随着朝向始端部85a～始端部81a而成为与导线12相同的直径为D的圆形剖面形状。如图4所示，点75c～点71c的根部75b～根部71b的厚度(高度)H2为导线12的直径D的1/2～4/5左右，成为接合部75～接合部71的厚度(高度)的约2倍的厚度(高度)。
接合部75～接合部71仅压扁至导线12的直径D的1/4～1/2的厚度(高度)H1为止，因而维持着与根部75b～根部71b相连的充分的强度。而且，根部75b～根部71b的厚度(高度)H2为如下的厚度(高度)，即，在环接时能够使导线12自根部75b～根部71b与环接部85～环接部81的始端部85a～始端部81a相连而不会产生龟裂等损伤。根部75b～根部71b的角度θ1适宜设为45°～60°左右。而且，如以后说明般，在形成接合部75～接合部71时将超声波振子的输入电压设为通常的第二结合的1.5倍左右，因而即便以少的压扁量也可充分形成金属接合部75a～金属接合部71a，从而导线12的侧面与衬垫66～衬垫61的接合强度充分，在环接时导线12不会自衬垫66～衬垫61剥离。
在以上说明的实施形态中，接合部75～接合部71的厚度(高度)H1设为导线12的直径D的1/4～1/2并进行了说明，但并不限定于此，例如也可为导线12的直径D的8/30～12/30，若为导线12的直径D的9/30～11/30或者1/3左右则更优选。而且，根部75b～根部71b的厚度(高度)H2设为导线12的直径D的1/2～4/5并进行了说明，但并不限定于此，例如也可设为导线12的直径D的16/30～24/30，若为18/30～22/30或2/3左右则更优选。
其次，参照图5～图8对利用打线结合装置101制造参照图1～图4说明的实施形态的半导体装置100的步骤进行说明。首先，一边参照图5一边对半导体装置100的制造中使用的打线结合装置101进行说明。图5中，信号线由单点链线表示。如图5所示，打线结合装置101包括XY平台(table)20、设置于XY平台20上的结合头19、及吸附固定基板10的结合载台(stage)14。在结合头19上安装着利用Z方向马达而绕旋转中心28驱动的结合臂13，并在其前端安装着超声波焊头(Horn)13b，超声波焊头13b的前端以相对于结合载台14的表面呈弧状地进行相接或离开动作的方式而构成。超声波焊头13b的前端在结合载台14的表面的附近沿作为上下方向的Z方向移动。而且，在超声波焊头13b的根部安装着超声波振子15，且构成为对安装于超声波焊头13b的前端的毛细管16进行超声波激振。XY平台20与结合头19构成移动机构18，移动机构18可利用XY平台20而将结合头19在沿着结合载台14的表面的面内(XY面内)移动至随意的位置，从而可使安装于结合臂13的前端的超声波焊头13b的前端及安装于该超声波焊头13b前端的毛细管16沿XYZ方向自如地移动。
如图5所示，打线结合装置101利用内部具有中央处理器(CentralProcessing Unit，CPU)的控制部31来控制各部的位置检测及动作。在XY平台20中内置着对结合头19的XY方向位置进行检测的XY位置检测单元。而且，结合头19上设置着毛细管高度检测器29，该毛细管高度检测器29通过对结合臂13的绕旋转中心28的旋转角度进行检测而检测毛细管16前端的Z方向高度。毛细管高度检测器29也可不检测旋转角度，而直接检测结合臂13前端或毛细管16前端的位置。而且，毛细管高度检测器29可为非接触式，也可为接触式。
毛细管高度检测器29的检测信号经由毛细管高度检测接口36自数据总线39输入至包含CPU的控制部31。而且，包含XY平台20与结合头19的移动机构18、夹持器开闭机构27、超声波振子15构成为：分别经由移动机构接口38、夹持器开闭机构接口35、超声波振子接口37而自数据总线39连接至控制部31，且利用来自控制部31的指令使各设备动作。
数据总线39上连接有存储部32。存储部32中存储着对结合控制整体进行控制的控制程序33、及控制部31进行位置检测处理或控制指令输出动作所需的控制数据34，且控制部31、数据总线39、存储部32及各接口35～接口38是作为一体而构成的计算机30。
对利用如以上般构成的打线结合装置101制造图1所示的半导体装置100的方法进行说明。如图5所示，在结合载台14的表面，利用未图示的粘晶(diebonder)装置等吸附固定有基板10，该基板10是阶梯状地层叠固定着大小不同的半导体芯片56～半导体芯片51所得(图1中未图示层叠数)。而且，如图6的(a)所示，毛细管16位于最上层的半导体芯片56的衬垫66的正上方，其前端的高度成为高度C1。
控制部31在图6的时刻t1使毛细管16自高度C1朝向最上层的半导体芯片56的衬垫66下降而开始球形结合。毛细管16的高度利用图5所示的毛细管高度检测器29而检测，且自毛细管高度检测接口36输入至控制部31。控制部31若在图6的时刻t2被输入毛细管16的高度已下降至高度C3为止的信号，则延缓毛细管16的下降速度，一边搜寻毛细管16前端的无空气焊球(free air ball)80是否接触到衬垫66的表面一边使毛细管16进一步下降。而且，控制部31在图6的时刻t3毛细管16成为高度C4，并检测到无空气焊球80接触到衬垫66的表面的信号后，使毛细管16进一步下降而将无空气焊球80按压至衬垫66的表面从而形成压接球90。与此同时，控制部31使图5所示的超声波振子15通电而产生超声波振动，利用毛细管16以规定的时间对压接球90进行超声波激振而使其金属接合在衬垫66的表面。在接触的检测中，例如当利用毛细管高度检测器29检测的信号在每规定的单位时间内不发生变化时，可判断为接触，而且，也可对半导体芯片56与导线12之间施加电压，而对半导体芯片56与导线12之间流动电流的情况进行检测。
控制部31在图6的时刻t4结束球形结合后，如图6的(c)、(d)所示开始进行第二结合。控制部31在使毛细管16上升至高度C2为止后，使毛细管16的前端呈弧状地朝向下一层的半导体芯片55的衬垫65移动并使毛细管16移动至衬垫65的正上方为止，并且使毛细管16下降至高度C5为止。然后，控制部31在图6的时刻t5毛细管的高度成为C5后，延缓毛细管16的下降速度，一边搜寻毛细管16前端的导线12的侧面是否着落到衬垫65的表面一边使毛细管16进一步下降。然后，控制部31在图6的时刻t6毛细管16成为高度C8，并检测到导线12的侧面已着落到衬垫65的表面的信号后，如图3所示，将毛细管16的前端面16b按压至导线12的侧面。控制部31利用图5所示的毛细管高度检测器29检测毛细管16的下沉量、亦即导线12的压扁量，将导线12压扁导线12的直径D的2/3左右，并按压导线12直至接合部75的厚度(高度)H1为导线12的直径D的1/3左右。然后，在接合部75的厚度(高度)H1为导线12的直径D的1/3左右时停止按压。而且，与导线12的按压一并，控制部31使图5所示的超声波振子15通电而产生超声波振动，利用毛细管16以规定的时间对接合部75进行超声波激振而在其与衬垫65的表面之间形成金属接合部75a。若在图7所示的时刻t7形成接合部75，则衬垫66与衬垫65利用环接部86而连接。环接部86如参照图2、图4说明般具备衬垫66侧的始端部86a与衬垫65侧的终端部86b，终端86b与接合部75相连。若形成接合部75，则对衬垫65的第二结合结束。若第二结合结束，则如图3所示，插通至毛细管16的孔16a的导线12自衬垫65向大致垂直上方延伸。
在对衬垫65的第二结合结束后，控制部31如图8所示进行使毛细管16的前端移动的环接。控制部31使毛细管16自衬垫65向垂直上方上升至图8的点a为止(第一上升步骤)。继而自图8所示的点a朝向点b，即，自衬垫65朝向继而进行结合的衬垫64的方向，使毛细管16呈圆弧状地向斜下方向移动(第一倾斜移动步骤)。然后，控制部31使毛细管16自点b垂直地上升至点c为止(第二上升步骤)。使毛细管16移动至点c为止后，控制部31进行反向步骤。反向步骤使毛细管16自点c朝向下一衬垫64的相反侧而呈圆弧状地向斜下方向移动至点d为止。点d是相对于通过接合部75且与衬垫65垂直的线(第一上升步骤时的毛细管16的轨迹)的角度为10°～20°的点。毛细管16若移动至点d为止，则如图7的(e)所示，在毛细管16的前端弯曲倾斜(bending inclination)的导线12成为自接合部75延伸的状态。继而，控制部31使毛细管16沿着刚才的反向步骤的自点c到点d为止的毛细管16的轨迹而朝向下一衬垫64向斜上方向移动，从而使毛细管16的位置为衬垫65的正上方的点e(第二倾斜移动步骤)。然后，控制部31使毛细管16自点e再次垂直地上升至点f为止(第三上升步骤)。然后，控制部31使毛细管16自点f呈弧状地移动至衬垫64的正上方的点g为止。如此，以自衬垫65经过第一上升步骤、第一倾斜移动步骤、第二上升步骤、反向步骤、第二倾斜移动步骤、第三上升步骤的方式使毛细管16移动后，使毛细管16朝向衬垫64正上方的点g呈弧状地移动，由此形成如参照图2、图4说明般的形状的根部75b～根部71b及环接部85的始端部85a。尤其在反向步骤中，使毛细管移动至相对于通过接合部75且与衬垫65垂直的线(第一上升步骤时的毛细管16的轨迹)的角度为10°～20°的点d为止，由此形成根部75b的厚度(高度)H2与朝向斜上方45°～60°的角度θ1。
而且，若在图7所示的时刻t8毛细管16下降至高度C9为止，则与之前对衬垫65形成接合部75同样地，减小毛细管16的下降速度，进行检测毛细管16前端的导线12的侧面是否着落到衬垫64的搜寻动作，并在图7的时刻t9毛细管16成为高度C10，检测到导线12的侧面着落到衬垫64的表面的信号后，如图3所示，将毛细管16的前端面16b按压至导线12的侧面，一边利用毛细管高度检测器29控制毛细管16的下沉量，一边将导线12按压至接合部74的厚度(高度)H1为导线12的直径D的1/3左右为止，并且使超声波振子15通电而产生超声波振动，利用毛细管16以规定的时间对接合部74进行超声波激振而在其与衬垫64的表面之间形成金属接合部74a。若在图7的时刻t10形成接合部74，则衬垫65与衬垫64利用具有始端部85a及终端部85b的环接部85连接。若形成接合部74，则对衬垫64的第二结合结束。
在图7的时刻t10对衬垫64的第二结合结束后，控制部31与之前说明的衬垫65与衬垫64之间的连接同样地，如图7的(g)、(h)所示，自衬垫64以如自图8所示的点a到点f般的轨迹而使毛细管16移动后，使毛细管16朝向衬垫63环接，并在图7的时刻t11毛细管16成为高度C11后，减小毛细管16的下降速度，一边进行搜寻一边使毛细管下降至导线12的侧面与衬垫63的表面相接为止，并在图7的时刻t12检测到着落后，一边利用毛细管高度检测器29检测毛细管16的高度一边将导线12按压至衬垫63，并且对超声波振子15施加电压，对接合部73进行超声波激振而形成图3所示的金属接合部73a。
以下，同样地利用1根共用的导线12将衬垫63与衬垫62、衬垫62与衬垫61依次连接。而且，在对衬垫61的第二结合结束后，控制部31使毛细管16朝向基板10的电极70环接，在基板10的电极70上进行通常的第二结合后，使毛细管16上升，之后闭合图5所示的夹持器17而使毛细管16进一步上升，切断导线12，从而结束1根导线12的结合。此处，对基板10的电极70的通常的第二结合以能够顺畅地进行对导线12的切断的方式，使导线12的压扁量为形成接合部75～接合部71时的导线12的压扁量的2倍以上，且按压负载也比形成接合部75～接合部71时的按压负载大得多。另一方面，因按压负载大，故即便超声波激振少但也可将导线12与电极70充分地进行金属接合，因而施加至超声波振子15的电压比形成接合部75～接合部71时的电压小，例如为1/1.5左右。
在以上说明的本实施形态中，导线12的压扁量少，是结合之后切断导线12而形成导线尾端(wire tail)的通常的第二结合时的压扁量的一半左右，且导线12的按压负载也少，因而即便将导线12的侧面直接结合于半导体芯片55～半导体芯片51的衬垫65～衬垫61的表面，对半导体芯片55～半导体芯片51造成的损伤也减小。而且，超声波激振通过将通常的第二结合时的1.5倍左右的电压施加至超声波振子15而进行，即便按压负载少也可充分地形成图3所示的金属接合部75a～金属接合部71a，从而确保导线12与衬垫65～衬垫61的接合强度。进而，通过将接合部75～接合部71的厚度(高度)H1设为导线12的直径D的1/3左右的厚度(高度)，而环接部86～环接部82的终端部86b～终端部82b以及环接部85～环接部81的始端部85a～始端部81a与接合部75～接合部71顺畅地相连，不会产生龟裂等，可良好地将导线12的侧面结合于衬垫65～衬垫61，由此可利用1根导线12将衬垫65～衬垫61予以连接。
而且，本实施形态中，利用毛细管高度检测器29检测毛细管16的高度并控制导线12的压扁量，将接合部75～接合部71的高度设为导线12的直径D的1/3左右并进行了说明，但也可预先按导线12的直径D或材料对按压负载与导线12的压扁量的关系进行作图，利用检测毛细管16的按压负载来控制导线12的压扁量从而使接合部75～接合部71的高度为导线12的直径D的1/3左右。该情况下，也可使按压负载比通常的第二结合低，因而可抑制对半导体芯片55～半导体芯片51的损伤。
如以上所述般，本实施形态的打线结合方法可减少对半导体芯片55～半导体芯片51造成的损伤并以少的结合次数进行共用的导线12的连接，因而可有效率地制造半导体装置100。而且，本发明的半导体装置100利用1根导线12将半导体芯片55～半导体芯片51的各衬垫65～衬垫61依次连接，因而各衬垫65～衬垫61与导线12之间的金属接合面为一个，从而与在衬垫65～衬垫61上形成凸块并进行结合的情况相比，各衬垫65～衬垫61与共用的导线12之间的导通电阻减少，因而可降低各衬垫65～衬垫61间的电性连接电阻，从而可制成可靠性高的半导体装置。
其次，一边参照图9一边对本发明的另一实施形态进行说明。对与之前参照图1～图8说明的实施形态相同的部分附上相同的符号并省略说明。之前参照图1至图8说明的实施形态中，半导体芯片56～半导体芯片51的各衬垫66～衬垫61设为自各半导体芯片56～半导体芯片51的表面突出的形状并进行了说明，但有时半导体芯片56～半导体芯片51中衬垫66～衬垫61也成为自半导体芯片56～半导体芯片51的表面凹陷的凹部。将导线12的侧面按压至此种凹部形状的衬垫65～衬垫61而形成接合部75～接合部71时，必须使图3所示的毛细管16的前端面16b不触碰到半导体芯片55～半导体芯片51的表面。该情况下，以接合部75～接合部71的厚度(高度)H1大于衬垫65～衬垫61的凹陷深度D1的方式，控制结合时的毛细管16的下沉量。而且，在凹陷深度D1比导线12的直径D的1/3左右深的情况下，因接合部75～接合部71的厚度(高度)H1比1/3厚，故也可为了确保接合部75～接合部71的金属接合部75a～金属接合部71a的接合强度，进一步增大输入至超声波振子15的电压。除上述方面以外，本实施形态与参照图1～图8说明的半导体装置100相同，其制造步骤也相同。
本实施形态的效果除之前说明的实施形态外，因在各衬垫65～衬垫61自各半导体芯片55～半导体芯片51的表面凹陷的情况下，也可确保导线12与各衬垫65～衬垫61的接合强度，故即便对自半导体芯片55～半导体芯片51的表面凹陷的衬垫65～衬垫61也无须临时形成凸块，而可将导线12的侧面直接结合于衬垫65～衬垫61的表面，因而即便在衬垫65～衬垫61自半导体芯片55～半导体芯片51的表面凹陷的情况下，也实现短时间内能够进行接合的效果。
本发明并不限定于以上所说明的实施形态，包含在不脱离权利要求书所规定的本发明的技术范围或主旨的范围内进行的所有变更及修改。
[符号的说明]
10：基板
12：导线
13：结合臂
13b：超声波焊头
14：结合载台
15：超声波振子
16：毛细管
16a：孔
16b：前端面
17：夹持器
18：移动机构
19：结合头
20：XY平台
27：夹持器开闭机构
28：旋转中心
29：毛细管高度检测器
30：计算机
31：控制部
32：存储部
33：控制程序
34：控制数据
35：夹持器开闭机构接口
36：毛细管高度检测接口
37：超声波振子接口
38：移动机构接口
39：数据总线
51～56：半导体芯片
61～66：衬垫
70：电极
71～75：接合部
71a～75a：金属接合部
71b～75b：根部
71c～75c：点
80：无空气焊球
81～86：环接部
81a～86a：始端部
86b～82b：终端部
90：压接球
100：半导体装置
101：打线结合装置

Claims (16)

1.一种半导体装置，其特征在于：
交替地形成有接合部以及环接部，所述接合部是使侧面接合于电极，所述环接部则是自所述接合部环接至其他电极上为止，且所述半导体装置包括将3个以上的电极依次连接的共用的导线。
2.根据权利要求1所述的半导体装置，其特征在于：所述电极为半导体芯片的衬垫。
3.根据权利要求2所述的半导体装置，其特征在于：
所述半导体装置为层叠着所述半导体芯片的层叠体，
所述共用的导线将邻接层的半导体芯片的电极间依次连接。
4.根据权利要求1所述的半导体装置，其特征在于：
所述接合部为压扁至所述共用的导线的直径的1/4～1/2的厚度的扁平形状，
所述环接部包括自所述接合部向斜上方向弯折而延伸的根部，所述根部的厚度为所述共用的导线的直径的1/2～4/5的厚度。
5.根据权利要求2所述的半导体装置，其特征在于：
所述接合部为压扁至所述共用的导线的直径的1/4～1/2的厚度的扁平形状，
所述环接部包括自所述接合部向斜上方向弯折而延伸的根部，所述根部的厚度为所述共用的导线的直径的1/2～4/5的厚度。
6.根据权利要求3所述的半导体装置，其特征在于：
所述接合部为压扁至所述共用的导线的直径的1/4～1/2的厚度的扁平形状，
所述环接部包括自所述接合部向斜上方向弯折而延伸的根部，所述根部的厚度为所述共用的导线的直径的1/2～4/5的厚度。
7.根据权利要求2所述的半导体装置，其特征在于：
所述电极自所述半导体晶片的表面凹陷，
所述接合部的厚度比所述电极的凹陷深度厚。
8.根据权利要求3所述的半导体装置，其特征在于：
所述电极自所述半导体晶片的表面凹陷，
所述接合部的厚度比所述电极的凹陷深度厚。
9.根据权利要求4所述的半导体装置，其特征在于：
所述电极自所述半导体晶片的表面凹陷，
所述接合部的厚度比所述电极的凹陷深度厚。
10.一种半导体装置的制造方法，其利用共用的导线将3个以上的半导体芯片或基板的电极依次连接，且所述半导体装置的制造方法的特征在于：
交替地重复接合步骤及环接步骤，从而利用共用的导线将3个以上的所述电极依次连接，所述接合步骤是利用毛细管将所述导线的侧面按压至一电极，而将所述导线的侧面接合于所述一电极，所述环接步骤则是在所述接合步骤之后，利用毛细管使所述导线环接至其他电极上为止。
11.根据权利要求10所述的半导体装置的制造方法，其特征在于：
所述接合步骤利用所述毛细管将所述共用的导线压扁至其直径的1/4～1/2的厚度而形成扁平形状，并且进行超声波激振而将所述共用的导线接合于所述各电极。
12.根据权利要求10所述的半导体装置的制造方法，其特征在于：
所述环接步骤包括：
第一上升步骤，在所述接合步骤后，使所述毛细管自所述一电极垂直地上升；
第一倾斜移动步骤，在所述第一上升步骤之后，使所述毛细管朝向其他电极而向斜下方向移动；
第二上升步骤，在所述第一倾斜移动步骤之后，再次使所述毛细管垂直地上升；
反向步骤，在所述第二上升步骤之后，使所述毛细管朝向其他电极的相反侧而向斜下方向移动；
第二倾斜移动步骤，在所述反向步骤之后，使所述毛细管向斜上方向移动至所述一电极正上方为止；
第三上升步骤，在所述第二倾斜移动步骤之后，再次使所述毛细管垂直地上升；以及
弧状移动步骤，在所述第三上升步骤之后，使毛细管朝向所述其他电极的正上方呈弧状地移动。
13.根据权利要求11所述的半导体装置的制造方法，其特征在于：
所述环接步骤包括：
第一上升步骤，在所述接合步骤后，使所述毛细管自所述一电极垂直地上升；
第一倾斜移动步骤，在所述第一上升步骤之后，使所述毛细管朝向其他电极而向斜下方向移动；
第二上升步骤，在所述第一倾斜移动步骤之后，再次使所述毛细管垂直地上升；
反向步骤，在所述第二上升步骤之后，使所述毛细管朝向其他电极的相反侧而向斜下方向移动；
第二倾斜移动步骤，在所述反向步骤之后，使所述毛细管向斜上方向移动至所述一电极正上方为止；
第三上升步骤，在所述第二倾斜移动步骤之后，再次使所述毛细管垂直地上升；以及
弧状移动步骤，在所述第三上升步骤之后，使毛细管朝向所述其他电极的正上方呈弧状地移动。
14.根据权利要求12所述的半导体装置的制造方法，其特征在于：
所述反向步骤使毛细管移动至相对于通过所述接合部且与所述电极垂直的线的角度为10°～20°的点为止。
15.根据权利要求13所述的半导体装置的制造方法，其特征在于：
所述反向步骤使毛细管移动至相对于通过所述接合部且与所述电极垂直的线的角度为10°～20°的点为止。
16.根据权利要求10所述的半导体装置的制造方法，其特征在于：
所述电极中的至少一个为自半导体芯片的表面凹陷的衬垫，
所述接合步骤利用所述毛细管将所述共用的导线压扁至比所述衬垫的凹陷深度厚的厚度而形成扁平形状，并且进行超声波激振而将所述共用的导线接合于所述衬垫。
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